Revision tags: v5.15.41, v5.15.40, v5.15.39, v5.15.38, v5.15.37, v5.15.36, v5.15.35, v5.15.34, v5.15.33, v5.15.32, v5.15.31, v5.15.30, v5.15.29, v5.15.28, v5.15.27, v5.15.26, v5.15.25, v5.15.24, v5.15.23, v5.15.22, v5.15.21, v5.15.20, v5.15.19, v5.15.18, v5.15.17, v5.4.173, v5.15.16, v5.15.15, v5.15.10, v5.15.9, v5.15.8, v5.15.7, v5.15.6, v5.15.5, v5.15.4, v5.15.3, v5.15.2, v5.15.1, v5.15, v5.14.14, v5.14.13, v5.14.12, v5.14.11, v5.14.10, v5.14.9, v5.14.8, v5.14.7, v5.14.6, v5.10.67, v5.10.66, v5.14.5, v5.14.4, v5.10.65, v5.14.3, v5.10.64, v5.14.2, v5.10.63, v5.14.1, v5.10.62, v5.14, v5.10.61, v5.10.60, v5.10.53, v5.10.52, v5.10.51, v5.10.50, v5.10.49, v5.13, v5.10.46, v5.10.43, v5.10.42, v5.10.41 |
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ad4e600c |
| 26-May-2021 |
Gabriel Somlo <gsomlo@gmail.com> |
drivers/soc/litex: remove 8-bit subregister option
Since upstream LiteX recommends that Linux support be limited to designs configured with 32-bit CSR subregisters (see commit a2b71fde in upstream L
drivers/soc/litex: remove 8-bit subregister option
Since upstream LiteX recommends that Linux support be limited to designs configured with 32-bit CSR subregisters (see commit a2b71fde in upstream LiteX, https://github.com/enjoy-digital/litex), remove the option to select 8-bit subregisters, significantly reducing the complexity of LiteX CSR (MMIO register) accessor methods.
NOTE: for details on the underlying mechanics of LiteX CSR registers, see https://github.com/enjoy-digital/litex/wiki/CSR-Bus or the original LiteX accessors (litex/soc/software/include/hw/common.h in the upstream repository).
Signed-off-by: Gabriel Somlo <gsomlo@gmail.com> Cc: Stafford Horne <shorne@gmail.com> Cc: Florent Kermarrec <florent@enjoy-digital.fr> Cc: Mateusz Holenko <mholenko@antmicro.com> Cc: Joel Stanley <joel@jms.id.au> Reviewed-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Stafford Horne <shorne@gmail.com>
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Revision tags: v5.10.40, v5.10.39, v5.4.119, v5.10.36, v5.10.35, v5.10.34, v5.4.116, v5.10.33, v5.12, v5.10.32, v5.10.31, v5.10.30, v5.10.27, v5.10.26, v5.10.25, v5.10.24, v5.10.23, v5.10.22, v5.10.21, v5.10.20, v5.10.19, v5.4.101, v5.10.18, v5.10.17, v5.11, v5.10.16, v5.10.15, v5.10.14 |
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1bea2a93 |
| 26-Jan-2021 |
David Gow <davidgow@google.com> |
soc: litex: Properly depend on HAS_IOMEM
The LiteX SOC controller driver makes use of IOMEM functions like devm_platform_ioremap_resource(), which are only available if CONFIG_HAS_IOMEM is defined.
soc: litex: Properly depend on HAS_IOMEM
The LiteX SOC controller driver makes use of IOMEM functions like devm_platform_ioremap_resource(), which are only available if CONFIG_HAS_IOMEM is defined.
This causes the driver to be enable under make ARCH=um allyesconfig, even though it won't build.
By adding a dependency on HAS_IOMEM, the driver will not be enabled on architectures which don't support it.
Fixes: 22447a99c97e ("drivers/soc/litex: add LiteX SoC Controller driver") Signed-off-by: David Gow <davidgow@google.com> [shorne@gmail.com: Fix typo in commit message pointed out in review] Signed-off-by: Stafford Horne <shorne@gmail.com>
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4f70d150 |
| 12-Jan-2021 |
Gabriel Somlo <gsomlo@gmail.com> |
drivers/soc/litex: make 'litex_[set|get]_reg()' methods private
The 'litex_[set|get]_reg()' methods use the 'reg_size' parameter to specify the width of the LiteX CSR (MMIO) register being accessed.
drivers/soc/litex: make 'litex_[set|get]_reg()' methods private
The 'litex_[set|get]_reg()' methods use the 'reg_size' parameter to specify the width of the LiteX CSR (MMIO) register being accessed.
Since 'u64' is the widest data being supported, the value of 'reg_size' MUST be between 1 and sizeof(u64), which SHOULD be checked at runtime if these methods are publicly available for use by other LiteX device drivers.
At the same time, none of the existing (or foreseeable) LiteX device drivers have a need to access registers whose size is unknown during compilation. As such, all LiteX device drivers should use fixed-width accessor methods such as 'litex_[write|read][8|16|32|64]()'.
This patch renames 'litex_[set|get]_reg()' to '_litex_[set|get]_reg()', indicating that they should NOT be directly called from outside of the 'include/linux/litex.h' header file.
Signed-off-by: Gabriel Somlo <gsomlo@gmail.com> Signed-off-by: Stafford Horne <shorne@gmail.com>
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51f10922 |
| 12-Jan-2021 |
Gabriel Somlo <gsomlo@gmail.com> |
drivers/soc/litex: support 32-bit subregisters, 64-bit CPUs
Upstream LiteX now defaults to using 32-bit CSR subregisters (see https://github.com/enjoy-digital/litex/commit/a2b71fde).
This patch exp
drivers/soc/litex: support 32-bit subregisters, 64-bit CPUs
Upstream LiteX now defaults to using 32-bit CSR subregisters (see https://github.com/enjoy-digital/litex/commit/a2b71fde).
This patch expands on commit 22447a99c97e ("drivers/soc/litex: add LiteX SoC Controller driver"), adding support for handling both 8- and 32-bit LiteX CSR (MMIO) subregisters, as determined by the LITEX_SUBREG_SIZE Kconfig option.
NOTE that while LITEX_SUBREG_SIZE could theoretically be a device tree property, defining it as a compile-time constant allows for much better optimization of the resulting code. This is further supported by the low expected usefulness of deploying the same kernel across LiteX SoCs built with different CSR-Bus data widths.
Finally, the litex_[read|write][8|16|32|64]() accessors are redefined in terms of litex_[get|set]_reg(), which, after compiler optimization, will result in code as efficient as hardcoded shifts, but with the added benefit of automatically matching the appropriate LITEX_SUBREG_SIZE.
NOTE that litex_[get|set]_reg() nominally operate on 64-bit data, but that will also be optimized by the compiler in situations where narrower data is used from a call site.
Signed-off-by: Gabriel Somlo <gsomlo@gmail.com> Signed-off-by: Stafford Horne <shorne@gmail.com>
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Revision tags: v5.10, v5.8.17, v5.8.16, v5.8.15 |
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22447a99 |
| 13-Oct-2020 |
Pawel Czarnecki <pczarnecki@internships.antmicro.com> |
drivers/soc/litex: add LiteX SoC Controller driver
This commit adds driver for the FPGA-based LiteX SoC Controller from LiteX SoC builder.
Co-developed-by: Mateusz Holenko <mholenko@antmicro.com> S
drivers/soc/litex: add LiteX SoC Controller driver
This commit adds driver for the FPGA-based LiteX SoC Controller from LiteX SoC builder.
Co-developed-by: Mateusz Holenko <mholenko@antmicro.com> Signed-off-by: Mateusz Holenko <mholenko@antmicro.com> Signed-off-by: Pawel Czarnecki <pczarnecki@internships.antmicro.com> Signed-off-by: Stafford Horne <shorne@gmail.com>
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