Revision tags: v6.6.25, v6.6.24, v6.6.23, v6.6.16, v6.6.15, v6.6.14, v6.6.13, v6.6.12, v6.6.11, v6.6.10, v6.6.9, v6.6.8, v6.6.7, v6.6.6, v6.6.5, v6.6.4, v6.6.3, v6.6.2, v6.5.11, v6.6.1, v6.5.10, v6.6, v6.5.9, v6.5.8, v6.5.7, v6.5.6, v6.5.5, v6.5.4, v6.5.3, v6.5.2, v6.1.51, v6.5.1, v6.1.50, v6.5, v6.1.49, v6.1.48, v6.1.46, v6.1.45, v6.1.44, v6.1.43, v6.1.42, v6.1.41, v6.1.40, v6.1.39, v6.1.38, v6.1.37, v6.1.36, v6.4, v6.1.35, v6.1.34, v6.1.33, v6.1.32, v6.1.31, v6.1.30, v6.1.29, v6.1.28, v6.1.27, v6.1.26, v6.3, v6.1.25, v6.1.24, v6.1.23, v6.1.22, v6.1.21, v6.1.20, v6.1.19, v6.1.18, v6.1.17, v6.1.16 |
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#
0256b6ae |
| 08-Mar-2023 |
Geert Uytterhoeven <geert+renesas@glider.be> |
pinctrl: renesas: Annotate sentinels in tables
It does not make sense to have a comma after a sentinel, as any new elements must be added before the sentinel. Hence drop all such commas.
Add comme
pinctrl: renesas: Annotate sentinels in tables
It does not make sense to have a comma after a sentinel, as any new elements must be added before the sentinel. Hence drop all such commas.
Add comments to clarify the purpose of the empty elements.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/845f1d8285dd44522af1b0f429d4c6bd4759eb9e.1678272180.git.geert+renesas@glider.be
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Revision tags: v6.1.15, v6.1.14, v6.1.13, v6.2, v6.1.12, v6.1.11, v6.1.10, v6.1.9, v6.1.8, v6.1.7, v6.1.6, v6.1.5, v6.0.19, v6.0.18, v6.1.4, v6.1.3, v6.0.17, v6.1.2, v6.0.16, v6.1.1, v6.0.15, v6.0.14, v6.0.13, v6.1, v6.0.12, v6.0.11, v6.0.10, v5.15.80, v6.0.9, v5.15.79, v6.0.8, v5.15.78, v6.0.7, v5.15.77, v5.15.76, v6.0.6, v6.0.5, v5.15.75, v6.0.4, v6.0.3, v6.0.2, v5.15.74, v5.15.73, v6.0.1, v5.15.72, v6.0, v5.15.71, v5.15.70, v5.15.69, v5.15.68, v5.15.67, v5.15.66, v5.15.65, v5.15.64, v5.15.63, v5.15.62, v5.15.61, v5.15.60, v5.15.59, v5.19, v5.15.58, v5.15.57, v5.15.56, v5.15.55, v5.15.54, v5.15.53, v5.15.52, v5.15.51, v5.15.50, v5.15.49, v5.15.48, v5.15.47, v5.15.46, v5.15.45, v5.15.44, v5.15.43, v5.15.42, v5.18, v5.15.41, v5.15.40, v5.15.39, v5.15.38, v5.15.37, v5.15.36, v5.15.35, v5.15.34 |
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#
72ee7f9b |
| 13-Apr-2022 |
Geert Uytterhoeven <geert+renesas@glider.be> |
pinctrl: renesas: r8a7740: Optimize fixed-width reserved fields
Describe registers with fixed-width register fields and many reserved fields using the PINMUX_CFG_REG_VAR() macro, as the latter suppo
pinctrl: renesas: r8a7740: Optimize fixed-width reserved fields
Describe registers with fixed-width register fields and many reserved fields using the PINMUX_CFG_REG_VAR() macro, as the latter supports a shorthand not requiring dummy values.
This reduces kernel size by 230 bytes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/a18fb98a4eefe648a1b1c5b5913dbeee092674c4.1649865241.git.geert+renesas@glider.be
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Revision tags: v5.15.33, v5.15.32, v5.15.31, v5.17, v5.15.30, v5.15.29, v5.15.28, v5.15.27, v5.15.26, v5.15.25, v5.15.24, v5.15.23, v5.15.22, v5.15.21, v5.15.20, v5.15.19, v5.15.18, v5.15.17, v5.4.173, v5.15.16, v5.15.15, v5.16 |
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#
ceb8d2ac |
| 23-Dec-2021 |
Geert Uytterhoeven <geert+renesas@glider.be> |
pinctrl: renesas: Factor out .pin_to_portcr() address handling
All implementations of the .pin_to_portcr() method implement the same conversion from Port Control Register offset to virtual address.
pinctrl: renesas: Factor out .pin_to_portcr() address handling
All implementations of the .pin_to_portcr() method implement the same conversion from Port Control Register offset to virtual address. Factor it out into the two callers. Remove the pfc parameter, as it is no longer used.
Note that the failure handling in r8a7740_pin_to_portcr() is pro forma, as the function is never called with an invalid pin number.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/a485d4986a17259256988eb14e3a4c2b8d61c303.1640270559.git.geert+renesas@glider.be
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a97e9586 |
| 23-Dec-2021 |
Geert Uytterhoeven <geert+renesas@glider.be> |
pinctrl: renesas: r8a7740: Share SDHI pin group data
Pin groups sdhi[012]_data1 are subsets of sdhi[012]_data4.
This reduces kernel size by 24 bytes.
Signed-off-by: Geert Uytterhoeven <geert+renes
pinctrl: renesas: r8a7740: Share SDHI pin group data
Pin groups sdhi[012]_data1 are subsets of sdhi[012]_data4.
This reduces kernel size by 24 bytes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/e07ae7b52efba55cc210d52de6a771129dd8a3b0.1640269757.git.geert+renesas@glider.be
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477001e5 |
| 23-Dec-2021 |
Geert Uytterhoeven <geert+renesas@glider.be> |
pinctrl: renesas: r8a7740: Share MMC pin group data
Pin groups mmc0_data[14]_[01] are subsets of mmc0_data8_[01].
This reduces kernel size by 80 bytes.
Signed-off-by: Geert Uytterhoeven <geert+ren
pinctrl: renesas: r8a7740: Share MMC pin group data
Pin groups mmc0_data[14]_[01] are subsets of mmc0_data8_[01].
This reduces kernel size by 80 bytes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/4b15d28bb8ac24417be83b1defe0bbb908abc1e6.1640269757.git.geert+renesas@glider.be
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6558407e |
| 23-Dec-2021 |
Geert Uytterhoeven <geert+renesas@glider.be> |
pinctrl: renesas: r8a7740: Share LCD pin group data
Pin groups lcd0_data{8,9,12,16,18} are subsets of lcd0_data24_0. Pin groups lcd1_data{8,9,12,16,18} are subsets of lcd1_data24.
This reduces kern
pinctrl: renesas: r8a7740: Share LCD pin group data
Pin groups lcd0_data{8,9,12,16,18} are subsets of lcd0_data24_0. Pin groups lcd1_data{8,9,12,16,18} are subsets of lcd1_data24.
This reduces kernel size by 1008 bytes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/2018113779b3084c4175b04bb32acf2de0557a37.1640269757.git.geert+renesas@glider.be
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7c2f5298 |
| 23-Dec-2021 |
Geert Uytterhoeven <geert+renesas@glider.be> |
pinctrl: renesas: r8a7740: Share BSC pin group data
Pin groups bsc_data{8,16} are subsets of bsc_data32. Pin groups bsc_rd_we{8,16} are subsets of bsc_rd_we32.
This reduces kernel size by 232 bytes
pinctrl: renesas: r8a7740: Share BSC pin group data
Pin groups bsc_data{8,16} are subsets of bsc_data32. Pin groups bsc_rd_we{8,16} are subsets of bsc_rd_we32.
This reduces kernel size by 232 bytes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/556873f8392b1a7d1a2cf9c10abb5e6c283f11cc.1640269757.git.geert+renesas@glider.be
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Revision tags: v5.15.10, v5.15.9, v5.15.8, v5.15.7, v5.15.6, v5.15.5, v5.15.4, v5.15.3, v5.15.2, v5.15.1, v5.15, v5.14.14, v5.14.13, v5.14.12, v5.14.11, v5.14.10, v5.14.9, v5.14.8, v5.14.7, v5.14.6, v5.10.67, v5.10.66, v5.14.5, v5.14.4, v5.10.65, v5.14.3, v5.10.64, v5.14.2, v5.10.63, v5.14.1, v5.10.62, v5.14, v5.10.61, v5.10.60, v5.10.53, v5.10.52, v5.10.51, v5.10.50, v5.10.49, v5.13, v5.10.46, v5.10.43, v5.10.42, v5.10.41, v5.10.40, v5.10.39, v5.4.119, v5.10.36, v5.10.35, v5.10.34, v5.4.116, v5.10.33, v5.12, v5.10.32, v5.10.31, v5.10.30, v5.10.27, v5.10.26, v5.10.25, v5.10.24, v5.10.23, v5.10.22, v5.10.21, v5.10.20 |
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ec0794a1 |
| 03-Mar-2021 |
Geert Uytterhoeven <geert+renesas@glider.be> |
pinctrl: renesas: Factor out common R-Mobile bias handling
The pin control sub-drivers for SH/R-Mobile SoCs contain almost identical bias handling. The only SoC-specific part is the mapping from pi
pinctrl: renesas: Factor out common R-Mobile bias handling
The pin control sub-drivers for SH/R-Mobile SoCs contain almost identical bias handling. The only SoC-specific part is the mapping from pin numbers to PORTnCR registers.
Reduce code duplication by factoring out the bias handling to the common pinctrl.c code. Use a callback to handle the pin/register mapping.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/20210303132619.3938128-4-geert+renesas@glider.be
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Revision tags: v5.10.19, v5.4.101, v5.10.18, v5.10.17, v5.11, v5.10.16, v5.10.15, v5.10.14, v5.10, v5.8.17, v5.8.16, v5.8.15, v5.9, v5.8.14, v5.8.13, v5.8.12, v5.8.11, v5.8.10, v5.8.9, v5.8.8 |
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077365a9 |
| 09-Sep-2020 |
Geert Uytterhoeven <geert+renesas@glider.be> |
pinctrl: Rename sh-pfc to renesas
The drivers/pinctrl/sh-pfc subdirectory was originally created to group pin control drivers for various Renesas SuperH and SH-Mobile platforms. However, the name "s
pinctrl: Rename sh-pfc to renesas
The drivers/pinctrl/sh-pfc subdirectory was originally created to group pin control drivers for various Renesas SuperH and SH-Mobile platforms. However, the name "sh-pfc" no longer reflects its contents, as the directory now contains pin control drivers for Renesas SuperH, ARM32, and ARM64 SoCs.
Hence rename the subdirectory from drivers/pinctrl/sh-pfc to drivers/pinctrl/renesas, and the related Kconfig symbol from PINCTRL_SH_PFC to PINCTRL_RENESAS.
Rename the git branch in MAINTAINERS, too, for consistency.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20200909131534.12897-3-geert+renesas@glider.be
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Revision tags: v5.10.19, v5.4.101, v5.10.18, v5.10.17, v5.11, v5.10.16, v5.10.15, v5.10.14, v5.10, v5.8.17, v5.8.16, v5.8.15, v5.9, v5.8.14, v5.8.13, v5.8.12, v5.8.11, v5.8.10, v5.8.9, v5.8.8 |
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077365a9 |
| 09-Sep-2020 |
Geert Uytterhoeven <geert+renesas@glider.be> |
pinctrl: Rename sh-pfc to renesas The drivers/pinctrl/sh-pfc subdirectory was originally created to group pin control drivers for various Renesas SuperH and SH-Mobile platforms. Howe
pinctrl: Rename sh-pfc to renesas The drivers/pinctrl/sh-pfc subdirectory was originally created to group pin control drivers for various Renesas SuperH and SH-Mobile platforms. However, the name "sh-pfc" no longer reflects its contents, as the directory now contains pin control drivers for Renesas SuperH, ARM32, and ARM64 SoCs. Hence rename the subdirectory from drivers/pinctrl/sh-pfc to drivers/pinctrl/renesas, and the related Kconfig symbol from PINCTRL_SH_PFC to PINCTRL_RENESAS. Rename the git branch in MAINTAINERS, too, for consistency. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20200909131534.12897-3-geert+renesas@glider.be
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