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Revision tags: v6.6.25, v6.6.24, v6.6.23, v6.6.16, v6.6.15, v6.6.14, v6.6.13, v6.6.12, v6.6.11, v6.6.10, v6.6.9, v6.6.8, v6.6.7, v6.6.6, v6.6.5, v6.6.4, v6.6.3, v6.6.2, v6.5.11, v6.6.1, v6.5.10, v6.6, v6.5.9, v6.5.8, v6.5.7, v6.5.6, v6.5.5, v6.5.4, v6.5.3, v6.5.2, v6.1.51, v6.5.1, v6.1.50, v6.5, v6.1.49, v6.1.48, v6.1.46, v6.1.45, v6.1.44, v6.1.43, v6.1.42, v6.1.41, v6.1.40, v6.1.39 |
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| #
1e46c743 |
| 07-Jul-2023 |
Rohit Agarwal <quic_rohiagar@quicinc.com> |
pinctrl: qcom-pmic-gpio: Add support for pmx75
pmx75 pmic support gpio controller so add compatible in the driver.
Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Link: https://lore.kernel
pinctrl: qcom-pmic-gpio: Add support for pmx75
pmx75 pmic support gpio controller so add compatible in the driver.
Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Link: https://lore.kernel.org/r/1688707209-30151-5-git-send-email-quic_rohiagar@quicinc.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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| #
8fff6514 |
| 07-Jul-2023 |
Rohit Agarwal <quic_rohiagar@quicinc.com> |
pinctrl: qcom-pmic-gpio: Add support for pm7550ba
pm7550ba pmic support gpio controller so add compatible in the driver.
Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Link: https://lore.
pinctrl: qcom-pmic-gpio: Add support for pm7550ba
pm7550ba pmic support gpio controller so add compatible in the driver.
Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Link: https://lore.kernel.org/r/1688707209-30151-4-git-send-email-quic_rohiagar@quicinc.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Revision tags: v6.1.38, v6.1.37, v6.1.36, v6.4, v6.1.35, v6.1.34, v6.1.33, v6.1.32, v6.1.31, v6.1.30, v6.1.29, v6.1.28, v6.1.27, v6.1.26, v6.3 |
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| #
cbbe0778 |
| 21-Apr-2023 |
Luca Weiss <luca@z3ntu.xyz> |
pinctrl: qcom: spmi-gpio: Add PM8953 support
Add support for the 8 GPIOs found on PM8953.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Link: https://lore.kernel.org/r/20230421-pm8953-gpio-v1-2-3d33e2
pinctrl: qcom: spmi-gpio: Add PM8953 support
Add support for the 8 GPIOs found on PM8953.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Link: https://lore.kernel.org/r/20230421-pm8953-gpio-v1-2-3d33e2de47e3@z3ntu.xyz
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Revision tags: v6.1.25 |
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| #
7abf7f88 |
| 18-Apr-2023 |
Luca Weiss <luca@z3ntu.xyz> |
pinctrl: qcom: spmi-gpio: Add PMI632 support
Add support for the 8 GPIOs found on PMI632.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link
pinctrl: qcom: spmi-gpio: Add PMI632 support
Add support for the 8 GPIOs found on PMI632.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230414-pmi632-v2-2-98bafa909c36@z3ntu.xyz
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Revision tags: v6.1.24, v6.1.23, v6.1.22 |
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| #
0538897a |
| 27-Mar-2023 |
Bartosz Golaszewski <bartosz.golaszewski@linaro.org> |
pinctrl: qcom: spmi-gpio: add support for pmm8654au-gpio
Add support for the GPIO controller present on the pmm8654au PMIC.
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Cc: L
pinctrl: qcom: spmi-gpio: add support for pmm8654au-gpio
Add support for the GPIO controller present on the pmm8654au PMIC.
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Cc: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20230327125316.210812-14-brgl@bgdev.pl
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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|
Revision tags: v6.1.21, v6.1.20, v6.1.19, v6.1.18, v6.1.17, v6.1.16, v6.1.15, v6.1.14, v6.1.13, v6.2, v6.1.12, v6.1.11, v6.1.10, v6.1.9, v6.1.8, v6.1.7, v6.1.6 |
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| #
9bd73ce0 |
| 13-Jan-2023 |
Andy Shevchenko <andriy.shevchenko@linux.intel.com> |
pinctrl: qcom: Unify accessing to device fwnode
The device fwnode can be get via dev_fwnode() getter.
Use it where it makes sense.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
pinctrl: qcom: Unify accessing to device fwnode
The device fwnode can be get via dev_fwnode() getter.
Use it where it makes sense.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20230113220703.45686-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Revision tags: v6.1.5, v6.0.19, v6.0.18, v6.1.4, v6.1.3, v6.0.17, v6.1.2, v6.0.16, v6.1.1, v6.0.15, v6.0.14, v6.0.13, v6.1, v6.0.12, v6.0.11, v6.0.10, v5.15.80 |
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| #
e8c39b3e |
| 18-Nov-2022 |
Neil Armstrong <neil.armstrong@linaro.org> |
pinctrl: qcom: spmi-gpio: add support for pm8550 & pmr735d gpio control
Add support for the pm8550, pm8550b, pm8550ve, pm8550vs, pmk8550 & pmr735d
gpio controllers providing GPIO control over SPMI.
pinctrl: qcom: spmi-gpio: add support for pm8550 & pmr735d gpio control
Add support for the pm8550, pm8550b, pm8550ve, pm8550vs, pmk8550 & pmr735d
gpio controllers providing GPIO control over SPMI.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20221114-narmstrong-sm8550-upstream-spmi-v2-3-b839bf2d558a@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Revision tags: v6.0.9, v5.15.79, v6.0.8, v5.15.78, v6.0.7, v5.15.77, v5.15.76, v6.0.6, v6.0.5, v5.15.75, v6.0.4, v6.0.3, v6.0.2, v5.15.74, v5.15.73, v6.0.1 |
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| #
aa9430f8 |
| 07-Oct-2022 |
Andy Shevchenko <andriy.shevchenko@linux.intel.com> |
pinctrl: qcom: Add missing header(s)
Do not imply that some of the generic headers may be always included.
Instead, include explicitly what we are direct user of.
While at it, sort headers alphabet
pinctrl: qcom: Add missing header(s)
Do not imply that some of the generic headers may be always included.
Instead, include explicitly what we are direct user of.
While at it, sort headers alphabetically.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
show more ...
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Revision tags: v5.15.72, v6.0, v5.15.71, v5.15.70, v5.15.69, v5.15.68 |
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| #
3d46ff83 |
| 12-Sep-2022 |
Jishnu Prakash <quic_jprakash@quicinc.com> |
pinctrl: qcom: spmi-gpio: Add compatible for PM7250B
Add support for qcom,pm7250b-gpio variant.
Signed-off-by: Jishnu Prakash <quic_jprakash@quicinc.com>
Signed-off-by: David Collins <quic_collinsd
pinctrl: qcom: spmi-gpio: Add compatible for PM7250B
Add support for qcom,pm7250b-gpio variant.
Signed-off-by: Jishnu Prakash <quic_jprakash@quicinc.com>
Signed-off-by: David Collins <quic_collinsd@quicinc.com>
Signed-off-by: Anjelique Melendez <quic_amelende@quicinc.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220912210624.4527-4-quic_amelende@quicinc.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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| #
723e8462 |
| 12-Sep-2022 |
Anjelique Melendez <quic_amelende@quicinc.com> |
pinctrl: qcom: spmi-gpio: Fix the GPIO strength mapping
The SPMI based PMICs have the HIGH and LOW GPIO output strength mappings
interchanged, fix them.
Signed-off-by: Anjelique Melendez <quic_amel
pinctrl: qcom: spmi-gpio: Fix the GPIO strength mapping
The SPMI based PMICs have the HIGH and LOW GPIO output strength mappings
interchanged, fix them.
Signed-off-by: Anjelique Melendez <quic_amelende@quicinc.com>
Link: https://lore.kernel.org/r/20220912210624.4527-3-quic_amelende@quicinc.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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| #
4af95d09 |
| 12-Sep-2022 |
David Collins <quic_collinsd@quicinc.com> |
pinctrl: qcom: spmi-gpio: add support for LV_VIN2 and MV_VIN3 subtypes
Add support for SPMI PMIC GPIO subtypes GPIO_LV_VIN2 and
GPIO_MV_VIN3.
GPIO_LV_VIN2 GPIOs support two input reference voltages
pinctrl: qcom: spmi-gpio: add support for LV_VIN2 and MV_VIN3 subtypes
Add support for SPMI PMIC GPIO subtypes GPIO_LV_VIN2 and
GPIO_MV_VIN3.
GPIO_LV_VIN2 GPIOs support two input reference voltages: VIN0 and
VIN1. These are typically connected to 1.8 V and 1.2 V supplies
respectively.
GPIO_MV_VIN3 GPIOs support three input reference voltages: VIN0,
VIN1, and VIN2. These are typically connected to Vph, 1.8 V, and
1.2 V supplies respectively.
Signed-off-by: David Collins <quic_collinsd@quicinc.com>
Signed-off-by: Anjelique Melendez <quic_amelende@quicinc.com>
Link: https://lore.kernel.org/r/20220912210624.4527-2-quic_amelende@quicinc.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
show more ...
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Revision tags: v5.15.67, v5.15.66, v5.15.65, v5.15.64 |
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| #
1a41d1e5 |
| 30-Aug-2022 |
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> |
pinctrl: qcom: spmi-gpio: Make irqchip immutable
The irqchip implementation used inside the gpiochips are not supposed to
be changed during runtime. So let's make the one inside the spmi-gpio
gpioch
pinctrl: qcom: spmi-gpio: Make irqchip immutable
The irqchip implementation used inside the gpiochips are not supposed to
be changed during runtime. So let's make the one inside the spmi-gpio
gpiochip immutable.
This fixes the below warning during boot:
gpio gpiochip0: (c440000.spmi:pmic@0:gpio@c000): not an immutable chip, please consider fixing it!
Acked-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Link: https://lore.kernel.org/r/20220830092232.168561-1-manivannan.sadhasivam@linaro.org
[switched two lines as indicated by Johan]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
show more ...
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|
Revision tags: v5.15.63, v5.15.62, v5.15.61, v5.15.60, v5.15.59, v5.19, v5.15.58, v5.15.57, v5.15.56 |
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| #
4a2d4e2d |
| 18-Jul-2022 |
Linus Walleij <linus.walleij@linaro.org> |
Revert "pinctrl: qcom: spmi-gpio: make the irqchip immutable"
This reverts commit 7542766e78fc374d81d8c2db214c4b4308645277.
It was noted during follow-up that the approach is incorrect.
Signed-off
Revert "pinctrl: qcom: spmi-gpio: make the irqchip immutable"
This reverts commit 7542766e78fc374d81d8c2db214c4b4308645277.
It was noted during follow-up that the approach is incorrect.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
show more ...
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Revision tags: v5.15.55, v5.15.54 |
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| #
6cd81a86 |
| 11-Jul-2022 |
Robert Marko <robimarko@gmail.com> |
pinctrl: qcom-pmic-gpio: add support for PMP8074
PMP8074 has 12 GPIO-s with holes on GPIO1 and GPIO12.
Signed-off-by: Robert Marko <robimarko@gmail.com>
Link: https://lore.kernel.org/r/202207112034
pinctrl: qcom-pmic-gpio: add support for PMP8074
PMP8074 has 12 GPIO-s with holes on GPIO1 and GPIO12.
Signed-off-by: Robert Marko <robimarko@gmail.com>
Link: https://lore.kernel.org/r/20220711203408.2949888-4-robimarko@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Revision tags: v5.15.53, v5.15.52, v5.15.51, v5.15.50, v5.15.49, v5.15.48, v5.15.47, v5.15.46, v5.15.45, v5.15.44, v5.15.43, v5.15.42, v5.18, v5.15.41, v5.15.40, v5.15.39, v5.15.38, v5.15.37, v5.15.36, v5.15.35, v5.15.34, v5.15.33, v5.15.32, v5.15.31, v5.17, v5.15.30, v5.15.29, v5.15.28, v5.15.27, v5.15.26, v5.15.25, v5.15.24, v5.15.23, v5.15.22, v5.15.21, v5.15.20, v5.15.19, v5.15.18, v5.15.17, v5.4.173, v5.15.16, v5.15.15, v5.16, v5.15.10, v5.15.9, v5.15.8, v5.15.7, v5.15.6 |
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| #
eebe11b5 |
| 25-Nov-2021 |
Dominik Kobinski <dominikkobinski314@gmail.com> |
pinctrl: qcom: spmi-gpio: Add pm8226 compatibility
Add support for pm8226 SPMI GPIOs. The PMIC features
8 GPIOs, with no holes inbetween.
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
S
pinctrl: qcom: spmi-gpio: Add pm8226 compatibility
Add support for pm8226 SPMI GPIOs. The PMIC features
8 GPIOs, with no holes inbetween.
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Suggested-by: Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com>
Signed-off-by: Dominik Kobinski <dominikkobinski314@gmail.com>
Link: https://lore.kernel.org/r/20211125215310.62371-1-dominikkobinski314@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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| #
91a29af4 |
| 07-Jul-2022 |
Marc Zyngier <maz@kernel.org> |
gpio: Remove dynamic allocation from populate_parent_alloc_arg()
The gpiolib is unique in the way it uses intermediate fwspecs
when feeding an interrupt specifier to the parent domain, as it
relies
gpio: Remove dynamic allocation from populate_parent_alloc_arg()
The gpiolib is unique in the way it uses intermediate fwspecs
when feeding an interrupt specifier to the parent domain, as it
relies on the populate_parent_alloc_arg() callback to perform
a dynamic allocation.
This is pretty inefficient (we free the structure almost immediately),
and the only reason this isn't a stack allocation is that our
ThunderX friend uses MSIs rather than a FW-constructed structure.
Let's solve it by providing a new type composed of the union
of a struct irq_fwspec and a msi_info_t, which satisfies both
requirements. This allows us to use a stack allocation, and we
can move the handful of users to this new scheme.
Also perform some additional cleanup, such as getting rid of the
stub versions of the irq_domain_translate_*cell helpers, which
are never used when CONFIG_IRQ_DOMAIN_HIERARCHY isn't selected.
Tested on a Tegra186.
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Cc: Daniel Palmer <daniel@thingy.jp>
Cc: Romain Perier <romain.perier@gmail.com>
Cc: Bartosz Golaszewski <brgl@bgdev.pl>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Jonathan Hunter <jonathanh@nvidia.com>
Cc: Robert Richter <rric@kernel.org>
Cc: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
Cc: Andy Gross <agross@kernel.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Acked-by: Bartosz Golaszewski <brgl@bgdev.pl>
Link: https://lore.kernel.org/r/20220707182314.66610-2-prabhakar.mahadev-lad.rj@bp.renesas.com
show more ...
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| #
7542766e |
| 24-Jun-2022 |
Robert Marko <robimarko@gmail.com> |
pinctrl: qcom: spmi-gpio: make the irqchip immutable
Commit 6c846d026d49 ("gpio: Don't fiddle with irqchips marked as
immutable") added a warning to indicate if the gpiolib is altering the
internals
pinctrl: qcom: spmi-gpio: make the irqchip immutable
Commit 6c846d026d49 ("gpio: Don't fiddle with irqchips marked as
immutable") added a warning to indicate if the gpiolib is altering the
internals of irqchips.
Following this change the following warning is now observed for the SPMI
PMIC pinctrl driver:
gpio gpiochip1: (200f000.spmi:pmic@0:gpio@c000): not an immutable chip, please consider fixing it!
Fix this by making the irqchip in the SPMI PMIC pinctrl driver immutable.
Signed-off-by: Robert Marko <robimarko@gmail.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Tested-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20220624195112.894916-1-robimarko@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
show more ...
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| #
4d8a768e |
| 11-May-2022 |
Marijn Suijten <marijn.suijten@somainline.org> |
pinctrl: qcom: spmi-gpio: Add pm6125 compatible
The pm6125 has 9 GPIOs with no holes inbetween.
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: AngeloGioacchino Del Regno
pinctrl: qcom: spmi-gpio: Add pm6125 compatible
The pm6125 has 9 GPIOs with no holes inbetween.
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220511220613.1015472-4-marijn.suijten@somainline.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
show more ...
|
| #
203638fd |
| 04-Apr-2022 |
Rohit Agarwal <quic_rohiagar@quicinc.com> |
pinctrl: qcom-pmic-gpio: Add support for pmx65
PMX65 pmic support gpio controller so add compatible.
Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Link: https://lore.kernel.org/r/1649048
pinctrl: qcom-pmic-gpio: Add support for pmx65
PMX65 pmic support gpio controller so add compatible.
Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Link: https://lore.kernel.org/r/1649048650-14059-3-git-send-email-quic_rohiagar@quicinc.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
show more ...
|
| #
168a0abf |
| 15-Mar-2022 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
pinctrl: qcom-pmic-gpio: Add support for pm8450
PM8450 provides 4 GPIOs. Add a compatible entry for this GPIO block.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Acked-by: Krzyszto
pinctrl: qcom-pmic-gpio: Add support for pm8450
PM8450 provides 4 GPIOs. Add a compatible entry for this GPIO block.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20220315091106.613153-1-dmitry.baryshkov@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
show more ...
|
|
Revision tags: v5.15.5, v5.15.4, v5.15.3 |
|
| #
ef874e03 |
| 16-Nov-2021 |
Loic Poulain <loic.poulain@linaro.org> |
pinctrl: spmi-gpio: Add support for PM2250
PM2250, commonly combined with QCM2290, provides ten SPMI GPIOs.
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Link: https://lore.kernel.org/r/163
pinctrl: spmi-gpio: Add support for PM2250
PM2250, commonly combined with QCM2290, provides ten SPMI GPIOs.
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Link: https://lore.kernel.org/r/1637076915-3280-1-git-send-email-loic.poulain@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
show more ...
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|
Revision tags: v5.15.2 |
|
| #
f3474383 |
| 12-Nov-2021 |
Konrad Dybcio <konrad.dybcio@somainline.org> |
pinctrl: qcom-pmic-gpio: Add support for pm8019
PM8019 provides 6 GPIOs. Add a compatible to support that.
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Bjorn Andersson <
pinctrl: qcom-pmic-gpio: Add support for pm8019
PM8019 provides 6 GPIOs. Add a compatible to support that.
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211112115342.17100-2-konrad.dybcio@somainline.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Revision tags: v5.15.1, v5.15, v5.14.14, v5.14.13, v5.14.12, v5.14.11 |
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83917856 |
| 07-Oct-2021 |
Luca Weiss <luca@z3ntu.xyz> |
pinctrl: qcom: spmi-gpio: Add compatible for PM6350
Add support for the GPIO controller in the pm6350 PMIC.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Link: https://lore.kernel.org/r/20211007212444
pinctrl: qcom: spmi-gpio: Add compatible for PM6350
Add support for the GPIO controller in the pm6350 PMIC.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Link: https://lore.kernel.org/r/20211007212444.328034-6-luca@z3ntu.xyz
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Revision tags: v5.14.10, v5.14.9, v5.14.8, v5.14.7, v5.14.6, v5.10.67, v5.10.66, v5.14.5, v5.14.4, v5.10.65 |
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727293a8 |
| 13-Sep-2021 |
Subbaraman Narayanamurthy <quic_subbaram@quicinc.com> |
pinctrl: qcom: spmi-gpio: add support to enable/disable output
Currently, if the GPIO is configured as output in the bootloader
and user changes the mode to input in HLOS, it would end up
getting co
pinctrl: qcom: spmi-gpio: add support to enable/disable output
Currently, if the GPIO is configured as output in the bootloader
and user changes the mode to input in HLOS, it would end up
getting configured as input/output. Functionally, this is fine;
however, there may be some requirements where the output needs
to be disabled so that it can be used only for input.
Add support to enable/disable output mode through "output-enable"
or "output-disable" pinctrl properties.
Signed-off-by: Subbaraman Narayanamurthy <quic_subbaram@quicinc.com>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1631588246-4811-3-git-send-email-quic_subbaram@quicinc.com
[Drop copyright change which is already upstrean in -rcN]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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d36a9773 |
| 16-Sep-2021 |
David Collins <collinsd@codeaurora.org> |
pinctrl: qcom: spmi-gpio: correct parent irqspec translation
pmic_gpio_child_to_parent_hwirq() and
gpiochip_populate_parent_fwspec_fourcell() translate a pinctrl-
spmi-gpio irqspec to an SPMI contro
pinctrl: qcom: spmi-gpio: correct parent irqspec translation
pmic_gpio_child_to_parent_hwirq() and
gpiochip_populate_parent_fwspec_fourcell() translate a pinctrl-
spmi-gpio irqspec to an SPMI controller irqspec. When they do
this, they use a fixed SPMI slave ID of 0 and a fixed GPIO
peripheral offset of 0xC0 (corresponding to SPMI address 0xC000).
This translation results in an incorrect irqspec for secondary
PMICs that don't have a slave ID of 0 as well as for PMIC chips
which have GPIO peripherals located at a base address other than
0xC000.
Correct this issue by passing the slave ID of the pinctrl-spmi-
gpio device's parent in the SPMI controller irqspec and by
calculating the peripheral ID base from the device tree 'reg'
property of the pinctrl-spmi-gpio device.
Signed-off-by: David Collins <collinsd@codeaurora.org>
Signed-off-by: satya priya <skakit@codeaurora.org>
Fixes: ca69e2d165eb ("qcom: spmi-gpio: add support for hierarchical IRQ chip")
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/1631798498-10864-2-git-send-email-skakit@codeaurora.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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