pinctrl: single: Use generic parser and #pinctrl-cells for pinctrl-single,bits

We can now use generic parser and keep things compatible with the
old binding.

Signed-off-by: Tony Lindgren <tony@atom

pinctrl: single: Use generic parser and #pinctrl-cells for pinctrl-single,bits

We can now use generic parser and keep things compatible with the
old binding.

Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

show more ...

pinctrl: single: Use generic parser and #pinctrl-cells for pinctrl-single,pins

We can now use generic parser. To support the legacy binding without
#pinctrl-cells, add pcs_quirk_missing_pinctrl_cell

pinctrl: single: Use generic parser and #pinctrl-cells for pinctrl-single,pins

We can now use generic parser. To support the legacy binding without
#pinctrl-cells, add pcs_quirk_missing_pinctrl_cells() and warn about
missing #pinctrl-cells.

Let's also update the documentation for struct pcs_soc_data while at it
as that seems to be out of date.

Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

show more ...

pinctrl: single: Drop pointless macro

This is left over from initial experiments with more properties.
It's only used in one place, so let's just get rid of it to make
the code more readable.

Signe

pinctrl: single: Drop pointless macro

This is left over from initial experiments with more properties.
It's only used in one place, so let's just get rid of it to make
the code more readable.

Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

show more ...

pinctrl: single: Drop custom names

>From tony Mon Sep 17 00:00:00 2001
From: Tony Lindgren <tony@atomide.com>
Date: Tue, 25 Oct 2016 08:33:34 -0700
Subject: [PATCHv2] pinctrl: single: Drop custom na

pinctrl: single: Drop custom names

>From tony Mon Sep 17 00:00:00 2001
From: Tony Lindgren <tony@atomide.com>
Date: Tue, 25 Oct 2016 08:33:34 -0700
Subject: [PATCHv2] pinctrl: single: Drop custom names

We no longer need to allocate custom names as those are dynamically
generated in pinctrl_register_one_pin() if no name is passed to
pinctrl_register_pins().

Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

show more ...

pinctrl: single: Fix missing flush of posted write for a wakeirq

With many repeated suspend resume cycles, the pin specific wakeirq
may not always work on omaps. This is because the write to enable

pinctrl: single: Fix missing flush of posted write for a wakeirq

With many repeated suspend resume cycles, the pin specific wakeirq
may not always work on omaps. This is because the write to enable the
pin interrupt may not have reached the device over the interconnect
before suspend happens.

Let's fix the issue with a flush of posted write with a readback.

Cc: stable@vger.kernel.org
Reported-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

show more ...

pinctrl: single: Fix pcs_parse_bits_in_pinctrl_entry to use __ffs than ffs

pcs_parse_bits_in_pinctrl_entry uses ffs which gives bit indices
ranging from 1 to MAX. This leads to a corner case where w

pinctrl: single: Fix pcs_parse_bits_in_pinctrl_entry to use __ffs than ffs

pcs_parse_bits_in_pinctrl_entry uses ffs which gives bit indices
ranging from 1 to MAX. This leads to a corner case where we try to request
the pin number = MAX and fails.

bit_pos value is being calculted using ffs. pin_num_from_lsb uses
bit_pos value. pins array is populated with:

pin + pin_num_from_lsb.

The above is 1 more than usual bit indices as bit_pos uses ffs to compute
first set bit. Hence the last of the pins array is populated with the MAX
value and not MAX - 1 which causes error when we call pin_request.

mask_pos is rightly calculated as ((pcs->fmask) << (bit_pos - 1))
Consequently val_pos and submask are correct.

Hence use __ffs which gives (ffs(x) - 1) as the first bit set.

fixes: 4e7e8017a8 ("pinctrl: pinctrl-single: enhance to configure multiple pins of different modules")
Signed-off-by: Keerthy <j-keerthy@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

show more ...

pinctrl: single: Use a separate lockdep class

The single pinmux controller can be cascaded to the other interrupt
controllers. Hence when propagating wake-up settings to its parent
interrupt control

pinctrl: single: Use a separate lockdep class

The single pinmux controller can be cascaded to the other interrupt
controllers. Hence when propagating wake-up settings to its parent
interrupt controller, there's possiblity of detecting possible recursive
locking and getting lockdep warning.

This patch avoids this false positive by using a separate lockdep class
for this single pinctrl interrupts.

Cc: linux-gpio@vger.kernel.org
Suggested-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

show more ...

pinctrl: Delete unnecessary checks

The pinctrl_unregister() function tests whether its argument is NULL
and then returns immediately. Thus the test around the call is not needed.

This issue was det

pinctrl: Delete unnecessary checks

The pinctrl_unregister() function tests whether its argument is NULL
and then returns immediately. Thus the test around the call is not needed.

This issue was detected by using the Coccinelle software.

Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

show more ...

genirq: Remove irq argument from irq flow handlers

Most interrupt flow handlers do not use the irq argument. Those few
which use it can retrieve the irq number from the irq descriptor.

Remove the a

genirq: Remove irq argument from irq flow handlers

Most interrupt flow handlers do not use the irq argument. Those few
which use it can retrieve the irq number from the irq descriptor.

Remove the argument.

Search and replace was done with coccinelle and some extra helper
scripts around it. Thanks to Julia for her help!

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Julia Lawall <Julia.Lawall@lip6.fr>
Cc: Jiang Liu <jiang.liu@linux.intel.com>

show more ...

pinctrl: kill off set_irq_flags usage

set_irq_flags is ARM specific with custom flags which have genirq
equivalents. Convert drivers to use the genirq interfaces directly, so we
can kill off set_irq

pinctrl: kill off set_irq_flags usage

set_irq_flags is ARM specific with custom flags which have genirq
equivalents. Convert drivers to use the genirq interfaces directly, so we
can kill off set_irq_flags. The translation of flags is as follows:

IRQF_VALID -> !IRQ_NOREQUEST
IRQF_PROBE -> !IRQ_NOPROBE
IRQF_NOAUTOEN -> IRQ_NOAUTOEN

For IRQs managed by an irqdomain, the irqdomain core code handles clearing
and setting IRQ_NOREQUEST already, so there is no need to do this in
.map() functions and we can simply remove the set_irq_flags calls. Some
users also modify IRQ_NOPROBE and this has been maintained although it
is not clear that is really needed. There appears to be a great deal of
blind copy and paste of this code.

Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Lee Jones <lee@kernel.org>
Cc: Matthias Brugger <matthias.bgg@gmail.com>
Cc: Tomasz Figa <tomasz.figa@gmail.com>
Cc: Thomas Abraham <thomas.abraham@linaro.org>
Cc: Kukjin Kim <kgene@kernel.org>
Cc: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Cc: linux-gpio@vger.kernel.org
Cc: linux-rpi-kernel@lists.infradead.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-mediatek@lists.infradead.org
Cc: linux-samsung-soc@vger.kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

show more ...

pinctrl: single: ensure pcs irq will not be forced threaded

The PSC IRQ is requested using request_irq() API and as result it can
be forced to be threaded IRQ in RT-Kernel if PCS_QUIRK_HAS_SHARED_IR

pinctrl: single: ensure pcs irq will not be forced threaded

The PSC IRQ is requested using request_irq() API and as result it can
be forced to be threaded IRQ in RT-Kernel if PCS_QUIRK_HAS_SHARED_IRQ
is enabled for pinctrl domain.

As result, following 'possible irq lock inversion dependency' report
can be seen:
=========================================================
[ INFO: possible irq lock inversion dependency detected ]
3.14.43-rt42-00360-g96ff499-dirty #24 Not tainted
---------------------------------------------------------
irq/369-pinctrl/927 just changed the state of lock:
(&pcs->lock){+.....}, at: [<c0375b54>] pcs_irq_handle+0x48/0x9c
but this lock was taken by another, HARDIRQ-safe lock in the past:
(&irq_desc_lock_class){-.....}

and interrupts could create inverse lock ordering between them.

other info that might help us debug this:
Possible interrupt unsafe locking scenario:

CPU0 CPU1
---- ----
lock(&pcs->lock);
local_irq_disable();
lock(&irq_desc_lock_class);
lock(&pcs->lock);
<Interrupt>
lock(&irq_desc_lock_class);

*** DEADLOCK ***

no locks held by irq/369-pinctrl/927.

the shortest dependencies between 2nd lock and 1st lock:
-> (&irq_desc_lock_class){-.....} ops: 58724 {
IN-HARDIRQ-W at:
[<c0090040>] lock_acquire+0x9c/0x158
[<c07065c8>] _raw_spin_lock+0x48/0x58
[<c009edac>] handle_fasteoi_irq+0x24/0x15c
[<c009abb0>] generic_handle_irq+0x3c/0x4c
[<c000f83c>] handle_IRQ+0x50/0xa0
[<c0008674>] gic_handle_irq+0x3c/0x6c
[<c0707a04>] __irq_svc+0x44/0x8c
[<c000fc44>] arch_cpu_idle+0x40/0x4c
[<c009aadc>] cpu_startup_entry+0x270/0x2e0
[<c06fcbf8>] rest_init+0xd4/0xe4
[<c0a44bfc>] start_kernel+0x3d0/0x3dc
[<80008084>] 0x80008084
INITIAL USE at:
[<c0090040>] lock_acquire+0x9c/0x158
[<c070674c>] _raw_spin_lock_irqsave+0x54/0x68
[<c009aff8>] __irq_get_desc_lock+0x64/0xa4
[<c009e38c>] irq_set_chip+0x30/0x78
[<c009ec30>] irq_set_chip_and_handler_name+0x24/0x3c
[<c036ca10>] gic_irq_domain_map+0x48/0xb4
[<c00a0a80>] irq_domain_associate+0x84/0x1d4
[<c00a1154>] irq_create_mapping+0x80/0x11c
[<c00a1270>] irq_create_of_mapping+0x80/0x120
[<c05cdaa8>] irq_of_parse_and_map+0x34/0x3c
[<c0a4ea24>] omap_dm_timer_init_one+0x90/0x30c
[<c0a4eef0>] omap5_realtime_timer_init+0x8c/0x48c
[<c0a486b0>] time_init+0x28/0x38
[<c0a44a6c>] start_kernel+0x240/0x3dc
[<80008084>] 0x80008084
}
... key at: [<c1049ce0>] irq_desc_lock_class+0x0/0x8
... acquired at:
[<c07065c8>] _raw_spin_lock+0x48/0x58
[<c0375a90>] pcs_irq_unmask+0x58/0xa0
[<c009ea48>] irq_enable+0x38/0x48
[<c009ead0>] irq_startup+0x78/0x7c
[<c009d440>] __setup_irq+0x4a8/0x4f4
[<c009d5dc>] request_threaded_irq+0xb8/0x138
[<c0415a5c>] omap_8250_startup+0x4c/0x148
[<c041276c>] serial8250_startup+0x24/0x30
[<c040d0ec>] uart_startup.part.9+0x5c/0x1b4
[<c040dbcc>] uart_open+0xf4/0x16c
[<c03f0540>] tty_open+0x170/0x61c
[<c0157028>] chrdev_open+0xbc/0x1b4
[<c0150494>] do_dentry_open+0x1e8/0x2bc
[<c0150a84>] finish_open+0x44/0x5c
[<c0160d50>] do_last.isra.47+0x710/0xca0
[<c01613a4>] path_openat+0xc4/0x640
[<c0162904>] do_filp_open+0x3c/0x98
[<c0151bdc>] do_sys_open+0x114/0x1d8
[<c0151cc8>] SyS_open+0x28/0x2c
[<c0a44d70>] kernel_init_freeable+0x168/0x1e4
[<c06fcc24>] kernel_init+0x1c/0xf8
[<c000eee8>] ret_from_fork+0x14/0x20

-> (&pcs->lock){+.....} ops: 65 {
HARDIRQ-ON-W at:
[<c0090040>] lock_acquire+0x9c/0x158
[<c07065c8>] _raw_spin_lock+0x48/0x58
[<c0375b54>] pcs_irq_handle+0x48/0x9c
[<c0375c5c>] pcs_irq_handler+0x1c/0x28
[<c009c458>] irq_forced_thread_fn+0x30/0x74
[<c009c784>] irq_thread+0x158/0x1c4
[<c0063fc4>] kthread+0xd4/0xe8
[<c000eee8>] ret_from_fork+0x14/0x20
INITIAL USE at:
[<c0090040>] lock_acquire+0x9c/0x158
[<c070674c>] _raw_spin_lock_irqsave+0x54/0x68
[<c0375344>] pcs_enable+0x7c/0xe8
[<c0372a44>] pinmux_enable_setting+0x178/0x220
[<c036fecc>] pinctrl_select_state+0x110/0x194
[<c04732dc>] pinctrl_bind_pins+0x7c/0x108
[<c045853c>] driver_probe_device+0x70/0x254
[<c0458810>] __driver_attach+0x9c/0xa0
[<c045674c>] bus_for_each_dev+0x78/0xac
[<c0458030>] driver_attach+0x2c/0x30
[<c0457c78>] bus_add_driver+0x15c/0x204
[<c0458ee0>] driver_register+0x88/0x108
[<c045a168>] __platform_driver_register+0x64/0x6c
[<c0a8170c>] omap_hsmmc_driver_init+0x1c/0x20
[<c0008a94>] do_one_initcall+0x110/0x170
[<c0a44d48>] kernel_init_freeable+0x140/0x1e4
[<c06fcc24>] kernel_init+0x1c/0xf8
[<c000eee8>] ret_from_fork+0x14/0x20
}
... key at: [<c1088a8c>] __key.18572+0x0/0x8
... acquired at:
[<c008cdd4>] mark_lock+0x388/0x76c
[<c008df40>] __lock_acquire+0x6d0/0x1f98
[<c0090040>] lock_acquire+0x9c/0x158
[<c07065c8>] _raw_spin_lock+0x48/0x58
[<c0375b54>] pcs_irq_handle+0x48/0x9c
[<c0375c5c>] pcs_irq_handler+0x1c/0x28
[<c009c458>] irq_forced_thread_fn+0x30/0x74
[<c009c784>] irq_thread+0x158/0x1c4
[<c0063fc4>] kthread+0xd4/0xe8
[<c000eee8>] ret_from_fork+0x14/0x20

stack backtrace:
CPU: 1 PID: 927 Comm: irq/369-pinctrl Not tainted 3.14.43-rt42-00360-g96ff499-dirty #24
[<c00177e0>] (unwind_backtrace) from [<c00130b0>] (show_stack+0x20/0x24)
[<c00130b0>] (show_stack) from [<c0702958>] (dump_stack+0x84/0xd0)
[<c0702958>] (dump_stack) from [<c008bcfc>] (print_irq_inversion_bug+0x1d0/0x21c)
[<c008bcfc>] (print_irq_inversion_bug) from [<c008bf18>] (check_usage_backwards+0xb4/0x11c)
[<c008bf18>] (check_usage_backwards) from [<c008cdd4>] (mark_lock+0x388/0x76c)
[<c008cdd4>] (mark_lock) from [<c008df40>] (__lock_acquire+0x6d0/0x1f98)
[<c008df40>] (__lock_acquire) from [<c0090040>] (lock_acquire+0x9c/0x158)
[<c0090040>] (lock_acquire) from [<c07065c8>] (_raw_spin_lock+0x48/0x58)
[<c07065c8>] (_raw_spin_lock) from [<c0375b54>] (pcs_irq_handle+0x48/0x9c)
[<c0375b54>] (pcs_irq_handle) from [<c0375c5c>] (pcs_irq_handler+0x1c/0x28)
[<c0375c5c>] (pcs_irq_handler) from [<c009c458>] (irq_forced_thread_fn+0x30/0x74)
[<c009c458>] (irq_forced_thread_fn) from [<c009c784>] (irq_thread+0x158/0x1c4)
[<c009c784>] (irq_thread) from [<c0063fc4>] (kthread+0xd4/0xe8)
[<c0063fc4>] (kthread) from [<c000eee8>] (ret_from_fork+0x14/0x20)

To fix it use IRQF_NO_THREAD to ensure that pcs irq will not be forced threaded.

Cc: Tony Lindgren <tony@atomide.com>
Cc: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

show more ...

pinctrl: Use irq_desc_get_xxx() to avoid redundant lookup of irq_desc

Use irq_desc_get_xxx() to avoid redundant lookup of irq_desc while we
already have a pointer to corresponding irq_desc.

Signed-

pinctrl: Use irq_desc_get_xxx() to avoid redundant lookup of irq_desc

Use irq_desc_get_xxx() to avoid redundant lookup of irq_desc while we
already have a pointer to corresponding irq_desc.

Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: linux-gpio@vger.kernel.org
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>

show more ...

pinctrl: Consolidate chained IRQ handler install/remove

Chained irq handlers usually set up handler data as well. We now have
a function to set both under irq_desc->lock. Replace the two calls
with

pinctrl: Consolidate chained IRQ handler install/remove

Chained irq handlers usually set up handler data as well. We now have
a function to set both under irq_desc->lock. Replace the two calls
with one.

Search and conversion was done with coccinelle.

Reported-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Julia Lawall <Julia.Lawall@lip6.fr>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: linux-gpio@vger.kernel.org

show more ...

pinctrl: single: dra7: remove PCS_QUIRK_SHARED_IRQ

On DRA7 there is one pinctrl domain (dra7_pmx_core) and
PRCM wake-up IRQ is not shared, so remove quirk.

Cc: Nishanth Menon <nm@ti.com>
Fixes: 313

pinctrl: single: dra7: remove PCS_QUIRK_SHARED_IRQ

On DRA7 there is one pinctrl domain (dra7_pmx_core) and
PRCM wake-up IRQ is not shared, so remove quirk.

Cc: Nishanth Menon <nm@ti.com>
Fixes: 31320beaa3d3 ('pinctrl: single: Add DRA7 pinctrl compatibility')
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Acked-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

show more ...

pinctrl: make pinctrl_register() return proper error code

Currently, pinctrl_register() just returns NULL on error, so the
callers can not know the exact reason of the failure.

Some of the pinctrl

pinctrl: make pinctrl_register() return proper error code

Currently, pinctrl_register() just returns NULL on error, so the
callers can not know the exact reason of the failure.

Some of the pinctrl drivers return -EINVAL, some -ENODEV, and some
-ENOMEM on error of pinctrl_register(), although the error code
might be different from the real cause of the error.

This commit reworks pinctrl_register() to return the appropriate
error code and modifies all of the pinctrl drivers to use IS_ERR()
for the error checking and PTR_ERR() for getting the error code.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Acked-by: Lee Jones <lee@kernel.org>
Acked-by: Sören Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Ray Jui <rjui@broadcom.com>
Acked-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Acked-by: Hongzhou Yang <hongzhou.yang@mediatek.com>
Acked-by: Wei Chen <Wei.Chen@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

show more ...

pinctrl: single: Constify irq_domain_ops

The irq_domain_ops are not modified by the driver and the irqdomain core
code accepts pointer to a const data.

Signed-off-by: Krzysztof Kozlowski <k.kozlows

pinctrl: single: Constify irq_domain_ops

The irq_domain_ops are not modified by the driver and the irqdomain core
code accepts pointer to a const data.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski.k@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

show more ...

pinctrl: constify of_device_id array

of_device_id is always used as const.
(See driver.of_match_table and open firmware functions)

Signed-off-by: Fabian Frederick <fabf@skynet.be>
Acked-by: Jean-Ch

pinctrl: constify of_device_id array

of_device_id is always used as const.
(See driver.of_match_table and open firmware functions)

Signed-off-by: Fabian Frederick <fabf@skynet.be>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Maxime Coquelin <maxime.coquelin@st.com>
Acked-by: Hongzhou Yang <hongzhou.yang@mediatek.com>
Acked-by: Lee Jones <lee@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

show more ...

pinctrl: drop owner assignment from platform_drivers

A platform_driver does not need to set an owner, it will be populated by the
driver core.

Signed-off-by: Wolfram Sang <wsa@the-dreams.de>

pinctrl: single: fix freudian slip

commit 03e9f0cac5da6af85758276cb4624caf5911f2b9
"pinctrl: clean up after enable refactoring"
renamed the vtable callback .enable to .set_mux. The
renaming was done

pinctrl: single: fix freudian slip

commit 03e9f0cac5da6af85758276cb4624caf5911f2b9
"pinctrl: clean up after enable refactoring"
renamed the vtable callback .enable to .set_mux. The
renaming was done manually, and one of the alterations
contained a freudian slip. I confess, I am human.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

show more ...

pinctrl: clean up after enable refactoring

commit 2243a87d90b42eb38bc281957df3e57c712b5e56
"pinctrl: avoid duplicated calling enable_pinmux_setting for a pin"
removed the .disable callback from the

pinctrl: clean up after enable refactoring

commit 2243a87d90b42eb38bc281957df3e57c712b5e56
"pinctrl: avoid duplicated calling enable_pinmux_setting for a pin"
removed the .disable callback from the struct pinmux_ops,
making the .enable() callback the only remaining callback.

However .enable() is a bad name as it seems to imply that a
muxing can also be disabled. Rename the callback to .set_mux()
and also take this opportunity to clean out any remaining
mentions of .disable() from the documentation.

Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Acked-by: Fan Wu <fwu@marvell.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

show more ...

pinctrl: single: AM437x: Add pinctrl compatibility

AM437x pinctrl definitions now differ from traditional 16 bit OMAP pin
ctrl definitions, in that all 32 bits are used to describe a single pin

Als

pinctrl: single: AM437x: Add pinctrl compatibility

AM437x pinctrl definitions now differ from traditional 16 bit OMAP pin
ctrl definitions, in that all 32 bits are used to describe a single pin

Also the location of wakeupenable and event bits have changed.

Signed-off-by: Keerthy <j-keerthy@ti.com>
[nm@ti.com: minor updates]
Signed-off-by: Nishanth Menon <nm@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

show more ...

pinctrl: single: Add DRA7 pinctrl compatibility

DRA7 pinctrl definitions now differ from traditional 16 bit OMAP pin
ctrl definitions, in that all 32 bits are used to describe a single pin

Also the

pinctrl: single: Add DRA7 pinctrl compatibility

DRA7 pinctrl definitions now differ from traditional 16 bit OMAP pin
ctrl definitions, in that all 32 bits are used to describe a single pin

Also the location of wakeupenable and event bits have changed.

Signed-off-by: Nishanth Menon <nm@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

show more ...

pinctrl: pinctrl-single.c: Cleaning up wrong format string usage

%d in format string used, but the type is unsigned int

This was found using a static code analysis program called cppcheck

Signed-o

pinctrl: pinctrl-single.c: Cleaning up wrong format string usage

%d in format string used, but the type is unsigned int

This was found using a static code analysis program called cppcheck

Signed-off-by: Rickard Strandqvist <rickard_strandqvist@spectrumdigital.se>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

show more ...

pinctrl: pinctrl-single.c: Cleaning up values that are never used

Remove variable that are never used

This was found using a static code analysis program called cppcheck.

Signed-off-by: Rickard St

pinctrl: pinctrl-single.c: Cleaning up values that are never used

Remove variable that are never used

This was found using a static code analysis program called cppcheck.

Signed-off-by: Rickard Strandqvist <rickard_strandqvist@spectrumdigital.se>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

show more ...

pinctrl: avoid duplicated calling enable_pinmux_setting for a pin

What the patch does:
1. Call pinmux_disable_setting ahead of pinmux_enable_setting
each time pinctrl_select_state is called
2. Rem

pinctrl: avoid duplicated calling enable_pinmux_setting for a pin

What the patch does:
1. Call pinmux_disable_setting ahead of pinmux_enable_setting
each time pinctrl_select_state is called
2. Remove the HW disable operation in pinmux_disable_setting function.
3. Remove the disable ops in struct pinmux_ops
4. Remove all the disable ops users in current code base.

Notes:
1. Great thanks for the suggestion from Linus, Tony Lindgren and
Stephen Warren and Everyone that shared comments on this patch.
2. The patch also includes comment fixes from Stephen Warren.

The reason why we do this:
1. To avoid duplicated calling of the enable_setting operation
without disabling operation inbetween which will let the pin
descriptor desc->mux_usecount increase monotonously.
2. The HW pin disable operation is not useful for any of the
existing platforms.
And this can be used to avoid the HW glitch after using the
item #1 modification.

In the following case, the issue can be reproduced:
1. There is a driver that need to switch pin state dynamically,
e.g. between "sleep" and "default" state
2. The pin setting configuration in a DTS node may be like this:

component a {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&a_grp_setting &c_grp_setting>;
pinctrl-1 = <&b_grp_setting &c_grp_setting>;
}

The "c_grp_setting" config node is totally identical, maybe like
following one:

c_grp_setting: c_grp_setting {
pinctrl-single,pins = <GPIO48 AF6>;
}

3. When switching the pin state in the following official pinctrl
sequence:
pin = pinctrl_get();
state = pinctrl_lookup_state(wanted_state);
pinctrl_select_state(state);
pinctrl_put();

Test Result:
1. The switch is completed as expected, that is: the device's
pin configuration is changed according to the description in the
"wanted_state" group setting
2. The "desc->mux_usecount" of the corresponding pins in "c_group"
is increased without being decreased, because the "desc" is for
each physical pin while the setting is for each setting node
in the DTS.
Thus, if the "c_grp_setting" in pinctrl-0 is not disabled ahead
of enabling "c_grp_setting" in pinctrl-1, the desc->mux_usecount
will keep increasing without any chance to be decreased.

According to the comments in the original code, only the setting,
in old state but not in new state, will be "disabled" (calling
pinmux_disable_setting), which is correct logic but not intact. We
still need consider case that the setting is in both old state
and new state. We can do this in the following two ways:

1. Avoid to "enable"(calling pinmux_enable_setting) the "same pin
setting" repeatedly
2. "Disable"(calling pinmux_disable_setting) the "same pin setting",
actually two setting instances, ahead of enabling them.

Analysis:
1. The solution #2 is better because it can avoid too much
iteration.
2. If we disable all of the settings in the old state and one of
the setting(s) exist in the new state, the pins mux function
change may happen when some SoC vendors defined the
"pinctrl-single,function-off"
in their DTS file.
old_setting => disabled_setting => new_setting.
3. In the pinmux framework, when a pin state is switched, the
setting in the old state should be marked as "disabled".

Conclusion:
1. To Remove the HW disabling operation to above the glitch mentioned
above.
2. Handle the issue mentioned above by disabling all of the settings
in old state and then enable the all of the settings in new state.

Signed-off-by: Fan Wu <fwu@marvell.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Maxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

show more ...