Revision tags: v6.6.25, v6.6.24, v6.6.23, v6.6.16, v6.6.15, v6.6.14, v6.6.13, v6.6.12, v6.6.11, v6.6.10, v6.6.9, v6.6.8, v6.6.7, v6.6.6, v6.6.5, v6.6.4, v6.6.3, v6.6.2, v6.5.11, v6.6.1, v6.5.10, v6.6, v6.5.9, v6.5.8, v6.5.7, v6.5.6, v6.5.5, v6.5.4, v6.5.3, v6.5.2, v6.1.51, v6.5.1, v6.1.50, v6.5, v6.1.49, v6.1.48, v6.1.46, v6.1.45, v6.1.44, v6.1.43, v6.1.42, v6.1.41, v6.1.40, v6.1.39, v6.1.38, v6.1.37, v6.1.36, v6.4, v6.1.35 |
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#
310cd4c2 |
| 15-Jun-2023 |
Claudiu Beznea <claudiu.beznea@microchip.com> |
pinctrl: microchip-sgpio: check return value of devm_kasprintf()
devm_kasprintf() returns a pointer to dynamically allocated memory. Pointer could be NULL in case allocation fails. Check pointer val
pinctrl: microchip-sgpio: check return value of devm_kasprintf()
devm_kasprintf() returns a pointer to dynamically allocated memory. Pointer could be NULL in case allocation fails. Check pointer validity. Identified with coccinelle (kmerr.cocci script).
Fixes: 7e5ea974e61c ("pinctrl: pinctrl-microchip-sgpio: Add pinctrl driver for Microsemi Serial GPIO") Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20230615105333.585304-3-claudiu.beznea@microchip.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Revision tags: v6.1.34, v6.1.33, v6.1.32, v6.1.31, v6.1.30 |
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#
6171212e |
| 19-May-2023 |
Lizhe <sensor1010@163.com> |
pinctrl: microchip: Remove redundant clearing of IRQ_TYPE_SENSE_MASK
Before executing microchip_sgpio_irq_set_type(), type has already been cleared IRQ_TYPE_SENSE_MASK, see __irq_set_trigger().
Sig
pinctrl: microchip: Remove redundant clearing of IRQ_TYPE_SENSE_MASK
Before executing microchip_sgpio_irq_set_type(), type has already been cleared IRQ_TYPE_SENSE_MASK, see __irq_set_trigger().
Signed-off-by: Lizhe <sensor1010@163.com> Link: https://lore.kernel.org/r/20230519170716.3459-1-sensor1010@163.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Revision tags: v6.1.29, v6.1.28, v6.1.27, v6.1.26, v6.3, v6.1.25, v6.1.24, v6.1.23, v6.1.22, v6.1.21, v6.1.20, v6.1.19, v6.1.18, v6.1.17, v6.1.16, v6.1.15, v6.1.14, v6.1.13, v6.2, v6.1.12, v6.1.11, v6.1.10, v6.1.9, v6.1.8, v6.1.7, v6.1.6, v6.1.5, v6.0.19, v6.0.18, v6.1.4, v6.1.3, v6.0.17, v6.1.2, v6.0.16, v6.1.1, v6.0.15, v6.0.14, v6.0.13, v6.1, v6.0.12, v6.0.11, v6.0.10, v5.15.80, v6.0.9, v5.15.79, v6.0.8, v5.15.78, v6.0.7, v5.15.77, v5.15.76, v6.0.6, v6.0.5, v5.15.75, v6.0.4, v6.0.3, v6.0.2, v5.15.74, v5.15.73, v6.0.1 |
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#
54da3e1b |
| 07-Oct-2022 |
Andy Shevchenko <andriy.shevchenko@linux.intel.com> |
pinctrl: microchip-sgpio: Add missing header(s)
Do not imply that some of the generic headers may be always included. Instead, include explicitly what we are direct user of.
Signed-off-by: Andy She
pinctrl: microchip-sgpio: Add missing header(s)
Do not imply that some of the generic headers may be always included. Instead, include explicitly what we are direct user of.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
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Revision tags: v5.15.72, v6.0, v5.15.71, v5.15.70, v5.15.69, v5.15.68, v5.15.67, v5.15.66 |
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#
68c87336 |
| 05-Sep-2022 |
Colin Foster <colin.foster@in-advantage.com> |
pinctrl: microchip-sgpio: add ability to be used in a non-mmio configuration
There are a few Ocelot chips that can contain SGPIO logic, but can be controlled externally. Specifically the VSC7511, 75
pinctrl: microchip-sgpio: add ability to be used in a non-mmio configuration
There are a few Ocelot chips that can contain SGPIO logic, but can be controlled externally. Specifically the VSC7511, 7512, 7513, and 7514. In the externally controlled configurations these registers are not memory-mapped.
Add support for these non-memory-mapped configurations.
Signed-off-by: Colin Foster <colin.foster@in-advantage.com> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Lee Jones <lee@kernel.org> Link: https://lore.kernel.org/r/20220905162132.2943088-6-colin.foster@in-advantage.com
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#
2f65923c |
| 05-Sep-2022 |
Colin Foster <colin.foster@in-advantage.com> |
pinctrl: microchip-sgpio: allow sgpio driver to be used as a module
As the commit message suggests, this simply adds the ability to select SGPIO pinctrl as a module. This becomes more practical when
pinctrl: microchip-sgpio: allow sgpio driver to be used as a module
As the commit message suggests, this simply adds the ability to select SGPIO pinctrl as a module. This becomes more practical when the SGPIO hardware exists on an external chip, controlled indirectly by I2C or SPI. This commit enables that level of control.
Signed-off-by: Colin Foster <colin.foster@in-advantage.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Lee Jones <lee@kernel.org> Link: https://lore.kernel.org/r/20220905162132.2943088-5-colin.foster@in-advantage.com
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#
6323f916 |
| 06-Sep-2022 |
Andy Shevchenko <andriy.shevchenko@linux.intel.com> |
pinctrl: microchip-sgpio: Correct the fwnode_irq_get() return value check
fwnode_irq_get() may return all possible signed values, such as Linux error code. Fix the code to handle this properly.
Fix
pinctrl: microchip-sgpio: Correct the fwnode_irq_get() return value check
fwnode_irq_get() may return all possible signed values, such as Linux error code. Fix the code to handle this properly.
Fixes: be2dc859abd4 ("pinctrl: pinctrl-microchip-sgpio: Add irq support (for sparx5)") Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Michael Walle <michael@walle.cc> Link: https://lore.kernel.org/r/20220906115021.8661-1-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Revision tags: v5.15.65, v5.15.64, v5.15.63, v5.15.62, v5.15.61, v5.15.60, v5.15.59, v5.19, v5.15.58, v5.15.57, v5.15.56, v5.15.55, v5.15.54, v5.15.53, v5.15.52, v5.15.51, v5.15.50, v5.15.49, v5.15.48, v5.15.47, v5.15.46, v5.15.45, v5.15.44, v5.15.43, v5.15.42, v5.18, v5.15.41, v5.15.40, v5.15.39, v5.15.38 |
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#
85437018 |
| 03-May-2022 |
Andy Shevchenko <andriy.shevchenko@linux.intel.com> |
pinctrl: microchip-sgpio: Switch to use fwnode instead of of_node
GPIO library now accepts fwnode as a firmware node, so switch the driver to use it.
Signed-off-by: Andy Shevchenko <andriy.shevchen
pinctrl: microchip-sgpio: Switch to use fwnode instead of of_node
GPIO library now accepts fwnode as a firmware node, so switch the driver to use it.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20220503151517.59115-1-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Revision tags: v5.15.37 |
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#
646e321f |
| 28-Apr-2022 |
Michael Walle <michael@walle.cc> |
pinctrl: microchip-sgpio: make irq_chip immutable
Since recently, the kernel is nagging about mutable irq_chips:
[ 4.967050] gpio gpiochip1: (e2004190.gpio-input): not an immutable chip, please
pinctrl: microchip-sgpio: make irq_chip immutable
Since recently, the kernel is nagging about mutable irq_chips:
[ 4.967050] gpio gpiochip1: (e2004190.gpio-input): not an immutable chip, please consider fixing it!
Drop the unneeded copy, flag it as IRQCHIP_IMMUTABLE, add the new helper functions and call the appropriate gpiolib functions.
Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20220428111622.1395831-1-michael@walle.cc Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Revision tags: v5.15.36, v5.15.35, v5.15.34, v5.15.33, v5.15.32, v5.15.31, v5.17, v5.15.30, v5.15.29, v5.15.28, v5.15.27, v5.15.26 |
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#
1f3c85c2 |
| 26-Feb-2022 |
Michael Walle <michael@walle.cc> |
pinctrl: microchip-sgpio: wait until output is actually set
Right now, when a gpio value is set, the actual hardware pin gets set asynchronously. When linux write the output register, it takes some
pinctrl: microchip-sgpio: wait until output is actually set
Right now, when a gpio value is set, the actual hardware pin gets set asynchronously. When linux write the output register, it takes some time until it is actually propagated to the output shift registers. If that output port is connected to an I2C mux for example, the linux driver assumes the I2C bus is already switched although it is not.
Fortunately, there is a single shot mode with a feedback: you can trigger the single shot and the hardware will clear that bit once it has finished the clocking and strobed the load signal of the shift registers. This can take a considerable amount of time though. Measuremens have shown that it takes up to a whole burst cycle gap which is about 50ms on the largest setting. Therefore, we have to mark the output bank as sleepable. To avoid unnecessary waiting, just trigger the single shot if the value was actually changed.
Signed-off-by: Michael Walle <michael@walle.cc> Link: https://lore.kernel.org/r/20220226204507.2511633-6-michael@walle.cc Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
2560c681 |
| 26-Feb-2022 |
Michael Walle <michael@walle.cc> |
pinctrl: microchip-sgpio: return error in spgio_output_set()
Make sgpio_output_set() return an error value. Don't just ignore the return value of any regmap access but propagate it to our callers. E
pinctrl: microchip-sgpio: return error in spgio_output_set()
Make sgpio_output_set() return an error value. Don't just ignore the return value of any regmap access but propagate it to our callers. Even if the accesses never fail, this is a preparation patch to add single shot mode where we need to poll a bit and thus we might get -ETIMEDOUT.
Signed-off-by: Michael Walle <michael@walle.cc> Link: https://lore.kernel.org/r/20220226204507.2511633-5-michael@walle.cc Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
0e68328e |
| 26-Feb-2022 |
Michael Walle <michael@walle.cc> |
pinctrl: microchip-sgpio: use regmap_update_bits()
Convert sgpio_clrsetbits() to use regmap_update_bits() and drop the spinlocks because regmap already takes care of the locking.
Signed-off-by: Mic
pinctrl: microchip-sgpio: use regmap_update_bits()
Convert sgpio_clrsetbits() to use regmap_update_bits() and drop the spinlocks because regmap already takes care of the locking.
Signed-off-by: Michael Walle <michael@walle.cc> Link: https://lore.kernel.org/r/20220226204507.2511633-4-michael@walle.cc Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
cd8c48b4 |
| 26-Feb-2022 |
Michael Walle <michael@walle.cc> |
pinctrl: microchip-sgpio: don't do RMW for interrupt ack register
The interrupt ack register has the usual "write one to clear" semantics. No read-modify-write is required here.
This is also a prep
pinctrl: microchip-sgpio: don't do RMW for interrupt ack register
The interrupt ack register has the usual "write one to clear" semantics. No read-modify-write is required here.
This is also a preparation patch to change the sgpio_clrsetbits() to use regmap_update_bits() which don't write the value if it is not changed.
Signed-off-by: Michael Walle <michael@walle.cc> Link: https://lore.kernel.org/r/20220226204507.2511633-3-michael@walle.cc Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
7996c5f5 |
| 26-Feb-2022 |
Michael Walle <michael@walle.cc> |
pinctrl: microchip-sgpio: lock RMW access
Protect any RMW access to the registers by a spinlock.
Fixes: 7e5ea974e61c ("pinctrl: pinctrl-microchip-sgpio: Add pinctrl driver for Microsemi Serial GPIO
pinctrl: microchip-sgpio: lock RMW access
Protect any RMW access to the registers by a spinlock.
Fixes: 7e5ea974e61c ("pinctrl: pinctrl-microchip-sgpio: Add pinctrl driver for Microsemi Serial GPIO") Signed-off-by: Michael Walle <michael@walle.cc> Link: https://lore.kernel.org/r/20220226204507.2511633-2-michael@walle.cc Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Revision tags: v5.15.25, v5.15.24, v5.15.23, v5.15.22, v5.15.21, v5.15.20, v5.15.19 |
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#
baf927a8 |
| 31-Jan-2022 |
Horatiu Vultur <horatiu.vultur@microchip.com> |
pinctrl: microchip-sgpio: Fix support for regmap
Initially the driver accessed the registers using u32 __iomem but then in the blamed commit it changed it to use regmap. The problem is that now the
pinctrl: microchip-sgpio: Fix support for regmap
Initially the driver accessed the registers using u32 __iomem but then in the blamed commit it changed it to use regmap. The problem is that now the offset of the registers is not calculated anymore at word offset but at byte offset. Therefore make sure to multiply the offset with word size.
Acked-by: Steen Hegelund <Steen.Hegelund@microchip.com> Reviewed-by: Colin Foster <colin.foster@in-advantage.com> Fixes: 2afbbab45c261a ("pinctrl: microchip-sgpio: update to support regmap") Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/r/20220131085201.307031-1-horatiu.vultur@microchip.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Revision tags: v5.15.18, v5.15.17, v5.4.173, v5.15.16, v5.15.15, v5.16, v5.15.10, v5.15.9, v5.15.8, v5.15.7, v5.15.6, v5.15.5, v5.15.4 |
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#
2afbbab4 |
| 19-Nov-2021 |
Colin Foster <colin.foster@in-advantage.com> |
pinctrl: microchip-sgpio: update to support regmap
Adopt regmap instead of a direct memory map so that custom regmaps and other interfaces can be supported.
Signed-off-by: Colin Foster <colin.foste
pinctrl: microchip-sgpio: update to support regmap
Adopt regmap instead of a direct memory map so that custom regmaps and other interfaces can be supported.
Signed-off-by: Colin Foster <colin.foster@in-advantage.com> Link: https://lore.kernel.org/r/20211119195928.2498441-5-colin.foster@in-advantage.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Revision tags: v5.15.3, v5.15.2, v5.15.1, v5.15, v5.14.14 |
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#
0b90315a |
| 18-Oct-2021 |
Horatiu Vultur <horatiu.vultur@microchip.com> |
pinctrl: microchip sgpio: use reset driver
On lan966x platform when the switch gets reseted then also the sgpio gets reseted. The fix for this is to extend also the sgpio driver to call the reset dr
pinctrl: microchip sgpio: use reset driver
On lan966x platform when the switch gets reseted then also the sgpio gets reseted. The fix for this is to extend also the sgpio driver to call the reset driver which will be reseted only once by the first driver that is probed.
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Steen Hegelund <steen.hegelund@microchip.com> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Link: https://lore.kernel.org/r/20211018085754.1066056-3-horatiu.vultur@microchip.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
84940deb |
| 26-Feb-2022 |
Michael Walle <michael@walle.cc> |
pinctrl: microchip-sgpio: lock RMW access
[ Upstream commit 7996c5f5ec7a20b3f6b8fae93fcf3cb8f1c01743 ]
Protect any RMW access to the registers by a spinlock.
Fixes: 7e5ea974e61c ("pinctrl: pinctrl
pinctrl: microchip-sgpio: lock RMW access
[ Upstream commit 7996c5f5ec7a20b3f6b8fae93fcf3cb8f1c01743 ]
Protect any RMW access to the registers by a spinlock.
Fixes: 7e5ea974e61c ("pinctrl: pinctrl-microchip-sgpio: Add pinctrl driver for Microsemi Serial GPIO") Signed-off-by: Michael Walle <michael@walle.cc> Link: https://lore.kernel.org/r/20220226204507.2511633-2-michael@walle.cc Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
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#
c6f009fe |
| 18-Oct-2021 |
Horatiu Vultur <horatiu.vultur@microchip.com> |
pinctrl: microchip sgpio: use reset driver
[ Upstream commit 0b90315af7602aeb40fe7b6255ab212a19dbd78e ]
On lan966x platform when the switch gets reseted then also the sgpio gets reseted. The fix fo
pinctrl: microchip sgpio: use reset driver
[ Upstream commit 0b90315af7602aeb40fe7b6255ab212a19dbd78e ]
On lan966x platform when the switch gets reseted then also the sgpio gets reseted. The fix for this is to extend also the sgpio driver to call the reset driver which will be reseted only once by the first driver that is probed.
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Steen Hegelund <steen.hegelund@microchip.com> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Link: https://lore.kernel.org/r/20211018085754.1066056-3-horatiu.vultur@microchip.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
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Revision tags: v5.14.13, v5.14.12, v5.14.11, v5.14.10, v5.14.9, v5.14.8, v5.14.7, v5.14.6, v5.10.67, v5.10.66, v5.14.5, v5.14.4, v5.10.65, v5.14.3, v5.10.64, v5.14.2, v5.10.63, v5.14.1, v5.10.62, v5.14, v5.10.61, v5.10.60, v5.10.53, v5.10.52, v5.10.51, v5.10.50, v5.10.49, v5.13, v5.10.46, v5.10.43, v5.10.42, v5.10.41, v5.10.40, v5.10.39, v5.4.119, v5.10.36, v5.10.35 |
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#
a9cb09b7 |
| 04-May-2021 |
Marc Zyngier <maz@kernel.org> |
pinctrl: Bulk conversion to generic_handle_domain_irq()
Wherever possible, replace constructs that match either generic_handle_irq(irq_find_mapping()) or generic_handle_irq(irq_linear_revmap()) to a
pinctrl: Bulk conversion to generic_handle_domain_irq()
Wherever possible, replace constructs that match either generic_handle_irq(irq_find_mapping()) or generic_handle_irq(irq_linear_revmap()) to a single call to generic_handle_domain_irq().
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Marc Zyngier <maz@kernel.org>
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#
76b7f8fa |
| 06-Jun-2021 |
Andy Shevchenko <andy.shevchenko@gmail.com> |
pinctrl: microchip-sgpio: Put fwnode in error case during ->probe()
device_for_each_child_node() bumps a reference counting of a returned variable. We have to balance it whenever we return to the ca
pinctrl: microchip-sgpio: Put fwnode in error case during ->probe()
device_for_each_child_node() bumps a reference counting of a returned variable. We have to balance it whenever we return to the caller.
Fixes: 7e5ea974e61c ("pinctrl: pinctrl-microchip-sgpio: Add pinctrl driver for Microsemi Serial GPIO") Cc: Lars Povlsen <lars.povlsen@microchip.com> Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/r/20210606191940.29312-1-andy.shevchenko@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Revision tags: v5.10.34, v5.4.116, v5.10.33, v5.12, v5.10.32, v5.10.31, v5.10.30, v5.10.27, v5.10.26, v5.10.25, v5.10.24, v5.10.23, v5.10.22, v5.10.21, v5.10.20, v5.10.19, v5.4.101, v5.10.18, v5.10.17, v5.11, v5.10.16, v5.10.15, v5.10.14 |
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#
5d5f2919 |
| 03-Feb-2021 |
Lars Povlsen <lars.povlsen@microchip.com> |
pinctrl: microchip-sgpio: Fix wrong register offset for IRQ trigger
This patch fixes using a wrong register offset when configuring an IRQ trigger type.
Fixes: be2dc859abd4 ("pinctrl: pinctrl-micro
pinctrl: microchip-sgpio: Fix wrong register offset for IRQ trigger
This patch fixes using a wrong register offset when configuring an IRQ trigger type.
Fixes: be2dc859abd4 ("pinctrl: pinctrl-microchip-sgpio: Add irq support (for sparx5)") Reported-by: Gustavo A. R. Silva <gustavoars@kernel.org> Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com> Reviewed-by: Gustavo A. R. Silva <gustavoars@kernel.org> Link: https://lore.kernel.org/r/20210203123825.611576-1-lars.povlsen@microchip.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Revision tags: v5.10 |
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#
be2dc859 |
| 09-Dec-2020 |
Lars Povlsen <lars.povlsen@microchip.com> |
pinctrl: pinctrl-microchip-sgpio: Add irq support (for sparx5)
This adds 'interrupt-controller' features for the signals available on the Microchip SGPIO controller, however only for controller vers
pinctrl: pinctrl-microchip-sgpio: Add irq support (for sparx5)
This adds 'interrupt-controller' features for the signals available on the Microchip SGPIO controller, however only for controller versions on the Sparx5 platform (or later).
Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com> Link: https://lore.kernel.org/r/20201209142753.683208-2-lars.povlsen@microchip.com [Select GPIOLIB_IRQCHIP in Kconfig] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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d05b7691 |
| 24-Nov-2020 |
Zou Wei <zou_wei@huawei.com> |
pinctrl: pinctrl-microchip-sgpio: Mark some symbols with static keyword
Fix the following sparse warnings:
drivers/pinctrl/pinctrl-microchip-sgpio.c:63:31: warning: symbol 'properties_luton' was no
pinctrl: pinctrl-microchip-sgpio: Mark some symbols with static keyword
Fix the following sparse warnings:
drivers/pinctrl/pinctrl-microchip-sgpio.c:63:31: warning: symbol 'properties_luton' was not declared. Should it be static? drivers/pinctrl/pinctrl-microchip-sgpio.c:68:31: warning: symbol 'properties_ocelot' was not declared. Should it be static? drivers/pinctrl/pinctrl-microchip-sgpio.c:73:31: warning: symbol 'properties_sparx5' was not declared. Should it be static?
Signed-off-by: Zou Wei <zou_wei@huawei.com> Link: https://lore.kernel.org/r/1606218173-3722-1-git-send-email-zou_wei@huawei.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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7e5ea974 |
| 13-Nov-2020 |
Lars Povlsen <lars.povlsen@microchip.com> |
pinctrl: pinctrl-microchip-sgpio: Add pinctrl driver for Microsemi Serial GPIO
This adds a pinctrl driver for the Microsemi/Microchip Serial GPIO (SGPIO) device used in various SoC's.
The driver is
pinctrl: pinctrl-microchip-sgpio: Add pinctrl driver for Microsemi Serial GPIO
This adds a pinctrl driver for the Microsemi/Microchip Serial GPIO (SGPIO) device used in various SoC's.
The driver is added as a pinctrl driver, albeit only having just GPIO support currently. The hardware supports other functions that will be added following.
Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com> Link: https://lore.kernel.org/r/20201113145151.68900-3-lars.povlsen@microchip.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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