treewide: Add SPDX license identifier - Makefile/Kconfig

Add SPDX license identifiers to all Make/Kconfig files which:

- Have no license information of any form

These files fall under the project

treewide: Add SPDX license identifier - Makefile/Kconfig

Add SPDX license identifiers to all Make/Kconfig files which:

- Have no license information of any form

These files fall under the project license, GPL v2 only. The resulting SPDX
license identifier is:

GPL-2.0-only

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

show more ...

bna: remove obsolete use of EXTRA_CFLAGS

EXTRA_CFLAGS should be used on the command line only.

Since EXTRA_CFLAGS here add only a non-existant path to compiler
include paths (by -I), remove EXTRA_C

bna: remove obsolete use of EXTRA_CFLAGS

EXTRA_CFLAGS should be used on the command line only.

Since EXTRA_CFLAGS here add only a non-existant path to compiler
include paths (by -I), remove EXTRA_CFLAGS completely.

Signed-off-by: Jiri Slaby <jslaby@suse.cz>
Signed-off-by: David S. Miller <davem@davemloft.net>

show more ...

bna: QLogic BR-series Adapters Driver Rebranding

Re-brand the BNA driver to QLogic.

Signed-off-by: Rasesh Mody <rasesh.mody@qlogic.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

bna: Add debugfs interface.

Change details:
- Add debugfs support to obtain firmware trace, saved firmware trace on
an IOC crash, driver info and read/write to registers.

- debugfs hierarchy:

bna: Add debugfs interface.

Change details:
- Add debugfs support to obtain firmware trace, saved firmware trace on
an IOC crash, driver info and read/write to registers.

- debugfs hierarchy:
bna/pci_dev:<pci_name>
where the pci_name corresponds to the one under /sys/bus/pci/drivers/bna

- Following are the new debugfs entries added:
fwtrc: collect current firmware trace.
fwsave: collect last saved fw trace as a result of firmware crash.
regwr: write one word to chip register
regrd: read one or more words from chip register.
drvinfo: collect the driver information.

Signed-off-by: Krishna Gudipati <kgudipat@brocade.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

show more ...

bna: ENET and Tx Rx Redesign Enablement

Change details:
This patch contains additional structure and function definition changes
that are required to enable the new msgq/enet/txrx redesign introduce

bna: ENET and Tx Rx Redesign Enablement

Change details:
This patch contains additional structure and function definition changes
that are required to enable the new msgq/enet/txrx redesign introduced
by the previous 4 patches.
- structure and function definition changes to header files as a result
of Ethport, Enet, IOCEth, Tx, Rx redesign.
- ethtool changes to use new enet function and definitions
- Set number of Tx and Rx queues bassed on underlying hardware. Define
separate macros for maximum and supported numbers of Tx and Rx queues
based on underlying hardware. Take VLAN header into account for MTU
calculation. Default to INTx mode when pci_enable_msix() fails. Set a
bit in Rx poll routine, check and wait for that bit to be cleared in
the cleanup routine before proceeding.
- The TX and Rx coalesce settings are programmed in steps of 5 us. The value
that are not divisible by 5 are rounded to the next lower number. This was
causing the value os 1 to 4 to be rounded to 0, which is an invalid setting.
When creating Rx and Tx object, we are currently assigning the default
values of Rx and Tx coalescing_timeo. If these values are changed in the
driver to a different value, the change is lost during such operations as
MTU change. In order to avoid that, pass the configured value of
coalescing_timeo before Rx and Tx object creation. Fix
bnad_tx_coalescing_timeo_set() so it applies to all the Tx objects.
- Reorg uninitialization path in case of pci_probe failure.
- Hardware clock setup changes to pass asic generation, port modes and
asic mode as part firmware boot parameters to firmware.
- FW mailbox interface changes to defined asic specific mailbox interfaces.
h/w mailbox interfaces take 8-bit FIDs and 2-bit port id for owner. Cleaned
up mailbox definitions and usage for new and old HW. Eliminated usage of
ASIC ID. MSI-X vector assignment and programming done by firmware. Fixed
host offsets for CPE/RME queue registers.
- Implement polling mechanism for FW ready to have poll mechanism replaces
the current interrupt based FW READY method. The timer based poll routine
in IOC will query the ioc_fwstate register to see if there is a state
change in FW, and sends the READY event. Removed infrastructure needed to
support mbox READY event from fw as well as IOC code.
- Move FW init to HW init. Handle the case where PCI mapping goes away when
IOCPF state machine is waiting for semaphore.
- Add IOC mbox call back to client indicating that the command is sent.

Signed-off-by: Rasesh Mody <rmody@brocade.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

show more ...

bna: MSGQ Implementation

Change details:
- Currently modules communicate with the FW using 32 byte command and
response register. This limits the size of the command and response
messages exc

bna: MSGQ Implementation

Change details:
- Currently modules communicate with the FW using 32 byte command and
response register. This limits the size of the command and response
messages exchanged with the FW to 32 bytes. We need a mechanism to
exchange the comamnds and responses exchange with FW that exceeds 32 bytes.

- MSGQ implementation provides that facility. It removes the assumption that
command/response queue size is precisely calculated to accommodate all
concurrent FW commands/responses. The queue depth is made variable now, defined
by a macro. A waiting command list is implemented to hold all the commands
when there is no place in the command queue. Callback is implemented for
each command entry to invoke the module posting the command, when there is
space in the command queue and the command was finally posted to the queue.
Module/Object information is embedded in the response for tracking purpose.

Signed-off-by: Rasesh Mody <rmody@brocade.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

show more ...

bna: Move the Brocade driver

Moves the Brocade driver into drivers/net/ethernet/brocade/ and make
the necessary Kconfig and Makefile changes.

CC: Rasesh Mody <rmody@brocade.com>
CC: Debashis Dutt <

bna: Move the Brocade driver

Moves the Brocade driver into drivers/net/ethernet/brocade/ and make
the necessary Kconfig and Makefile changes.

CC: Rasesh Mody <rmody@brocade.com>
CC: Debashis Dutt <ddutt@brocade.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>

show more ...

treewide: Add SPDX license identifier - Makefile/Kconfig

Add SPDX license identifiers to all Make/Kconfig files which:

- Have no license information of any form

These file

treewide: Add SPDX license identifier - Makefile/Kconfig

Add SPDX license identifiers to all Make/Kconfig files which:

- Have no license information of any form

These files fall under the project license, GPL v2 only. The resulting SPDX
license identifier is:

GPL-2.0-only

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

show more ...

bna: remove obsolete use of EXTRA_CFLAGS

EXTRA_CFLAGS should be used on the command line only.

Since EXTRA_CFLAGS here add only a non-existant path to compiler
include paths (by

bna: remove obsolete use of EXTRA_CFLAGS

EXTRA_CFLAGS should be used on the command line only.

Since EXTRA_CFLAGS here add only a non-existant path to compiler
include paths (by -I), remove EXTRA_CFLAGS completely.

Signed-off-by: Jiri Slaby <jslaby@suse.cz>
Signed-off-by: David S. Miller <davem@davemloft.net>

show more ...

bna: QLogic BR-series Adapters Driver Rebranding

Re-brand the BNA driver to QLogic.

Signed-off-by: Rasesh Mody <rasesh.mody@qlogic.com>
Signed-off-by: David S. Miller <davem@dav

bna: QLogic BR-series Adapters Driver Rebranding

Re-brand the BNA driver to QLogic.

Signed-off-by: Rasesh Mody <rasesh.mody@qlogic.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

show more ...

bna: Add debugfs interface.

Change details:
- Add debugfs support to obtain firmware trace, saved firmware trace on
an IOC crash, driver info and read/write to regi

bna: Add debugfs interface.

Change details:
- Add debugfs support to obtain firmware trace, saved firmware trace on
an IOC crash, driver info and read/write to registers.

- debugfs hierarchy:
bna/pci_dev:<pci_name>
where the pci_name corresponds to the one under /sys/bus/pci/drivers/bna

- Following are the new debugfs entries added:
fwtrc: collect current firmware trace.
fwsave: collect last saved fw trace as a result of firmware crash.
regwr: write one word to chip register
regrd: read one or more words from chip register.
drvinfo: collect the driver information.

Signed-off-by: Krishna Gudipati <kgudipat@brocade.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

show more ...

bna: ENET and Tx Rx Redesign Enablement

Change details:
This patch contains additional structure and function definition changes
that are required to enable the new msgq/enet/txrx re

bna: ENET and Tx Rx Redesign Enablement

Change details:
This patch contains additional structure and function definition changes
that are required to enable the new msgq/enet/txrx redesign introduced
by the previous 4 patches.
- structure and function definition changes to header files as a result
of Ethport, Enet, IOCEth, Tx, Rx redesign.
- ethtool changes to use new enet function and definitions
- Set number of Tx and Rx queues bassed on underlying hardware. Define
separate macros for maximum and supported numbers of Tx and Rx queues
based on underlying hardware. Take VLAN header into account for MTU
calculation. Default to INTx mode when pci_enable_msix() fails. Set a
bit in Rx poll routine, check and wait for that bit to be cleared in
the cleanup routine before proceeding.
- The TX and Rx coalesce settings are programmed in steps of 5 us. The value
that are not divisible by 5 are rounded to the next lower number. This was
causing the value os 1 to 4 to be rounded to 0, which is an invalid setting.
When creating Rx and Tx object, we are currently assigning the default
values of Rx and Tx coalescing_timeo. If these values are changed in the
driver to a different value, the change is lost during such operations as
MTU change. In order to avoid that, pass the configured value of
coalescing_timeo before Rx and Tx object creation. Fix
bnad_tx_coalescing_timeo_set() so it applies to all the Tx objects.
- Reorg uninitialization path in case of pci_probe failure.
- Hardware clock setup changes to pass asic generation, port modes and
asic mode as part firmware boot parameters to firmware.
- FW mailbox interface changes to defined asic specific mailbox interfaces.
h/w mailbox interfaces take 8-bit FIDs and 2-bit port id for owner. Cleaned
up mailbox definitions and usage for new and old HW. Eliminated usage of
ASIC ID. MSI-X vector assignment and programming done by firmware. Fixed
host offsets for CPE/RME queue registers.
- Implement polling mechanism for FW ready to have poll mechanism replaces
the current interrupt based FW READY method. The timer based poll routine
in IOC will query the ioc_fwstate register to see if there is a state
change in FW, and sends the READY event. Removed infrastructure needed to
support mbox READY event from fw as well as IOC code.
- Move FW init to HW init. Handle the case where PCI mapping goes away when
IOCPF state machine is waiting for semaphore.
- Add IOC mbox call back to client indicating that the command is sent.

Signed-off-by: Rasesh Mody <rmody@brocade.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

show more ...

bna: MSGQ Implementation

Change details:
- Currently modules communicate with the FW using 32 byte command and
response register. This limits the size of the command and response

bna: MSGQ Implementation

Change details:
- Currently modules communicate with the FW using 32 byte command and
response register. This limits the size of the command and response
messages exchanged with the FW to 32 bytes. We need a mechanism to
exchange the comamnds and responses exchange with FW that exceeds 32 bytes.

- MSGQ implementation provides that facility. It removes the assumption that
command/response queue size is precisely calculated to accommodate all
concurrent FW commands/responses. The queue depth is made variable now, defined
by a macro. A waiting command list is implemented to hold all the commands
when there is no place in the command queue. Callback is implemented for
each command entry to invoke the module posting the command, when there is
space in the command queue and the command was finally posted to the queue.
Module/Object information is embedded in the response for tracking purpose.

Signed-off-by: Rasesh Mody <rmody@brocade.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

show more ...

bna: Move the Brocade driver

Moves the Brocade driver into drivers/net/ethernet/brocade/ and make
the necessary Kconfig and Makefile changes.

CC: Rasesh Mody <rmody@brocade.com>

bna: Move the Brocade driver

Moves the Brocade driver into drivers/net/ethernet/brocade/ and make
the necessary Kconfig and Makefile changes.

CC: Rasesh Mody <rmody@brocade.com>
CC: Debashis Dutt <ddutt@brocade.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>

show more ...