#
989f405a |
| 03-Jun-2019 |
Rasmus Villemoes <rasmus.villemoes@prevas.dk> |
net: dsa: mv88e6xxx: fix comments and macro names in mv88e6390_g1_mgmt_rsvd2cpu
The macros have an extraneous '800' (after 0180C2 there should be just six nibbles, with X representing one), while th
net: dsa: mv88e6xxx: fix comments and macro names in mv88e6390_g1_mgmt_rsvd2cpu
The macros have an extraneous '800' (after 0180C2 there should be just six nibbles, with X representing one), while the comments have interchanged c2 and 80 and an extra :00.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
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Revision tags: v5.1.6 |
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#
2874c5fd |
| 27-May-2019 |
Thomas Gleixner <tglx@linutronix.de> |
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152
Based on 1 normalized pattern(s):
this program is free software you can redistribute it and or modify it under the terms of th
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152
Based on 1 normalized pattern(s):
this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version
extracted by the scancode license scanner the SPDX license identifier
GPL-2.0-or-later
has been chosen to replace the boilerplate/reference in 3029 file(s).
Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070032.746973796@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Revision tags: v5.1.5, v5.1.4, v5.1.3, v5.1.2, v5.1.1, v5.0.14, v5.1, v5.0.13, v5.0.12, v5.0.11, v5.0.10, v5.0.9, v5.0.8, v5.0.7, v5.0.6, v5.0.5, v5.0.4, v5.0.3, v4.19.29, v5.0.2, v4.19.28, v5.0.1, v4.19.27, v5.0, v4.19.26, v4.19.25, v4.19.24, v4.19.23, v4.19.22, v4.19.21, v4.19.20, v4.19.19, v4.19.18, v4.19.17, v4.19.16, v4.19.15, v4.19.14, v4.19.13, v4.19.12, v4.19.11, v4.19.10, v4.19.9, v4.19.8, v4.19.7, v4.19.6, v4.19.5, v4.19.4, v4.18.20, v4.19.3, v4.18.19, v4.19.2 |
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#
a9049ff9 |
| 10-Nov-2018 |
Andrew Lunn <andrew@lunn.ch> |
net: dsa: mv88e6xxx: Fix clearing of stats counters
The mv88e6161 would sometime fail to probe with a timeout waiting for the switch to complete an operation. This operation is supposed to clear the
net: dsa: mv88e6xxx: Fix clearing of stats counters
The mv88e6161 would sometime fail to probe with a timeout waiting for the switch to complete an operation. This operation is supposed to clear the statistics counters. However, due to a read/modify/write, without the needed mask, the operation actually carried out was more random, with invalid parameters, resulting in the switch not responding. We need to preserve the histogram mode bits, so apply a mask to keep them.
Reported-by: Chris Healy <Chris.Healy@zii.aero> Fixes: 40cff8fca9e3 ("net: dsa: mv88e6xxx: Fix stats histogram mode") Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
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Revision tags: v4.18.18, v4.18.17, v4.19.1, v4.19, v4.18.16, v4.18.15, v4.18.14, v4.18.13, v4.18.12, v4.18.11, v4.18.10, v4.18.9, v4.18.7, v4.18.6, v4.18.5, v4.17.18, v4.18.4, v4.18.3, v4.17.17, v4.18.2, v4.17.16, v4.17.15, v4.18.1, v4.18, v4.17.14, v4.17.13, v4.17.12, v4.17.11, v4.17.10, v4.17.9, v4.17.8, v4.17.7, v4.17.6, v4.17.5, v4.17.4, v4.17.3, v4.17.2, v4.17.1, v4.17 |
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#
93e18d61 |
| 11-May-2018 |
Vivien Didelot <vivien.didelot@savoirfairelinux.com> |
net: dsa: mv88e6xxx: add IEEE and IP mapping ops
All Marvell switch families except 88E6390 have direct registers in Global 1 for IEEE and IP priorities override mapping. The 88E6390 uses indirect t
net: dsa: mv88e6xxx: add IEEE and IP mapping ops
All Marvell switch families except 88E6390 have direct registers in Global 1 for IEEE and IP priorities override mapping. The 88E6390 uses indirect tables instead.
Add .ieee_pri_map and .ip_pri_map ops to distinct that and call them from a mv88e6xxx_pri_setup helper. Only non-6390 are concerned ATM.
Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
408d2deb |
| 11-May-2018 |
Vivien Didelot <vivien.didelot@savoirfairelinux.com> |
net: dsa: mv88e6xxx: use helper for 6390 histogram
The Marvell 88E6390 model has its histogram mode bits moved in the Global 1 Control 2 register. Use the previously introduced mv88e6xxx_g1_ctl2_mas
net: dsa: mv88e6xxx: use helper for 6390 histogram
The Marvell 88E6390 model has its histogram mode bits moved in the Global 1 Control 2 register. Use the previously introduced mv88e6xxx_g1_ctl2_mask helper to set them.
At the same time complete the documentation of the said register.
Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
9e5baf9b |
| 09-May-2018 |
Vivien Didelot <vivien.didelot@savoirfairelinux.com> |
net: dsa: mv88e6xxx: add RMU disable op
The RMU mode bits moved a lot within the Global Control 2 register of the Marvell switch families. Add an .rmu_disable op to support at least 3 known alternat
net: dsa: mv88e6xxx: add RMU disable op
The RMU mode bits moved a lot within the Global Control 2 register of the Marvell switch families. Add an .rmu_disable op to support at least 3 known alternatives.
Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
23c98919 |
| 09-May-2018 |
Vivien Didelot <vivien.didelot@savoirfairelinux.com> |
net: dsa: mv88e6xxx: set device number
All Marvell switches supported by mv88e6xxx have to set their device number in the Global Control 2 register. Extract this in a read then write function, calle
net: dsa: mv88e6xxx: set device number
All Marvell switches supported by mv88e6xxx have to set their device number in the Global Control 2 register. Extract this in a read then write function, called from the device mapping setup code.
Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
02317e68 |
| 09-May-2018 |
Vivien Didelot <vivien.didelot@savoirfairelinux.com> |
net: dsa: mv88e6xxx: add a cascade port op
Only the 88E6185 family has bits 15:12 Cascade Port bits in the Global Control 2 register. Hence inconsistent values are actually written in this register
net: dsa: mv88e6xxx: add a cascade port op
Only the 88E6185 family has bits 15:12 Cascade Port bits in the Global Control 2 register. Hence inconsistent values are actually written in this register for other families.
Add a .set_cascade_port operation to isolate the 88E6185 case, and call it from the device mapping setup function.
Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
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Revision tags: v4.16, v4.15, v4.13.16, v4.14 |
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#
40cff8fc |
| 09-Nov-2017 |
Andrew Lunn <andrew@lunn.ch> |
net: dsa: mv88e6xxx: Fix stats histogram mode
The statistics histogram mode was not being explicitly initialized on devices other than the 6390 family. Clearing the statistics then overwrote the def
net: dsa: mv88e6xxx: Fix stats histogram mode
The statistics histogram mode was not being explicitly initialized on devices other than the 6390 family. Clearing the statistics then overwrote the default setting, setting the histogram to a reserved mode.
Explicitly set the histogram mode for all devices. Change the statistics clear into a read/modify/write, and since it is now more complex, move it into global1.c.
Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
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Revision tags: v4.13.5, v4.13, v4.12 |
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#
57d1ef38 |
| 15-Jun-2017 |
Vivien Didelot <vivien.didelot@savoirfairelinux.com> |
net: dsa: mv88e6xxx: prefix Global Stats macros
Prefix and document the Global Stats Operation and Counter registers and give them a clear 16-bit registers representation.
Signed-off-by: Vivien Did
net: dsa: mv88e6xxx: prefix Global Stats macros
Prefix and document the Global Stats Operation and Counter registers and give them a clear 16-bit registers representation.
Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
101515c8 |
| 15-Jun-2017 |
Vivien Didelot <vivien.didelot@savoirfairelinux.com> |
net: dsa: mv88e6xxx: prefix Global Monitor Control macros
Prefix and document the Global Monitor Control Register macros (which became the Global Monitor & MGMT Control Register with 88E6390) and gi
net: dsa: mv88e6xxx: prefix Global Monitor Control macros
Prefix and document the Global Monitor Control Register macros (which became the Global Monitor & MGMT Control Register with 88E6390) and give a clear 16-bit registers representation.
Use __bf_shf to get the shift value at compile time instead of adding new defined macros for it.
Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
d77f4321 |
| 15-Jun-2017 |
Vivien Didelot <vivien.didelot@savoirfairelinux.com> |
net: dsa: mv88e6xxx: prefix Global Control macros
Prefix and document the Global Control and Control 2 registers macros and give a clear 16-bit registers representation.
Signed-off-by: Vivien Didel
net: dsa: mv88e6xxx: prefix Global Control macros
Prefix and document the Global Control and Control 2 registers macros and give a clear 16-bit registers representation.
Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
4b0c4817 |
| 15-Jun-2017 |
Vivien Didelot <vivien.didelot@savoirfairelinux.com> |
net: dsa: mv88e6xxx: prefix Global Switch MAC macros
Prefix and document the Global Switch MAC Address Register macros and give clear 16-bit register representation.
At the same time, move mv88e6xx
net: dsa: mv88e6xxx: prefix Global Switch MAC macros
Prefix and document the Global Switch MAC Address Register macros and give clear 16-bit register representation.
At the same time, move mv88e6xxx_g1_set_switch_mac in global1.c, where it belongs.
Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
82466921 |
| 15-Jun-2017 |
Vivien Didelot <vivien.didelot@savoirfairelinux.com> |
net: dsa: mv88e6xxx: prefix Global Status macros
Prefix and document the Global Status Register macros and give clear 16-bit register representation.
Signed-off-by: Vivien Didelot <vivien.didelot@s
net: dsa: mv88e6xxx: prefix Global Status macros
Prefix and document the Global Status Register macros and give clear 16-bit register representation.
Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
4d5f2ba7 |
| 02-Jun-2017 |
Vivien Didelot <vivien.didelot@savoirfairelinux.com> |
net: dsa: mv88e6xxx: rename chip header
The mv88e6xxx.h is meant to contains the chip structures and data. Rename it to chip.h, as for other source/header pairs of the driver.
At the same time, ens
net: dsa: mv88e6xxx: rename chip header
The mv88e6xxx.h is meant to contains the chip structures and data. Rename it to chip.h, as for other source/header pairs of the driver.
At the same time, ensure that relative header inclusions are separated by a newline and sorted alphabetically.
Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Revision tags: v4.10.17, v4.10.16, v4.10.15, v4.10.14, v4.10.13, v4.10.12, v4.10.11, v4.10.10, v4.10.9, v4.10.8, v4.10.7 |
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#
4333d619 |
| 28-Mar-2017 |
Vivien Didelot <vivien.didelot@savoirfairelinux.com> |
net: dsa: fix copyright holder
I do not hold the copyright of the DSA core and drivers source files, since these changes have been written as an initiative of my day job. Fix this.
Signed-off-by: V
net: dsa: fix copyright holder
I do not hold the copyright of the DSA core and drivers source files, since these changes have been written as an initiative of my day job. Fix this.
Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Revision tags: v4.10.6, v4.10.5, v4.10.4, v4.10.3, v4.10.2, v4.10.1, v4.10, v4.9 |
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#
a199d8b6 |
| 05-Dec-2016 |
Vivien Didelot <vivien.didelot@savoirfairelinux.com> |
net: dsa: mv88e6xxx: add PPU operations
Some Marvell chips can enable/disable the PPU on demand. This is needed to access the PHY registers when there is no indirection mechanism.
Add two new ppu_e
net: dsa: mv88e6xxx: add PPU operations
Some Marvell chips can enable/disable the PPU on demand. This is needed to access the PHY registers when there is no indirection mechanism.
Add two new ppu_enable and ppu_disable ops to describe this and finally get rid of the MV88E6XXX_FLAG_PPU* flags.
Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
17e708ba |
| 05-Dec-2016 |
Vivien Didelot <vivien.didelot@savoirfairelinux.com> |
net: dsa: mv88e6xxx: add a soft reset operation
Marvell chips have different way to issue a software reset.
Old chips (such as 88E6060) have a reset bit in an ATU control register.
Newer chips mov
net: dsa: mv88e6xxx: add a soft reset operation
Marvell chips have different way to issue a software reset.
Old chips (such as 88E6060) have a reset bit in an ATU control register.
Newer chips moved this bit in a Global control register. Chips with controllable PPU should reset the PPU when resetting the switch.
Add a new reset operation to implement these differences and introduce a mv88e6xxx_software_reset() helper to wrap it conveniently.
Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
6e55f698 |
| 02-Dec-2016 |
Andrew Lunn <andrew@lunn.ch> |
net: dsa: mv88e6xxx: Reserved Management frames to CPU
Older devices have a couple of registers in global2. The mv88e6390 family has a single register in global1 behind which hides similar configura
net: dsa: mv88e6xxx: Reserved Management frames to CPU
Older devices have a couple of registers in global2. The mv88e6390 family has a single register in global1 behind which hides similar configuration. Implement and op for this.
Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
33641994 |
| 02-Dec-2016 |
Andrew Lunn <andrew@lunn.ch> |
net: dsa: mv88e6xxx: Monitor and Management tables
The mv88e6390 changes the monitor control register into the Monitor and Management control, which is an indirection register to various registers.
net: dsa: mv88e6xxx: Monitor and Management tables
The mv88e6390 changes the monitor control register into the Monitor and Management control, which is an indirection register to various registers.
Add ops to set the CPU port and the ingress/egress port for both register layouts, to global1
Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
7f9ef3af |
| 21-Nov-2016 |
Andrew Lunn <andrew@lunn.ch> |
net: dsa: mv88e6xxx: Move g1 stats code in global1.[ch]
Move the stats functions which access global 1 registers into global1.c.
Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S.
net: dsa: mv88e6xxx: Move g1 stats code in global1.[ch]
Move the stats functions which access global 1 registers into global1.c.
Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
de227387 |
| 21-Nov-2016 |
Andrew Lunn <andrew@lunn.ch> |
net: dsa: mv88e6xxx: Add mv88e6390 statistics unit init
The statistics unit on the mv88e6390 needs the histogram mode to be configured in a different register compared to other devices. Add an ops t
net: dsa: mv88e6xxx: Add mv88e6390 statistics unit init
The statistics unit on the mv88e6390 needs the histogram mode to be configured in a different register compared to other devices. Add an ops to do this.
Signed-off-by: Andrew Lunn <andrew@lunn.ch> v2: Rename to mv88e6390_g1_stats_set_histogram Move into global1.c Signed-off-by: David S. Miller <davem@davemloft.net>
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#
79523473 |
| 21-Nov-2016 |
Andrew Lunn <andrew@lunn.ch> |
net: dsa: mv88e6xxx: Add mv88e6390 stats snapshot operation
The MV88E6390 has a control register for what the histogram statistics actually contain. This means the stat_snapshot method should not se
net: dsa: mv88e6xxx: Add mv88e6390 stats snapshot operation
The MV88E6390 has a control register for what the histogram statistics actually contain. This means the stat_snapshot method should not set this information. So implement the 6390 stats_snapshot function without these bits.
Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
a605a0fe |
| 21-Nov-2016 |
Andrew Lunn <andrew@lunn.ch> |
net: dsa: mv88e6xxx: Abstract stats_snapshot into ops structure
Taking a stats snapshot differs between same families. Abstract this into an ops member. At the same time, move the code into global1.
net: dsa: mv88e6xxx: Abstract stats_snapshot into ops structure
Taking a stats snapshot differs between same families. Abstract this into an ops member. At the same time, move the code into global1.[ch], since the registers are in the global1 range.
Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
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Revision tags: openbmc-4.4-20161121-1, v4.4.33, v4.4.32, v4.4.31, v4.4.30, v4.4.29, v4.4.28, v4.4.27, v4.7.10, openbmc-4.4-20161021-1, v4.7.9, v4.4.26, v4.7.8, v4.4.25, v4.4.24, v4.7.7, v4.8, v4.4.23, v4.7.6 |
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#
a935c052 |
| 29-Sep-2016 |
Vivien Didelot <vivien.didelot@savoirfairelinux.com> |
net: dsa: mv88e6xxx: add global1 helpers
The Global (1) internal SMI device is an extended set of registers containing ATU, PPU, VTU, STU, etc.
It is present on every switches, usually at SMI addre
net: dsa: mv88e6xxx: add global1 helpers
The Global (1) internal SMI device is an extended set of registers containing ATU, PPU, VTU, STU, etc.
It is present on every switches, usually at SMI address 0x1B. But old models such as 88E6060 access it at address 0xF, thus using REG_GLOBAL is erroneous.
Add a global1_addr info member used by mv88e6xxx_g1_{read,write} and mv88e6xxx_g1_wait helpers in a new global1.c file.
This patch finally removes _mv88e6xxx_reg_{read,write}, in favor on the appropriate helpers. No functional changes here.
Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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