Revision tags: v6.6.25, v6.6.24, v6.6.23, v6.6.16, v6.6.15, v6.6.14, v6.6.13, v6.6.12, v6.6.11, v6.6.10, v6.6.9, v6.6.8, v6.6.7, v6.6.6, v6.6.5, v6.6.4, v6.6.3, v6.6.2, v6.5.11, v6.6.1, v6.5.10, v6.6, v6.5.9, v6.5.8, v6.5.7, v6.5.6, v6.5.5, v6.5.4, v6.5.3, v6.5.2, v6.1.51, v6.5.1, v6.1.50, v6.5, v6.1.49, v6.1.48, v6.1.46, v6.1.45, v6.1.44, v6.1.43, v6.1.42, v6.1.41, v6.1.40, v6.1.39, v6.1.38, v6.1.37, v6.1.36, v6.4, v6.1.35, v6.1.34, v6.1.33, v6.1.32, v6.1.31, v6.1.30, v6.1.29 |
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#
9816d859 |
| 15-May-2023 |
Uwe Kleine-König <u.kleine-koenig@pengutronix.de> |
mfd: Switch i2c drivers back to use .probe()
After commit b8a1a4cd5a98 ("i2c: Provide a temporary .probe_new() call-back type"), all drivers being converted to .probe_new() and then 03c835f498b5 ("i
mfd: Switch i2c drivers back to use .probe()
After commit b8a1a4cd5a98 ("i2c: Provide a temporary .probe_new() call-back type"), all drivers being converted to .probe_new() and then 03c835f498b5 ("i2c: Switch .probe() to not take an id parameter") convert back to (the new) .probe() to be able to eventually drop .probe_new() from struct i2c_driver.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Link: https://lore.kernel.org/r/20230515182752.10050-1-u.kleine-koenig@pengutronix.de Signed-off-by: Lee Jones <lee@kernel.org>
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Revision tags: v6.1.28, v6.1.27, v6.1.26, v6.3, v6.1.25, v6.1.24, v6.1.23, v6.1.22, v6.1.21, v6.1.20, v6.1.19, v6.1.18, v6.1.17, v6.1.16, v6.1.15, v6.1.14 |
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cf973869 |
| 24-Feb-2023 |
Nick Alcock <nick.alcock@oracle.com> |
mfd: intel_soc_pmic_crc: Remove MODULE_LICENSE in non-modules
Since commit 8b41fc4454e ("kbuild: create modules.builtin without Makefile.modbuiltin or tristate.conf"), MODULE_LICENSE declarations ar
mfd: intel_soc_pmic_crc: Remove MODULE_LICENSE in non-modules
Since commit 8b41fc4454e ("kbuild: create modules.builtin without Makefile.modbuiltin or tristate.conf"), MODULE_LICENSE declarations are used to identify modules. As a consequence, uses of the macro in non-modules will cause modprobe to misidentify their containing object file as a module when it is not (false positives), and modprobe might succeed rather than failing with a suitable error message.
So remove it in the files in this commit, none of which can be built as modules.
Suggested-by: Luis Chamberlain <mcgrof@kernel.org> Signed-off-by: Nick Alcock <nick.alcock@oracle.com> Reviewed-by: Andy Shevchenko <andy@kernel.org> Signed-off-by: Lee Jones <lee@kernel.org> Link: https://lore.kernel.org/r/20230224150811.80316-5-nick.alcock@oracle.com
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Revision tags: v6.1.13, v6.2, v6.1.12, v6.1.11, v6.1.10, v6.1.9, v6.1.8, v6.1.7, v6.1.6, v6.1.5, v6.0.19, v6.0.18, v6.1.4, v6.1.3, v6.0.17, v6.1.2, v6.0.16, v6.1.1, v6.0.15, v6.0.14, v6.0.13, v6.1, v6.0.12, v6.0.11, v6.0.10, v5.15.80, v6.0.9, v5.15.79, v6.0.8, v5.15.78, v6.0.7, v5.15.77, v5.15.76, v6.0.6, v6.0.5, v5.15.75, v6.0.4, v6.0.3, v6.0.2, v5.15.74, v5.15.73, v6.0.1, v5.15.72, v6.0, v5.15.71, v5.15.70, v5.15.69, v5.15.68, v5.15.67, v5.15.66, v5.15.65, v5.15.64, v5.15.63, v5.15.62, v5.15.61, v5.15.60, v5.15.59 |
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03f271b0 |
| 01-Aug-2022 |
Andy Shevchenko <andriy.shevchenko@linux.intel.com> |
mfd: intel_soc_pmic_crc: Update the copyright year
Update the copyright year to be 2012-2014, 2022.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Tested-by: Hans de Goede <hdeg
mfd: intel_soc_pmic_crc: Update the copyright year
Update the copyright year to be 2012-2014, 2022.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Tested-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Lee Jones <lee@kernel.org> Link: https://lore.kernel.org/r/20220801114211.36267-10-andriy.shevchenko@linux.intel.com
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39c8980c |
| 01-Aug-2022 |
Andy Shevchenko <andriy.shevchenko@linux.intel.com> |
mfd: intel_soc_pmic_crc: Replace intel_soc_pmic with crystal_cove
To reflect the point that this driver is only for one type of the PMICs, replace intel_soc_pmic with crystal_cove (avoid using crc f
mfd: intel_soc_pmic_crc: Replace intel_soc_pmic with crystal_cove
To reflect the point that this driver is only for one type of the PMICs, replace intel_soc_pmic with crystal_cove (avoid using crc for possible namespace collisions with CRC library APIs).
Note, also rename the driver name since we don't expect any user that enumerates by it, only ACPI known so far.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Tested-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Lee Jones <lee@kernel.org> Link: https://lore.kernel.org/r/20220801114211.36267-9-andriy.shevchenko@linux.intel.com
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0c602c7f |
| 01-Aug-2022 |
Andy Shevchenko <andriy.shevchenko@linux.intel.com> |
mfd: intel_soc_pmic_crc: Convert driver to use ->probe_new()
Use the ->probe_new() callback.
The driver does not use const struct i2c_device_id * argument, so convert it to utilise the simplified I
mfd: intel_soc_pmic_crc: Convert driver to use ->probe_new()
Use the ->probe_new() callback.
The driver does not use const struct i2c_device_id * argument, so convert it to utilise the simplified I²C driver registration.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Tested-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Lee Jones <lee@kernel.org> Link: https://lore.kernel.org/r/20220801114211.36267-8-andriy.shevchenko@linux.intel.com
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09c4e702 |
| 01-Aug-2022 |
Andy Shevchenko <andriy.shevchenko@linux.intel.com> |
mfd: intel_soc_pmic_crc: Drop redundant ACPI_PTR() and ifdeffery
The driver depends on ACPI, ACPI_PTR() resolution is always the same. Otherwise a compiler may produce a warning.
That said, the rul
mfd: intel_soc_pmic_crc: Drop redundant ACPI_PTR() and ifdeffery
The driver depends on ACPI, ACPI_PTR() resolution is always the same. Otherwise a compiler may produce a warning.
That said, the rule of thumb either ugly ifdeffery with ACPI_PTR or none should be used in a driver.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Tested-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Lee Jones <lee@kernel.org> Link: https://lore.kernel.org/r/20220801114211.36267-7-andriy.shevchenko@linux.intel.com
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e1efbc8e |
| 01-Aug-2022 |
Andy Shevchenko <andriy.shevchenko@linux.intel.com> |
mfd: intel_soc_pmic_crc: Switch from CONFIG_PM_SLEEP guards to pm_sleep_ptr() etc
Letting the compiler remove these functions when the kernel is built without CONFIG_PM_SLEEP support is simpler and
mfd: intel_soc_pmic_crc: Switch from CONFIG_PM_SLEEP guards to pm_sleep_ptr() etc
Letting the compiler remove these functions when the kernel is built without CONFIG_PM_SLEEP support is simpler and less error prone than the use of #ifdef based kernel configuration guards.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Tested-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Lee Jones <lee@kernel.org> Link: https://lore.kernel.org/r/20220801114211.36267-6-andriy.shevchenko@linux.intel.com
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4b74ec58 |
| 01-Aug-2022 |
Andy Shevchenko <andriy.shevchenko@linux.intel.com> |
mfd: intel_soc_pmic_crc: Convert to use i2c_get/set_clientdata()
We have the specific helpers for I2C device to set and get its driver data. Convert driver to use them instead of open coded variants
mfd: intel_soc_pmic_crc: Convert to use i2c_get/set_clientdata()
We have the specific helpers for I2C device to set and get its driver data. Convert driver to use them instead of open coded variants.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Tested-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Lee Jones <lee@kernel.org> Link: https://lore.kernel.org/r/20220801114211.36267-5-andriy.shevchenko@linux.intel.com
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cae02b7a |
| 01-Aug-2022 |
Andy Shevchenko <andriy.shevchenko@linux.intel.com> |
mfd: intel_soc_pmic_crc: Use devm_regmap_add_irq_chip()
Use devm_regmap_add_irq_chip() to simplify the code.
While at it, replace -1 magic parameter by PLATFORM_DEVID_NONE when calling mfd_add_devi
mfd: intel_soc_pmic_crc: Use devm_regmap_add_irq_chip()
Use devm_regmap_add_irq_chip() to simplify the code.
While at it, replace -1 magic parameter by PLATFORM_DEVID_NONE when calling mfd_add_devices().
Note, the mfd_add_devices() left in non-devm variant here due to potentially increased churn while wrapping pwm_remove_table().
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Tested-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Lee Jones <lee@kernel.org> Link: https://lore.kernel.org/r/20220801114211.36267-4-andriy.shevchenko@linux.intel.com
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5a30b210 |
| 01-Aug-2022 |
Andy Shevchenko <andriy.shevchenko@linux.intel.com> |
mfd: intel_soc_pmic_crc: Merge Intel PMIC core to crc
The core part is misleading since its only purpose to serve Crystal Cove PMIC, although for couple of different platforms. Merge core part into
mfd: intel_soc_pmic_crc: Merge Intel PMIC core to crc
The core part is misleading since its only purpose to serve Crystal Cove PMIC, although for couple of different platforms. Merge core part into crc one.
Advantages among others are: - speed up a compilation and build - decreasing the code base - reducing noise in the namespace by making some data static and const
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Tested-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Lee Jones <lee@kernel.org> Link: https://lore.kernel.org/r/20220801114211.36267-2-andriy.shevchenko@linux.intel.com
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Revision tags: v5.19, v5.15.58, v5.15.57, v5.15.56, v5.15.55, v5.15.54, v5.15.53, v5.15.52, v5.15.51, v5.15.50, v5.15.49, v5.15.48, v5.15.47, v5.15.46, v5.15.45, v5.15.44, v5.15.43, v5.15.42, v5.18, v5.15.41, v5.15.40, v5.15.39, v5.15.38, v5.15.37, v5.15.36, v5.15.35, v5.15.34, v5.15.33, v5.15.32, v5.15.31, v5.17, v5.15.30, v5.15.29, v5.15.28, v5.15.27, v5.15.26, v5.15.25, v5.15.24, v5.15.23, v5.15.22, v5.15.21, v5.15.20, v5.15.19, v5.15.18, v5.15.17, v5.4.173, v5.15.16, v5.15.15, v5.16 |
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#
50904e9b |
| 25-Dec-2021 |
Hans de Goede <hdegoede@redhat.com> |
mfd: intel_soc_pmic_crc: Add crystal_cove_charger cell to BYT cells
The Crystal Cove PMIC has a pin which can be used to connect the IRQ of an external charger IC. On some boards this is used and we
mfd: intel_soc_pmic_crc: Add crystal_cove_charger cell to BYT cells
The Crystal Cove PMIC has a pin which can be used to connect the IRQ of an external charger IC. On some boards this is used and we need to have a cell for this, with a driver which creates its own irqchip with a single IRQ for the charger driver to consume.
The charger driver cannot directly consume the IRQ from the MFD level irqchip because the PMIC has 2 levels of interrupts and the second level interrupt status register, which is handled by the cell drivers, needs to have the IRQ acked to avoid an IRQ storm.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Link: https://lore.kernel.org/r/20211225115509.94891-3-hdegoede@redhat.com
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4946d58d |
| 25-Dec-2021 |
Hans de Goede <hdegoede@redhat.com> |
mfd: intel_soc_pmic_crc: Sort cells by IRQ order
The cells for the Crystal Cove PMIC are already mostly sorted by function / IRQ order. Move the ADC cell so that they are fully sorted.
Also move so
mfd: intel_soc_pmic_crc: Sort cells by IRQ order
The cells for the Crystal Cove PMIC are already mostly sorted by function / IRQ order. Move the ADC cell so that they are fully sorted.
Also move some of the resource definitions so that their order matches the (new) order of the cells.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Link: https://lore.kernel.org/r/20211225115509.94891-2-hdegoede@redhat.com
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Revision tags: v5.15.10, v5.15.9, v5.15.8, v5.15.7, v5.15.6, v5.15.5, v5.15.4, v5.15.3, v5.15.2, v5.15.1, v5.15, v5.14.14, v5.14.13, v5.14.12, v5.14.11, v5.14.10, v5.14.9, v5.14.8, v5.14.7, v5.14.6, v5.10.67, v5.10.66, v5.14.5, v5.14.4, v5.10.65, v5.14.3, v5.10.64, v5.14.2, v5.10.63, v5.14.1, v5.10.62, v5.14, v5.10.61, v5.10.60, v5.10.53, v5.10.52, v5.10.51, v5.10.50, v5.10.49, v5.13, v5.10.46, v5.10.43, v5.10.42, v5.10.41, v5.10.40, v5.10.39, v5.4.119, v5.10.36, v5.10.35, v5.10.34, v5.4.116, v5.10.33, v5.12, v5.10.32, v5.10.31, v5.10.30, v5.10.27, v5.10.26, v5.10.25, v5.10.24, v5.10.23, v5.10.22, v5.10.21, v5.10.20, v5.10.19, v5.4.101, v5.10.18, v5.10.17, v5.11, v5.10.16, v5.10.15, v5.10.14, v5.10, v5.8.17, v5.8.16, v5.8.15, v5.9, v5.8.14, v5.8.13, v5.8.12, v5.8.11 |
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bf4cceb6 |
| 22-Sep-2020 |
Rikard Falkeborn <rikard.falkeborn@gmail.com> |
mfd: intel: Constify static struct resource
Constify a number of static struct resource. The only usage of the structs are to assign their address to the resources field in the mfd_cell struct. This
mfd: intel: Constify static struct resource
Constify a number of static struct resource. The only usage of the structs are to assign their address to the resources field in the mfd_cell struct. This allows the compiler to put them in read-only memory. Done with the help of Coccinelle.
Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
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Revision tags: v5.8.10, v5.8.9, v5.8.8, v5.8.7, v5.8.6, v5.4.62, v5.8.5, v5.8.4, v5.4.61, v5.8.3, v5.4.60, v5.8.2, v5.4.59, v5.8.1, v5.4.58, v5.4.57, v5.4.56, v5.8, v5.7.12, v5.4.55, v5.7.11, v5.4.54, v5.7.10, v5.4.53, v5.4.52, v5.7.9, v5.7.8, v5.4.51, v5.4.50, v5.7.7, v5.4.49, v5.7.6, v5.7.5, v5.4.48, v5.7.4, v5.7.3, v5.4.47, v5.4.46, v5.7.2, v5.4.45, v5.7.1, v5.4.44, v5.7, v5.4.43, v5.4.42, v5.4.41, v5.4.40, v5.4.39, v5.4.38, v5.4.37, v5.4.36, v5.4.35, v5.4.34, v5.4.33, v5.4.32, v5.4.31, v5.4.30, v5.4.29, v5.6, v5.4.28, v5.4.27, v5.4.26, v5.4.25, v5.4.24, v5.4.23, v5.4.22, v5.4.21, v5.4.20, v5.4.19, v5.4.18, v5.4.17, v5.4.16, v5.5, v5.4.15, v5.4.14, v5.4.13, v5.4.12, v5.4.11, v5.4.10, v5.4.9, v5.4.8, v5.4.7, v5.4.6, v5.4.5, v5.4.4, v5.4.3, v5.3.15, v5.4.2, v5.4.1, v5.3.14, v5.4, v5.3.13, v5.3.12, v5.3.11, v5.3.10, v5.3.9, v5.3.8 |
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#
36f1b26b |
| 24-Oct-2019 |
Hans de Goede <hdegoede@redhat.com> |
mfd: intel_soc_pmic_crc: Add "cht_crystal_cove_pmic" cell to CHT cells
Add a "cht_crystal_cove_pmic" cell to the cells for the Cherry Trail variant of the Crystal Cove PMIC. Adding this cell enables
mfd: intel_soc_pmic_crc: Add "cht_crystal_cove_pmic" cell to CHT cells
Add a "cht_crystal_cove_pmic" cell to the cells for the Cherry Trail variant of the Crystal Cove PMIC. Adding this cell enables / hooks-up the new Cherry Trail Crystal Cove PMIC OpRegion driver.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
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ed852cde |
| 24-Oct-2019 |
Hans de Goede <hdegoede@redhat.com> |
ACPI / PMIC: Add byt prefix to Crystal Cove PMIC OpRegion driver
Our current Crystal Cove OpRegion driver is only valid for the Crystal Cove PMIC variant found on Bay Trail (BYT) boards, Cherry Trai
ACPI / PMIC: Add byt prefix to Crystal Cove PMIC OpRegion driver
Our current Crystal Cove OpRegion driver is only valid for the Crystal Cove PMIC variant found on Bay Trail (BYT) boards, Cherry Trail (CHT) based boards use another variant.
At least the regulator registers are different on CHT and these registers are one of the things controlled by the custom PMIC OpRegion.
Commit 4d9ed62ab142 ("mfd: intel_soc_pmic: Export separate mfd-cell configs for BYT and CHT") has disabled the intel_pmic_crc.c code for CHT devices by removing the "crystal_cove_pmic" MFD cell on CHT devices.
This commit renames the intel_pmic_crc.c driver and the cell to be prefixed with "byt" to indicate that this code is for BYT devices only.
This is a preparation patch for adding a separate PMIC OpRegion driver for the CHT variant of the Crystal Cove PMIC (sometimes called Crystal Cove Plus in Android kernel sources).
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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Revision tags: v5.3.7, v5.3.6, v5.3.5, v5.3.4, v5.3.3, v5.3.2, v5.3.1, v5.3, v5.2.14, v5.3-rc8, v5.2.13, v5.2.12, v5.2.11, v5.2.10, v5.2.9, v5.2.8, v5.2.7, v5.2.6, v5.2.5, v5.2.4, v5.2.3, v5.2.2, v5.2.1, v5.2, v5.1.16, v5.1.15, v5.1.14, v5.1.13, v5.1.12, v5.1.11, v5.1.10, v5.1.9, v5.1.8, v5.1.7, v5.1.6, v5.1.5, v5.1.4, v5.1.3, v5.1.2, v5.1.1, v5.0.14, v5.1, v5.0.13, v5.0.12, v5.0.11, v5.0.10, v5.0.9, v5.0.8, v5.0.7, v5.0.6, v5.0.5, v5.0.4, v5.0.3, v4.19.29, v5.0.2, v4.19.28, v5.0.1, v4.19.27, v5.0, v4.19.26, v4.19.25, v4.19.24, v4.19.23, v4.19.22, v4.19.21, v4.19.20, v4.19.19, v4.19.18, v4.19.17, v4.19.16, v4.19.15, v4.19.14, v4.19.13, v4.19.12, v4.19.11, v4.19.10, v4.19.9, v4.19.8, v4.19.7, v4.19.6, v4.19.5, v4.19.4, v4.18.20, v4.19.3, v4.18.19, v4.19.2, v4.18.18, v4.18.17, v4.19.1, v4.19, v4.18.16, v4.18.15, v4.18.14, v4.18.13, v4.18.12, v4.18.11, v4.18.10, v4.18.9, v4.18.7, v4.18.6 |
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#
26c7e05a |
| 30-Aug-2018 |
Andy Shevchenko <andriy.shevchenko@linux.intel.com> |
mfd: Convert Intel PMIC drivers to use SPDX identifier 1;5201;0c Reduce size of duplicated comments by switching to use SPDX identifier.
No functional change.
Signed-off-by: Andy Shevchenko <andriy
mfd: Convert Intel PMIC drivers to use SPDX identifier 1;5201;0c Reduce size of duplicated comments by switching to use SPDX identifier.
No functional change.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
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#
51eeee8e |
| 30-Aug-2018 |
Andy Shevchenko <andriy.shevchenko@linux.intel.com> |
mfd: Sort headers alphabetically for Intel PMIC drivers
Sort headers alphabetically for better maintenance.
No functional change.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
mfd: Sort headers alphabetically for Intel PMIC drivers
Sort headers alphabetically for better maintenance.
No functional change.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
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#
8bd2d03e |
| 30-Aug-2018 |
Andy Shevchenko <andriy.shevchenko@linux.intel.com> |
mfd: intel_soc_pmic_crc: Use REGMAP_IRQ_REG() macro
Instead of open coding each data structure with regmap IRQresources, use dedicated macro.
No functional change intended.
Signed-off-by: Andy She
mfd: intel_soc_pmic_crc: Use REGMAP_IRQ_REG() macro
Instead of open coding each data structure with regmap IRQresources, use dedicated macro.
No functional change intended.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
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#
0ce8ea71 |
| 30-Aug-2018 |
Andy Shevchenko <andriy.shevchenko@linux.intel.com> |
mfd: intel_soc_pmic_crc: Use DEFINE_RES_IRQ_NAMED() macro
Instead of open coding each data structure with IRQ resources, use dedicated macro.
No functional change intended.
Signed-off-by: Andy She
mfd: intel_soc_pmic_crc: Use DEFINE_RES_IRQ_NAMED() macro
Instead of open coding each data structure with IRQ resources, use dedicated macro.
No functional change intended.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
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Revision tags: v4.18.5, v4.17.18, v4.18.4, v4.18.3, v4.17.17, v4.18.2, v4.17.16, v4.17.15, v4.18.1, v4.18, v4.17.14, v4.17.13, v4.17.12, v4.17.11, v4.17.10, v4.17.9, v4.17.8, v4.17.7, v4.17.6, v4.17.5, v4.17.4, v4.17.3, v4.17.2, v4.17.1, v4.17, v4.16, v4.15, v4.13.16, v4.14, v4.13.5 |
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#
4d9ed62a |
| 04-Sep-2017 |
Hans de Goede <hdegoede@redhat.com> |
mfd: intel_soc_pmic: Export separate mfd-cell configs for BYT and CHT
Both Bay and Cherry Trail devices may be used together with a Crystal Cove PMIC. Each platform has its own variant of the PMIC,
mfd: intel_soc_pmic: Export separate mfd-cell configs for BYT and CHT
Both Bay and Cherry Trail devices may be used together with a Crystal Cove PMIC. Each platform has its own variant of the PMIC, which both use the same ACPI HID, but they are not 100% compatible.
Looking at the android x86 kernel sources where most of the Crystal Cove code comes from, it talks about "Valley View", "Bay Trail" and / or BYT without ever mentioning Cherry Trail, with the exception of the regulator driver. The Asus Zenfone-2 kernel code has 2 regulator drivers, one for Crystal Cove and one for what it calls Crystal Cove Plus. The Crystal Cove Plus regulator driver is the only one to mention Cherry Trail and that driver uses different register addresses then the normal (Bay Trail) Crystal Cove regulator driver, showing that at least the regulator register addresses are different.
The GPIO code should work on both, and the PWM code is known to work on both and is necessary for backlight control on some Cherry Trail devices.
Testing has shown that the ACPI OpRegion code otoh is causing problems on Cherry Trail devices, which is not surprising as it deals with the regulators and those have different register addresses on CHT.
Specifically the ACPI OpRegion code causes the external microsd slot on a Dell Venue 8 5855 (Cherry Trail version) to not work and the eMMC to become unreliable and throw lots of errors.
This commit replaces the single mfd_cell array currently used for Crystal Cove with 2 separate arrays, one for the Bay Trail variant and one for the Cherry Trail variant, note that the Cherry Trail version of the array only contains gpio and pwm cells. The PMIC OpRegion cell is deliberately not included and drivers for the other cells in the Bay Trail cell array were never upstreamed.
Fixes: 7cf0a66f32 ("mfd: intel_soc_pmic: Crystal Cove support") Reported-and-tested-by: russianneuromancer <russianneuromancer@ya.ru> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
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Revision tags: v4.13, v4.12, v4.10.17, v4.10.16, v4.10.15, v4.10.14, v4.10.13, v4.10.12, v4.10.11, v4.10.10, v4.10.9, v4.10.8, v4.10.7, v4.10.6, v4.10.5, v4.10.4, v4.10.3, v4.10.2, v4.10.1, v4.10, v4.9, openbmc-4.4-20161121-1, v4.4.33, v4.4.32, v4.4.31, v4.4.30, v4.4.29, v4.4.28, v4.4.27, v4.7.10, openbmc-4.4-20161021-1, v4.7.9, v4.4.26, v4.7.8, v4.4.25, v4.4.24, v4.7.7, v4.8, v4.4.23, v4.7.6, v4.7.5, v4.4.22, v4.4.21, v4.7.4, v4.7.3, v4.4.20, v4.7.2, v4.4.19, openbmc-4.4-20160819-1, v4.7.1, v4.4.18, v4.4.17, openbmc-4.4-20160804-1, v4.4.16, v4.7, openbmc-4.4-20160722-1, openbmc-20160722-1, openbmc-20160713-1, v4.4.15, v4.6.4, v4.6.3, v4.4.14, v4.6.2, v4.4.13, openbmc-20160606-1, v4.6.1, v4.4.12, openbmc-20160521-1, v4.4.11, openbmc-20160518-1, v4.6, v4.4.10, openbmc-20160511-1, openbmc-20160505-1, v4.4.9, v4.4.8, v4.4.7, openbmc-20160329-2, openbmc-20160329-1, openbmc-20160321-1, v4.4.6, v4.5, v4.4.5, v4.4.4, v4.4.3, openbmc-20160222-1, v4.4.2, openbmc-20160212-1, openbmc-20160210-1, openbmc-20160202-2, openbmc-20160202-1, v4.4.1, openbmc-20160127-1, openbmc-20160120-1, v4.4, openbmc-20151217-1, openbmc-20151210-1, openbmc-20151202-1, openbmc-20151123-1, openbmc-20151118-1, openbmc-20151104-1, v4.3, openbmc-20151102-1, openbmc-20151028-1, v4.3-rc1, v4.2, v4.2-rc8, v4.2-rc7, v4.2-rc6, v4.2-rc5, v4.2-rc4, v4.2-rc3, v4.2-rc2, v4.2-rc1 |
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#
3d5e10ec |
| 26-Jun-2015 |
Shobhit Kumar <shobhit.kumar@intel.com> |
mfd: intel_soc_pmic_crc: Add PWM cell device for Crystalcove PMIC
Needed for PWM control suuported by the PMIC
CC: Samuel Ortiz <sameo@linux.intel.com> Cc: Linus Walleij <linus.walleij@linaro.org>
mfd: intel_soc_pmic_crc: Add PWM cell device for Crystalcove PMIC
Needed for PWM control suuported by the PMIC
CC: Samuel Ortiz <sameo@linux.intel.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Alexandre Courbot <gnurou@gmail.com> Cc: Thierry Reding <thierry.reding@gmail.com> Acked-by: Lee Jones <lee.jones@linaro.org> Tested-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Shobhit Kumar <shobhit.kumar@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Revision tags: v4.1, v4.1-rc8, v4.1-rc7, v4.1-rc6, v4.1-rc5, v4.1-rc4, v4.1-rc3, v4.1-rc2 |
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#
7ce7b26f |
| 27-Apr-2015 |
Krzysztof Kozlowski <k.kozlowski.k@gmail.com> |
mfd: Constify regmap and irq configuration data
Constify in various drivers configuration data which is not modified: - regmap_irq_chip, - individual regmap_irq's in array, - regmap_config, - ir
mfd: Constify regmap and irq configuration data
Constify in various drivers configuration data which is not modified: - regmap_irq_chip, - individual regmap_irq's in array, - regmap_config, - irq_domain_ops,
Signed-off-by: Krzysztof Kozlowski <k.kozlowski.k@gmail.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
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Revision tags: v4.1-rc1, v4.0, v4.0-rc7, v4.0-rc6, v4.0-rc5, v4.0-rc4, v4.0-rc3, v4.0-rc2, v4.0-rc1, v3.19, v3.19-rc7, v3.19-rc6, v3.19-rc5, v3.19-rc4, v3.19-rc3 |
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#
172cb301 |
| 05-Jan-2015 |
Krzysztof Kozlowski <k.kozlowski@samsung.com> |
mfd: intel_soc_pmic: Constify struct regmap_config
The regmap_config struct may be const because it is not modified by the driver and regmap_init() accepts pointer to const.
Signed-off-by: Krzyszto
mfd: intel_soc_pmic: Constify struct regmap_config
The regmap_config struct may be const because it is not modified by the driver and regmap_init() accepts pointer to const.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
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Revision tags: v3.19-rc2, v3.19-rc1, v3.18, v3.18-rc7 |
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#
b1eea857 |
| 24-Nov-2014 |
Aaron Lu <aaron.lu@intel.com> |
ACPI / PMIC: support PMIC operation region for CrystalCove
The Baytrail-T platform firmware has defined two customized operation regions for PMIC chip Crystal Cove - one is for power resource handli
ACPI / PMIC: support PMIC operation region for CrystalCove
The Baytrail-T platform firmware has defined two customized operation regions for PMIC chip Crystal Cove - one is for power resource handling and one is for thermal: sensor temperature reporting, trip point setting, etc. This patch adds support for them on top of the existing Crystal Cove PMIC driver.
The reason to split code into a separate file intel_pmic.c is that there are more PMIC drivers with ACPI operation region support coming and we can re-use those code. The intel_pmic_opregion_data structure is created also for this purpose: when we need to support a new PMIC's operation region, we just need to fill those callbacks and the two register mapping tables.
Signed-off-by: Aaron Lu <aaron.lu@intel.com> Acked-by: Lee Jones <lee.jones@linaro.org> for the MFD part Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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Revision tags: v3.18-rc6, v3.18-rc5, v3.18-rc4, v3.18-rc3, v3.18-rc2, v3.18-rc1, v3.17, v3.17-rc7, v3.17-rc6, v3.17-rc5, v3.17-rc4, v3.17-rc3, v3.17-rc2, v3.17-rc1, v3.16, v3.16-rc7, v3.16-rc6, v3.16-rc5, v3.16-rc4, v3.16-rc3, v3.16-rc2, v3.16-rc1, v3.15 |
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#
7cf0a66f |
| 03-Jun-2014 |
Zhu, Lejun <lejun.zhu@linux.intel.com> |
mfd: intel_soc_pmic: Crystal Cove support
This patch provides chip-specific support for Crystal Cove. Crystal Cove is the PMIC in Baytrail-T platform.
Also adds Intel SoC PMIC support to the build
mfd: intel_soc_pmic: Crystal Cove support
This patch provides chip-specific support for Crystal Cove. Crystal Cove is the PMIC in Baytrail-T platform.
Also adds Intel SoC PMIC support to the build files.
Signed-off-by: Yang, Bin <bin.yang@intel.com> Signed-off-by: Zhu, Lejun <lejun.zhu@linux.intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
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