drm/amd/display: Support vertical interrupt 0 for all dcn ASIC[Why]When CONFIG_DRM_AMD_SECURE_DISPLAY is enabled, it will tryto register vertical interrupt 0 for specific task.Currently, only d
drm/amd/display: Support vertical interrupt 0 for all dcn ASIC[Why]When CONFIG_DRM_AMD_SECURE_DISPLAY is enabled, it will tryto register vertical interrupt 0 for specific task.Currently, only dcn10 have defined relevant info for vertical interrupt0. If we enable CONFIG_DRM_AMD_SECURE_DISPLAY for other dcn ASIC, willget DC_IRQ_SOURCE_INVALID while calling dc_interrupt_to_irq_source() andcause pointer errors.[How]Add support of vertical interrupt 0 for all dcn ASIC.Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>Acked-by: Alan Liu <HaoPing.Liu@amd.com>Signed-off-by: Wayne Lin <Wayne.Lin@amd.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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drm/amd/display: remove redundant CONFIG_DRM_AMD_DC_DCN in irq[Why & How]CONFIG_DRM_AMD_DC_DCN is used by pass the compilation failures, but DCcode should be OS-agnostic.This patch fixes it by
drm/amd/display: remove redundant CONFIG_DRM_AMD_DC_DCN in irq[Why & How]CONFIG_DRM_AMD_DC_DCN is used by pass the compilation failures, but DCcode should be OS-agnostic.This patch fixes it by removing unnecessasry CONFIG_DRM_AMD_DC_DCNin irq directory.Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>Acked-by: Stylon Wang <stylon.wang@amd.com>Signed-off-by: Alex Hung <alex.hung@amd.com>Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Turn global functions into static functionsTurn previously global functions into static functions to avoid-Wmissing-prototype warnings, such as:drivers/gpu/drm/amd/amdgpu/../dis
drm/amd/display: Turn global functions into static functionsTurn previously global functions into static functions to avoid-Wmissing-prototype warnings, such as:drivers/gpu/drm/amd/amdgpu/../display/dc/irq/dcn30/irq_service_dcn30.c:50:20:warning: no previous prototype for function 'to_dal_irq_source_dcn30'[-Wmissing-prototypes]enum dc_irq_source to_dal_irq_source_dcn30( ^drivers/gpu/drm/amd/amdgpu/../display/dc/irq/dcn30/irq_service_dcn30.c:50:1:note: declare 'static' if the function is not intended to be used outsideof this translation unitenum dc_irq_source to_dal_irq_source_dcn30(^static1 warning generated.drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c:488:6:warning: no previous prototype for function'dcn316_clk_mgr_helper_populate_bw_params' [-Wmissing-prototypes]void dcn316_clk_mgr_helper_populate_bw_params( ^drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c:488:1:note: declare 'static' if the function is not intended to be used outsideof this translation unitvoid dcn316_clk_mgr_helper_populate_bw_params(^static1 warning generated.v2: drop is_timing_changed hunk (Alex)Signed-off-by: Maíra Canal <maira.canal@usp.br>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: move dpcs_3_0_0 headers from dcn to dpcsTo align with other headers.Reviewed-by: Harry Wentland <harry.wentland@amd.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Log DMCUB trace buffer events[Why]We want to log DMCUB trace buffer events as Linux kernel traces.[How]Register an IRQ handler for DMCUB outbox0 interrupt in amdgpu_dm,and log
drm/amd/display: Log DMCUB trace buffer events[Why]We want to log DMCUB trace buffer events as Linux kernel traces.[How]Register an IRQ handler for DMCUB outbox0 interrupt in amdgpu_dm,and log the messages in the DMCUB tracebuffer to a new DMCUBTRACE_EVENT as soon as we receive the outbox0 IRQ from DMCUB FW.Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>Signed-off-by: Leo (Hanghong) Ma <hanghong.ma@amd.com>Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>Acked-by: Solomon Chiu <solomon.chiu@amd.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Support vertical interrupt 0 for all dcn ASIC[Why]When CONFIG_DRM_AMD_SECURE_DISPLAY is enabled, it will tryto register vertical interrupt 0 for specific task.Currently, only dcn10 have defined relevant info for vertical interrupt0. If we enable CONFIG_DRM_AMD_SECURE_DISPLAY for other dcn ASIC, willget DC_IRQ_SOURCE_INVALID while calling dc_interrupt_to_irq_source() andcause pointer errors.[How]Add support of vertical interrupt 0 for all dcn ASIC.v2: squash in build fix (Alex)Signed-off-by: Wayne Lin <Wayne.Lin@amd.com>Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>Acked-by: Solomon Chiu <solomon.chiu@amd.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: fold CONFIG_DRM_AMD_DC_DCN3* into CONFIG_DRM_AMD_DC_DCN (v3)Avoids confusion in configurations.v2: fix build when CONFIG_DRM_AMD_DC_DCN is disabledv3: rebase on latest codeReviewed
drm/amdgpu: fold CONFIG_DRM_AMD_DC_DCN3* into CONFIG_DRM_AMD_DC_DCN (v3)Avoids confusion in configurations.v2: fix build when CONFIG_DRM_AMD_DC_DCN is disabledv3: rebase on latest codeReviewed-by: Luben Tuikov <luben.tuikov@amd.com> (v1)Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Add missing pflip irqIf we have more than 4 displays we will runinto dummy irq calls or flip timout issues.Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>Reviewed-
drm/amd/display: Add missing pflip irqIf we have more than 4 displays we will runinto dummy irq calls or flip timout issues.Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Use VUPDATE_NO_LOCK instead of VUPDATE for dcn30[Why]Soft hangs occur when FreeSync is engaged since we utilize VUPDATE(which doesn't fire when holding the pipe lock) to send bac
drm/amd/display: Use VUPDATE_NO_LOCK instead of VUPDATE for dcn30[Why]Soft hangs occur when FreeSync is engaged since we utilize VUPDATE(which doesn't fire when holding the pipe lock) to send back vblankevents when FreeSync is active.[How]The alternative (working) interrupt source for this mechanism isVUPDATE_NO_LOCK. We already use this all other DCN revisions so aligndcn30 with those as well.Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>Reviewed-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Add DCN3 IRQAdd IWQ services for DCN3,This allows us to create/init and manage irqs for DCN3Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>Signed-off-by: Alex Deu
drm/amd/display: Add DCN3 IRQAdd IWQ services for DCN3,This allows us to create/init and manage irqs for DCN3Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>