#
2430be71 |
| 12-Nov-2021 |
Angus Wang <angus.wang@amd.com> |
drm/amd/display: Fix LTTPR not Enabled
[WHY] Previous LTTPR change has caused a regression that led to an issue where LTTPR is disabled
[HOW] Extended changes from previous fix to DCN30X
Reviewed-
drm/amd/display: Fix LTTPR not Enabled
[WHY] Previous LTTPR change has caused a regression that led to an issue where LTTPR is disabled
[HOW] Extended changes from previous fix to DCN30X
Reviewed-by: Wesley Chalmers <wesley.chalmers@amd.com> Reviewed-by: Martin Leung <Martin.Leung@amd.com> Reviewed-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Angus Wang <angus.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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|
Revision tags: v5.15.1 |
|
#
fd3b2e21 |
| 03-Nov-2021 |
Angus Wang <angus.wang@amd.com> |
drm/amd/display: Revert changes for MPO underflow
[WHY] The previous changes for fixing MPO underflow with multiple display connected caused a regression where the machine runs into a hang when doin
drm/amd/display: Revert changes for MPO underflow
[WHY] The previous changes for fixing MPO underflow with multiple display connected caused a regression where the machine runs into a hang when doing multiple driver pnp with multiple displays connected
[HOW] Reverted offending change
Reviewed-by: Martin Leung <Martin.Leung@amd.com> Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Angus Wang <angus.wang@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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|
#
80c5f69b |
| 04-Nov-2021 |
Angus Wang <angus.wang@amd.com> |
drm/amd/display: Fix RGB MPO underflow with multiple displays
[WHY] With RGB MPO enabled, playing a video with multiple displays connected results in underflow when closing the video window
[HOW] R
drm/amd/display: Fix RGB MPO underflow with multiple displays
[WHY] With RGB MPO enabled, playing a video with multiple displays connected results in underflow when closing the video window
[HOW] Reverted the old change to fix this problem, which prevented pipe splits for multiple display configurations and caused high MCLK speeds during idle. Added a two step call to dc_update_planes_and_stream, first time with pipe split disabled and the second time with pipe split enabled, which fixed the underflow issue
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Anson Jacob <Anson.Jacob@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Angus Wang <angus.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Revision tags: v5.15, v5.14.14, v5.14.13 |
|
#
a9a1ac44 |
| 15-Oct-2021 |
Martin Leung <Martin.Leung@amd.com> |
drm/amd/display: Manually adjust strobe for DCN303
why: DCN303's 4 channel SOC BB causes problems at strobe
how: workaround to manually adjust strobe calculation using FCLK restrict.
Reviewed-by:
drm/amd/display: Manually adjust strobe for DCN303
why: DCN303's 4 channel SOC BB causes problems at strobe
how: workaround to manually adjust strobe calculation using FCLK restrict.
Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Agustin Gutierrez <agustin.gutierrez@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Martin Leung <Martin.Leung@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Revision tags: v5.14.12, v5.14.11, v5.14.10, v5.14.9, v5.14.8, v5.14.7, v5.14.6, v5.10.67, v5.10.66, v5.14.5, v5.14.4, v5.10.65, v5.14.3, v5.10.64, v5.14.2, v5.10.63, v5.14.1, v5.10.62, v5.14, v5.10.61, v5.10.60 |
|
#
b5ce6fe8 |
| 09-Aug-2021 |
Josip Pavic <Josip.Pavic@amd.com> |
drm/amd/display: add missing ABM register offsets
[Why] Some ABM registers don't exist on DCN 3.01, so are missing from its register offset list. However, this list was copied to later versions of D
drm/amd/display: add missing ABM register offsets
[Why] Some ABM registers don't exist on DCN 3.01, so are missing from its register offset list. However, this list was copied to later versions of DCN that do have these registers. As a result, they're inaccessible from the driver on those DCN versions even though they exist.
[How] Add the missing ABM register offsets to DCN 3.02+
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Josip Pavic <Josip.Pavic@amd.com> Tested-by: Daniel Wheeler <Daniel.Wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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|
#
82a27c18 |
| 26-Jul-2022 |
Aurabindo Pillai <aurabindo.pillai@amd.com> |
drm/amd/display: Check correct bounds for stream encoder instances for DCN303
commit 89b008222c2bf21e50219725caed31590edfd9d1 upstream.
[Why & How] eng_id for DCN303 cannot be more than 1, since we
drm/amd/display: Check correct bounds for stream encoder instances for DCN303
commit 89b008222c2bf21e50219725caed31590edfd9d1 upstream.
[Why & How] eng_id for DCN303 cannot be more than 1, since we have only two instances of stream encoders.
Check the correct boundary condition for engine ID for DCN303 prevent the potential out of bounds access.
Fixes: cd6d421e3d1a ("drm/amd/display: Initial DC support for Beige Goby") Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Cc: stable@vger.kernel.org Reviewed-by: Chris Park <Chris.Park@amd.com> Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Acked-by: Tom Chung <chiahsuan.chung@amd.com> Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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|
#
82a27c18 |
| 26-Jul-2022 |
Aurabindo Pillai <aurabindo.pillai@amd.com> |
drm/amd/display: Check correct bounds for stream encoder instances for DCN303
commit 89b008222c2bf21e50219725caed31590edfd9d1 upstream.
[Why & How] eng_id for DCN303 cannot be more than 1, since we
drm/amd/display: Check correct bounds for stream encoder instances for DCN303
commit 89b008222c2bf21e50219725caed31590edfd9d1 upstream.
[Why & How] eng_id for DCN303 cannot be more than 1, since we have only two instances of stream encoders.
Check the correct boundary condition for engine ID for DCN303 prevent the potential out of bounds access.
Fixes: cd6d421e3d1a ("drm/amd/display: Initial DC support for Beige Goby") Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Cc: stable@vger.kernel.org Reviewed-by: Chris Park <Chris.Park@amd.com> Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Acked-by: Tom Chung <chiahsuan.chung@amd.com> Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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|
#
82a27c18 |
| 26-Jul-2022 |
Aurabindo Pillai <aurabindo.pillai@amd.com> |
drm/amd/display: Check correct bounds for stream encoder instances for DCN303
commit 89b008222c2bf21e50219725caed31590edfd9d1 upstream.
[Why & How] eng_id for DCN303 cannot be more than 1, since we
drm/amd/display: Check correct bounds for stream encoder instances for DCN303
commit 89b008222c2bf21e50219725caed31590edfd9d1 upstream.
[Why & How] eng_id for DCN303 cannot be more than 1, since we have only two instances of stream encoders.
Check the correct boundary condition for engine ID for DCN303 prevent the potential out of bounds access.
Fixes: cd6d421e3d1a ("drm/amd/display: Initial DC support for Beige Goby") Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Cc: stable@vger.kernel.org Reviewed-by: Chris Park <Chris.Park@amd.com> Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Acked-by: Tom Chung <chiahsuan.chung@amd.com> Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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|
#
82a27c18 |
| 26-Jul-2022 |
Aurabindo Pillai <aurabindo.pillai@amd.com> |
drm/amd/display: Check correct bounds for stream encoder instances for DCN303
commit 89b008222c2bf21e50219725caed31590edfd9d1 upstream.
[Why & How] eng_id for DCN303 cannot be more than 1, since we
drm/amd/display: Check correct bounds for stream encoder instances for DCN303
commit 89b008222c2bf21e50219725caed31590edfd9d1 upstream.
[Why & How] eng_id for DCN303 cannot be more than 1, since we have only two instances of stream encoders.
Check the correct boundary condition for engine ID for DCN303 prevent the potential out of bounds access.
Fixes: cd6d421e3d1a ("drm/amd/display: Initial DC support for Beige Goby") Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Cc: stable@vger.kernel.org Reviewed-by: Chris Park <Chris.Park@amd.com> Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Acked-by: Tom Chung <chiahsuan.chung@amd.com> Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
82a27c18 |
| 26-Jul-2022 |
Aurabindo Pillai <aurabindo.pillai@amd.com> |
drm/amd/display: Check correct bounds for stream encoder instances for DCN303
commit 89b008222c2bf21e50219725caed31590edfd9d1 upstream.
[Why & How] eng_id for DCN303 cannot be more than 1, since we
drm/amd/display: Check correct bounds for stream encoder instances for DCN303
commit 89b008222c2bf21e50219725caed31590edfd9d1 upstream.
[Why & How] eng_id for DCN303 cannot be more than 1, since we have only two instances of stream encoders.
Check the correct boundary condition for engine ID for DCN303 prevent the potential out of bounds access.
Fixes: cd6d421e3d1a ("drm/amd/display: Initial DC support for Beige Goby") Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Cc: stable@vger.kernel.org Reviewed-by: Chris Park <Chris.Park@amd.com> Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Acked-by: Tom Chung <chiahsuan.chung@amd.com> Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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|
#
82a27c18 |
| 26-Jul-2022 |
Aurabindo Pillai <aurabindo.pillai@amd.com> |
drm/amd/display: Check correct bounds for stream encoder instances for DCN303
commit 89b008222c2bf21e50219725caed31590edfd9d1 upstream.
[Why & How] eng_id for DCN303 cannot be more than 1, since we
drm/amd/display: Check correct bounds for stream encoder instances for DCN303
commit 89b008222c2bf21e50219725caed31590edfd9d1 upstream.
[Why & How] eng_id for DCN303 cannot be more than 1, since we have only two instances of stream encoders.
Check the correct boundary condition for engine ID for DCN303 prevent the potential out of bounds access.
Fixes: cd6d421e3d1a ("drm/amd/display: Initial DC support for Beige Goby") Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Cc: stable@vger.kernel.org Reviewed-by: Chris Park <Chris.Park@amd.com> Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Acked-by: Tom Chung <chiahsuan.chung@amd.com> Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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|
#
82a27c18 |
| 26-Jul-2022 |
Aurabindo Pillai <aurabindo.pillai@amd.com> |
drm/amd/display: Check correct bounds for stream encoder instances for DCN303
commit 89b008222c2bf21e50219725caed31590edfd9d1 upstream.
[Why & How] eng_id for DCN303 cannot be more than 1, since we
drm/amd/display: Check correct bounds for stream encoder instances for DCN303
commit 89b008222c2bf21e50219725caed31590edfd9d1 upstream.
[Why & How] eng_id for DCN303 cannot be more than 1, since we have only two instances of stream encoders.
Check the correct boundary condition for engine ID for DCN303 prevent the potential out of bounds access.
Fixes: cd6d421e3d1a ("drm/amd/display: Initial DC support for Beige Goby") Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Cc: stable@vger.kernel.org Reviewed-by: Chris Park <Chris.Park@amd.com> Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Acked-by: Tom Chung <chiahsuan.chung@amd.com> Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
show more ...
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#
82a27c18 |
| 26-Jul-2022 |
Aurabindo Pillai <aurabindo.pillai@amd.com> |
drm/amd/display: Check correct bounds for stream encoder instances for DCN303
commit 89b008222c2bf21e50219725caed31590edfd9d1 upstream.
[Why & How] eng_id for DCN303 cannot be more than 1, since we
drm/amd/display: Check correct bounds for stream encoder instances for DCN303
commit 89b008222c2bf21e50219725caed31590edfd9d1 upstream.
[Why & How] eng_id for DCN303 cannot be more than 1, since we have only two instances of stream encoders.
Check the correct boundary condition for engine ID for DCN303 prevent the potential out of bounds access.
Fixes: cd6d421e3d1a ("drm/amd/display: Initial DC support for Beige Goby") Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Cc: stable@vger.kernel.org Reviewed-by: Chris Park <Chris.Park@amd.com> Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Acked-by: Tom Chung <chiahsuan.chung@amd.com> Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
show more ...
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#
82a27c18 |
| 26-Jul-2022 |
Aurabindo Pillai <aurabindo.pillai@amd.com> |
drm/amd/display: Check correct bounds for stream encoder instances for DCN303
commit 89b008222c2bf21e50219725caed31590edfd9d1 upstream.
[Why & How] eng_id for DCN303 cannot be more than 1, since we
drm/amd/display: Check correct bounds for stream encoder instances for DCN303
commit 89b008222c2bf21e50219725caed31590edfd9d1 upstream.
[Why & How] eng_id for DCN303 cannot be more than 1, since we have only two instances of stream encoders.
Check the correct boundary condition for engine ID for DCN303 prevent the potential out of bounds access.
Fixes: cd6d421e3d1a ("drm/amd/display: Initial DC support for Beige Goby") Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Cc: stable@vger.kernel.org Reviewed-by: Chris Park <Chris.Park@amd.com> Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Acked-by: Tom Chung <chiahsuan.chung@amd.com> Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
show more ...
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#
0f591d17 |
| 09-Dec-2021 |
Angus Wang <angus.wang@amd.com> |
drm/amd/display: Changed pipe split policy to allow for multi-display pipe split
commit ee2698cf79cc759a397c61086c758d4cc85938bf upstream.
[WHY] Current implementation of pipe split policy prevents
drm/amd/display: Changed pipe split policy to allow for multi-display pipe split
commit ee2698cf79cc759a397c61086c758d4cc85938bf upstream.
[WHY] Current implementation of pipe split policy prevents pipe split with multiple displays connected, which caused the MCLK speed to be stuck at max
[HOW] Changed the pipe split policies so that pipe split is allowed for multi-display configurations
Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1522 Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1709 Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1655 Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1403
Note this is a backport of this commit from amdgpu drm-next for 5.16.
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Angus Wang <angus.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
03388a34 |
| 13-Aug-2021 |
Anson Jacob <Anson.Jacob@amd.com> |
drm/amd/display: Fix memory leak reported by coverity
Free memory allocated if any of the previous allocations failed.
>>> CID 1487129: Resource leaks (RESOURCE_LEAK) >>> Variable "vpg" g
drm/amd/display: Fix memory leak reported by coverity
Free memory allocated if any of the previous allocations failed.
>>> CID 1487129: Resource leaks (RESOURCE_LEAK) >>> Variable "vpg" going out of scope leaks the storage it points to.
Addresses-Coverity-ID: 1487129: ("Resource leaks")
Reviewed-by: Aric Cyr <aric.cyr@amd.com> Acked-by: Mikita Lipski <mikita.lipski@amd.com> Signed-off-by: Anson Jacob <Anson.Jacob@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Revision tags: v5.10.53 |
|
#
2eedeb07 |
| 20-Jul-2021 |
Bing Guo <bing.guo@amd.com> |
drm/amd/display: Increase stutter watermark for dcn303
[Why&How] Hardware team suggested to use SRExitTime= 35.5us as w/a to prevent underflow in certain modes.
Reviewed-by: Martin Leung <martin.le
drm/amd/display: Increase stutter watermark for dcn303
[Why&How] Hardware team suggested to use SRExitTime= 35.5us as w/a to prevent underflow in certain modes.
Reviewed-by: Martin Leung <martin.leung@amd.com> Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Bing Guo <bing.guo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
show more ...
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#
cd7b0531 |
| 20-Jul-2021 |
Bing Guo <bing.guo@amd.com> |
drm/amd/display: Increase stutter watermark for dcn303
[Why&How] Hardware team suggested to use SRExitTime= 35.5us as w/a to prevent underflow in certain modes.
Reviewed-by: Martin Leung <martin.le
drm/amd/display: Increase stutter watermark for dcn303
[Why&How] Hardware team suggested to use SRExitTime= 35.5us as w/a to prevent underflow in certain modes.
Reviewed-by: Martin Leung <martin.leung@amd.com> Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Bing Guo <bing.guo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
show more ...
|
Revision tags: v5.10.52, v5.10.51, v5.10.50, v5.10.49 |
|
#
ff790355 |
| 09-Jul-2021 |
Bindu Ramamurthy <bindu.r@amd.com> |
drm/amd/display: Populate dtbclk entries for dcn3.02/3.03
[Why] Populate dtbclk values from bwparams for dcn302, dcn303.
[How] dtbclk values are fetched from bandwidthparams for all DPM levels and
drm/amd/display: Populate dtbclk entries for dcn3.02/3.03
[Why] Populate dtbclk values from bwparams for dcn302, dcn303.
[How] dtbclk values are fetched from bandwidthparams for all DPM levels and for DPM levels where smu returns 0, previous level values are reported.
Reviewed-by: Roman Li <Roman.Li@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Bindu Ramamurthy <bindu.r@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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|
Revision tags: v5.13, v5.10.46, v5.10.43, v5.10.42, v5.10.41 |
|
#
f891ae71 |
| 27-May-2021 |
Bindu Ramamurthy <bindu.r@amd.com> |
drm/amd/display: Populate socclk entries for dcn3.02/3.03
[Why] Initialize socclk entries in bandwidth params for dcn302, dcn303.
[How] Fetch the sockclk values from smu for the DPM levels and for
drm/amd/display: Populate socclk entries for dcn3.02/3.03
[Why] Initialize socclk entries in bandwidth params for dcn302, dcn303.
[How] Fetch the sockclk values from smu for the DPM levels and for the DPM levels where smu returns 0, previous level values are reported.
Reviewed-by: Roman Li <Roman.Li@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Bindu Ramamurthy <bindu.r@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
show more ...
|
#
ce350c6e |
| 09-Jul-2021 |
Bindu Ramamurthy <bindu.r@amd.com> |
drm/amd/display: Populate dtbclk entries for dcn3.02/3.03
[Why] Populate dtbclk values from bwparams for dcn302, dcn303.
[How] dtbclk values are fetched from bandwidthparams for all DPM levels and
drm/amd/display: Populate dtbclk entries for dcn3.02/3.03
[Why] Populate dtbclk values from bwparams for dcn302, dcn303.
[How] dtbclk values are fetched from bandwidthparams for all DPM levels and for DPM levels where smu returns 0, previous level values are reported.
Reviewed-by: Roman Li <Roman.Li@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Bindu Ramamurthy <bindu.r@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
show more ...
|
#
f30f5515 |
| 27-May-2021 |
Bindu Ramamurthy <bindu.r@amd.com> |
drm/amd/display: Populate socclk entries for dcn3.02/3.03
[Why] Initialize socclk entries in bandwidth params for dcn302, dcn303.
[How] Fetch the sockclk values from smu for the DPM levels and for
drm/amd/display: Populate socclk entries for dcn3.02/3.03
[Why] Initialize socclk entries in bandwidth params for dcn302, dcn303.
[How] Fetch the sockclk values from smu for the DPM levels and for the DPM levels where smu returns 0, previous level values are reported.
Reviewed-by: Roman Li <Roman.Li@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Bindu Ramamurthy <bindu.r@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
show more ...
|
Revision tags: v5.10.40, v5.10.39, v5.4.119, v5.10.36, v5.10.35, v5.10.34, v5.4.116, v5.10.33, v5.12 |
|
#
9253e115 |
| 21-Apr-2021 |
Aurabindo Pillai <aurabindo.pillai@amd.com> |
drm/amd/display: get socBB from VBIOS for dcn302 and dcn303
[why] Some SOC BB paramters may vary per SKU, and it does not make sense for driver to hardcode these values. This change was added for dc
drm/amd/display: get socBB from VBIOS for dcn302 and dcn303
[why] Some SOC BB paramters may vary per SKU, and it does not make sense for driver to hardcode these values. This change was added for dcn30 and dcn301, but not for dcn302 and dcn303
[how] Parse the values from VBIOS if available, and use them if valid
Fixes: 93669c8e480dca ("drm/amd/display: get socBB from VBIOS") Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Bindu Ramamurthy <bindu.r@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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ceaf9f57 |
| 16-Jun-2021 |
Aurabindo Pillai <aurabindo.pillai@amd.com> |
drm/amd/display: Increase stutter watermark for dcn302 and dcn303
[Why] Current watermarks end up programming lowers watermarks which results in screen flickering and underflow for certain modes lik
drm/amd/display: Increase stutter watermark for dcn302 and dcn303
[Why] Current watermarks end up programming lowers watermarks which results in screen flickering and underflow for certain modes like 1440p.
[How] Add 11us to stutter exit & stutter enter plus exit watermark.
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Reviewed-by: Jun Lei <jun.lei@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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136e55e7 |
| 21-May-2021 |
Aric Cyr <aric.cyr@amd.com> |
drm/amd/display: Change default policy for MPO with multidisplay
[Why] Rearranging pipes with multiple displays and multiple planes cannot be done atomically and requires a much improved sequence to
drm/amd/display: Change default policy for MPO with multidisplay
[Why] Rearranging pipes with multiple displays and multiple planes cannot be done atomically and requires a much improved sequence to deal with it.
[How] To workaround such issues, prefer avoid pipe-split policy for multidisplay scenarios.
Signed-off-by: Aric Cyr <aric.cyr@amd.com> Reviewed-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com> Acked-by: Stylon Wang <stylon.wang@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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