fpga: mgr: Use standard dev_release for class driver

The FPGA manager class driver data structure is being treated as a
managed resource instead of using the standard dev_release call-back
function

fpga: mgr: Use standard dev_release for class driver

The FPGA manager class driver data structure is being treated as a
managed resource instead of using the standard dev_release call-back
function to release the class data structure. This change removes
the managed resource code for the freeing of the class data structure
and combines the create() and register() functions into a single
register() or register_full() function.

The register_full() function accepts an info data structure to provide
flexibility in passing optional parameters. The register() function
supports the current parameter list for users that don't require the
use of optional parameters.

The devm_fpga_mgr_register() function is retained, and the
devm_fpga_mgr_register_full() function is added.

Signed-off-by: Russ Weight <russell.h.weight@intel.com>
Reviewed-by: Xu Yilun <yilun.xu@intel.com>
Acked-by: Xu Yilun <yilun.xu@intel.com>
Signed-off-by: Moritz Fischer <mdf@kernel.org>

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fpga: versal-fpga: Remove empty functions

Since the core framework now wraps the functions, ensuring
drives only have to implement functions that do something,
drop the now no longer required callba

fpga: versal-fpga: Remove empty functions

Since the core framework now wraps the functions, ensuring
drives only have to implement functions that do something,
drop the now no longer required callbacks for state and
write_complete.

Signed-off-by: Moritz Fischer <mdf@kernel.org>
Link: https://lore.kernel.org/r/20210726030806.714809-1-mdf@kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

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fpga: versal-fpga: Add versal fpga manager driver

Add support for Xilinx Versal FPGA manager.

PDI source type can be DDR, OCM, QSPI flash etc..
But driver allocates memory always from DDR, Since dr

fpga: versal-fpga: Add versal fpga manager driver

Add support for Xilinx Versal FPGA manager.

PDI source type can be DDR, OCM, QSPI flash etc..
But driver allocates memory always from DDR, Since driver supports only
DDR source type.

Reviewed-by: Moritz Fischer <mdf@kernel.org>
Signed-off-by: Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com>
Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com>
Link: https://lore.kernel.org/r/20210626155248.5004-6-nava.manne@xilinx.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

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