cfb53114 | 13-Dec-2024 |
Wenkai Lin <linwenkai6@hisilicon.com> |
crypto: hisilicon/sec2 - fix for aead invalid authsize
[ Upstream commit a5a9d959936499a3106a1bf3b9070875d0d3dec4 ]
When the digest alg is HMAC-SHAx or another, the authsize may be less than 4 byte
crypto: hisilicon/sec2 - fix for aead invalid authsize
[ Upstream commit a5a9d959936499a3106a1bf3b9070875d0d3dec4 ]
When the digest alg is HMAC-SHAx or another, the authsize may be less than 4 bytes and mac_len of the BD is set to zero, the hardware considers it a BD configuration error and reports a ras error, so the sec driver needs to switch to software calculation in this case, this patch add a check for it and remove unnecessary check that has been done by crypto.
Fixes: 2f072d75d1ab ("crypto: hisilicon - Add aead support on SEC2") Signed-off-by: Wenkai Lin <linwenkai6@hisilicon.com> Signed-off-by: Chenghai Huang <huangchenghai2@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> Signed-off-by: Sasha Levin <sashal@kernel.org>
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2309cf3f | 13-Dec-2024 |
Wenkai Lin <linwenkai6@hisilicon.com> |
crypto: hisilicon/sec2 - fix for aead icv error
[ Upstream commit fd337f852b2677b53d0859a47b58e6e6bd189f30 ]
When the AEAD algorithm is used for encryption or decryption, the input authentication l
crypto: hisilicon/sec2 - fix for aead icv error
[ Upstream commit fd337f852b2677b53d0859a47b58e6e6bd189f30 ]
When the AEAD algorithm is used for encryption or decryption, the input authentication length varies, the hardware needs to obtain the input length to pass the integrity check verification. Currently, the driver uses a fixed authentication length,which causes decryption failure, so the length configuration is modified. In addition, the step of setting the auth length is unnecessary, so it was deleted from the setkey function.
Fixes: 2f072d75d1ab ("crypto: hisilicon - Add aead support on SEC2") Signed-off-by: Wenkai Lin <linwenkai6@hisilicon.com> Signed-off-by: Chenghai Huang <huangchenghai2@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> Signed-off-by: Sasha Levin <sashal@kernel.org>
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aa3e0db3 | 31-Aug-2024 |
Weili Qian <qianweili@huawei.com> |
crypto: hisilicon/qm - inject error before stopping queue
[ Upstream commit b04f06fc0243600665b3b50253869533b7938468 ]
The master ooo cannot be completely closed when the accelerator core reports m
crypto: hisilicon/qm - inject error before stopping queue
[ Upstream commit b04f06fc0243600665b3b50253869533b7938468 ]
The master ooo cannot be completely closed when the accelerator core reports memory error. Therefore, the driver needs to inject the qm error to close the master ooo. Currently, the qm error is injected after stopping queue, memory may be released immediately after stopping queue, causing the device to access the released memory. Therefore, error is injected to close master ooo before stopping queue to ensure that the device does not access the released memory.
Fixes: 6c6dd5802c2d ("crypto: hisilicon/qm - add controller reset interface") Signed-off-by: Weili Qian <qianweili@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> Signed-off-by: Sasha Levin <sashal@kernel.org>
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8b21a9b1 | 31-Aug-2024 |
Weili Qian <qianweili@huawei.com> |
crypto: hisilicon/qm - reset device before enabling it
[ Upstream commit 5d2d1ee0874c26b8010ddf7f57e2f246e848af38 ]
Before the device is enabled again, the device may still store the previously pro
crypto: hisilicon/qm - reset device before enabling it
[ Upstream commit 5d2d1ee0874c26b8010ddf7f57e2f246e848af38 ]
Before the device is enabled again, the device may still store the previously processed data. If an error occurs in the previous task, the device may fail to be enabled again. Therefore, before enabling device, reset the device to restore the initial state.
Signed-off-by: Weili Qian <qianweili@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> Stable-dep-of: b04f06fc0243 ("crypto: hisilicon/qm - inject error before stopping queue") Signed-off-by: Sasha Levin <sashal@kernel.org>
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b101f0bf | 07-Apr-2024 |
Chenghai Huang <huangchenghai2@huawei.com> |
crypto: hisilicon/qm - Add the err memory release process to qm uninit
[ Upstream commit c9ccfd5e0ff0dd929ce86d1b5f3c6a414110947a ]
When the qm uninit command is executed, the err data needs to be
crypto: hisilicon/qm - Add the err memory release process to qm uninit
[ Upstream commit c9ccfd5e0ff0dd929ce86d1b5f3c6a414110947a ]
When the qm uninit command is executed, the err data needs to be released to prevent memory leakage. The error information release operation and uacce_remove are integrated in qm_remove_uacce.
So add the qm_remove_uacce to qm uninit to avoid err memory leakage.
Signed-off-by: Chenghai Huang <huangchenghai2@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> Signed-off-by: Sasha Levin <sashal@kernel.org>
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52f0b4a3 | 02-Dec-2023 |
Zhiqi Song <songzhiqi1@huawei.com> |
crypto: hisilicon/zip - save capability registers in probe process
[ Upstream commit 2ff0ad847951d61c2d8b309e1ccefb26c57dcc7b ]
Pre-store the valid value of the zip alg support related capability r
crypto: hisilicon/zip - save capability registers in probe process
[ Upstream commit 2ff0ad847951d61c2d8b309e1ccefb26c57dcc7b ]
Pre-store the valid value of the zip alg support related capability register in hisi_zip_qm_init(), which will be called by hisi_zip_probe(). It can reduce the number of capability register queries and avoid obtaining incorrect values in abnormal scenarios, such as reset failed and the memory space disabled.
Fixes: db700974b69d ("crypto: hisilicon/zip - support zip capability") Signed-off-by: Zhiqi Song <songzhiqi1@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> Signed-off-by: Sasha Levin <sashal@kernel.org>
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b06a6d5e | 02-Dec-2023 |
Zhiqi Song <songzhiqi1@huawei.com> |
crypto: hisilicon/sec2 - save capability registers in probe process
[ Upstream commit f1115b0096c3163592e04e74f5a7548c25bda957 ]
Pre-store the valid value of the sec alg support related capability
crypto: hisilicon/sec2 - save capability registers in probe process
[ Upstream commit f1115b0096c3163592e04e74f5a7548c25bda957 ]
Pre-store the valid value of the sec alg support related capability register in sec_qm_init(), which will be called by probe process. It can reduce the number of capability register queries and avoid obtaining incorrect values in abnormal scenarios, such as reset failed and the memory space disabled.
Fixes: 921715b6b782 ("crypto: hisilicon/sec - get algorithm bitmap from registers") Signed-off-by: Zhiqi Song <songzhiqi1@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> Signed-off-by: Sasha Levin <sashal@kernel.org>
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e8d4877e | 02-Dec-2023 |
Zhiqi Song <songzhiqi1@huawei.com> |
crypto: hisilicon/hpre - save capability registers in probe process
[ Upstream commit cf8b5156bbc8c9376f699e8d35e9464b739e33ff ]
Pre-store the valid value of hpre alg support related capability reg
crypto: hisilicon/hpre - save capability registers in probe process
[ Upstream commit cf8b5156bbc8c9376f699e8d35e9464b739e33ff ]
Pre-store the valid value of hpre alg support related capability register in hpre_qm_init(), which will be called by hpre_probe(). It can reduce the number of capability register queries and avoid obtaining incorrect values in abnormal scenarios, such as reset failed and the memory space disabled.
Fixes: f214d59a0603 ("crypto: hisilicon/hpre - support hpre capability") Signed-off-by: Zhiqi Song <songzhiqi1@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> Signed-off-by: Sasha Levin <sashal@kernel.org>
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1e8102e2 | 02-Dec-2023 |
Wenkai Lin <linwenkai6@hisilicon.com> |
crypto: hisilicon/qm - add a function to set qm algs
[ Upstream commit f76f0d7f20672611974d3cc705996751fc403734 ]
Extract a public function to set qm algs and remove the similar code for setting qm
crypto: hisilicon/qm - add a function to set qm algs
[ Upstream commit f76f0d7f20672611974d3cc705996751fc403734 ]
Extract a public function to set qm algs and remove the similar code for setting qm algs in each module.
Signed-off-by: Wenkai Lin <linwenkai6@hisilicon.com> Signed-off-by: Hao Fang <fanghao11@huawei.com> Signed-off-by: Zhiqi Song <songzhiqi1@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> Stable-dep-of: cf8b5156bbc8 ("crypto: hisilicon/hpre - save capability registers in probe process") Signed-off-by: Sasha Levin <sashal@kernel.org>
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b7a03a0f | 23-Nov-2023 |
Chenghai Huang <huangchenghai2@huawei.com> |
crypto: hisilicon/zip - add zip comp high perf mode configuration
[ Upstream commit a9864bae1806499ebf3757a9e71dddde5b9c48c6 ]
To meet specific application scenarios, the function of switching betw
crypto: hisilicon/zip - add zip comp high perf mode configuration
[ Upstream commit a9864bae1806499ebf3757a9e71dddde5b9c48c6 ]
To meet specific application scenarios, the function of switching between the high performance mode and the high compression mode is added.
Use the perf_mode=0/1 configuration to set the compression high perf mode, 0(default, high compression mode), 1(high performance mode). These two modes only apply to the compression direction and are compatible with software algorithm in both directions.
Signed-off-by: Chenghai Huang <huangchenghai2@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> Stable-dep-of: cf8b5156bbc8 ("crypto: hisilicon/hpre - save capability registers in probe process") Signed-off-by: Sasha Levin <sashal@kernel.org>
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4c79c7a4 | 28-Sep-2023 |
Longfang Liu <liulongfang@huawei.com> |
crypto: hisilicon/qm - fix PF queue parameter issue
[ Upstream commit 5831fc1fd4a578232fea708b82de0c666ed17153 ]
If the queue isolation feature is enabled, the number of queues supported by the dev
crypto: hisilicon/qm - fix PF queue parameter issue
[ Upstream commit 5831fc1fd4a578232fea708b82de0c666ed17153 ]
If the queue isolation feature is enabled, the number of queues supported by the device changes. When PF is enabled using the current default number of queues, the default number of queues may be greater than the number supported by the device. As a result, the PF fails to be bound to the driver.
After modification, if queue isolation feature is enabled, when the default queue parameter is greater than the number supported by the device, the number of enabled queues will be changed to the number supported by the device, so that the PF and driver can be properly bound.
Fixes: 8bbecfb402f7 ("crypto: hisilicon/qm - add queue isolation support for Kunpeng930") Signed-off-by: Longfang Liu <liulongfang@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> Signed-off-by: Sasha Levin <sashal@kernel.org>
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391dde6e | 14-Jul-2023 |
Weili Qian <qianweili@huawei.com> |
crypto: hisilicon/hpre - enable sva error interrupt event
Enable sva error interrupt event. When an error occurs on the sva module, the device reports an abnormal interrupt to the driver.
Signed-of
crypto: hisilicon/hpre - enable sva error interrupt event
Enable sva error interrupt event. When an error occurs on the sva module, the device reports an abnormal interrupt to the driver.
Signed-off-by: Weili Qian <qianweili@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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b925a0cc | 14-Jul-2023 |
Weili Qian <qianweili@huawei.com> |
crypto: hisilicon/qm - increase device doorbell timeout
When both the accelerator device and SMMU are busy, the processing time of the doorbell may be prolonged. As a result, the doorbell may timeou
crypto: hisilicon/qm - increase device doorbell timeout
When both the accelerator device and SMMU are busy, the processing time of the doorbell may be prolonged. As a result, the doorbell may timeout, especially in the sva scenario. Therefore, the doorbell timeout is increased.
Signed-off-by: Weili Qian <qianweili@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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4b3ee3ff | 14-Jul-2023 |
Weili Qian <qianweili@huawei.com> |
crypto: hisilicon/qm - stop function and write data to memory
When the system is shut down, the process is killed, but the accelerator device does not stop executing the tasks. If the accelerator de
crypto: hisilicon/qm - stop function and write data to memory
When the system is shut down, the process is killed, but the accelerator device does not stop executing the tasks. If the accelerator device still accesses the memory and writes back data to the memory after the memory is reclaimed by the system, an NFE error may occur. Therefore, before the system is shut down, the driver needs to stop the device and write data back to the memory.
Signed-off-by: Weili Qian <qianweili@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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5cd4ed98 | 14-Jul-2023 |
Weili Qian <qianweili@huawei.com> |
crypto: hisilicon/qm - flush all work before driver removed
Before removing the driver, flush inter-function communication work, and subsequent communication work is not processed. This prevents com
crypto: hisilicon/qm - flush all work before driver removed
Before removing the driver, flush inter-function communication work, and subsequent communication work is not processed. This prevents communication threads from accessing released memory.
Fixes: ("crypto: hisilicon/qm - enable PF and VFs communication") Signed-off-by: Weili Qian <qianweili@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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