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2a65ed42 |
| 29-Jun-2016 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
clk: sunxi-ng: Add mux clock support Some clocks in the Allwinner SoCs clocks unit are just muxes. However, those muxes might also be found in some other complicated clocks that
clk: sunxi-ng: Add mux clock support Some clocks in the Allwinner SoCs clocks unit are just muxes. However, those muxes might also be found in some other complicated clocks that would benefit from the code in there to deal with "advanced" features, like pre-dividers. Introduce a set of helpers to reduce the code duplication in such cases. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160629190535.11855-6-maxime.ripard@free-electrons.com
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1a7e7c38 |
| 29-Jun-2016 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
clk: sunxi-ng: Add gate clock support Some clocks in the Allwinner SoCs clocks unit are just simple gates. Add support for those clocks. Since it's a feature that can also be fo
clk: sunxi-ng: Add gate clock support Some clocks in the Allwinner SoCs clocks unit are just simple gates. Add support for those clocks. Since it's a feature that can also be found in more complex clocks, provide a bunch of helpers that can be reused later on. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160629190535.11855-5-maxime.ripard@free-electrons.com
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89a3dfb7 |
| 29-Jun-2016 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
clk: sunxi-ng: Add fractional lib Some clocks can be switched to a mode called fractional that have two fixed output rate you can choose from. Add a small library to deal with t
clk: sunxi-ng: Add fractional lib Some clocks can be switched to a mode called fractional that have two fixed output rate you can choose from. Add a small library to deal with those clocks. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160629190535.11855-4-maxime.ripard@free-electrons.com
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1d80c142 |
| 29-Jun-2016 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
clk: sunxi-ng: Add common infrastructure Start our new clock infrastructure by adding the registration code, common structure and common code. Signed-off-by: Maxime Ripard <maxi
clk: sunxi-ng: Add common infrastructure Start our new clock infrastructure by adding the registration code, common structure and common code. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160629190535.11855-3-maxime.ripard@free-electrons.com
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