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Revision tags: v6.6.25, v6.6.24, v6.6.23, v6.6.16, v6.6.15, v6.6.14, v6.6.13, v6.6.12, v6.6.11, v6.6.10, v6.6.9, v6.6.8, v6.6.7, v6.6.6, v6.6.5, v6.6.4, v6.6.3, v6.6.2, v6.5.11, v6.6.1, v6.5.10, v6.6, v6.5.9, v6.5.8, v6.5.7, v6.5.6, v6.5.5, v6.5.4, v6.5.3, v6.5.2, v6.1.51, v6.5.1, v6.1.50, v6.5, v6.1.49, v6.1.48, v6.1.46, v6.1.45, v6.1.44, v6.1.43, v6.1.42, v6.1.41, v6.1.40, v6.1.39 |
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| #
8303d4ee |
| 07-Jul-2023 |
Christophe JAILLET <christophe.jaillet@wanadoo.fr> |
clk: starfive: Simplify .determine_rate()
jh71x0_clk_mux_determine_rate() is the same as __clk_mux_determine_rate(),
so use the latter to save some LoC.
Signed-off-by: Christophe JAILLET <christoph
clk: starfive: Simplify .determine_rate()
jh71x0_clk_mux_determine_rate() is the same as __clk_mux_determine_rate(),
so use the latter to save some LoC.
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Link: https://lore.kernel.org/r/085541814ebe2543cb7e8a31004c0da3e7d5b6eb.1688760111.git.christophe.jaillet@wanadoo.fr
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
show more ...
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Revision tags: v6.1.38, v6.1.37, v6.1.36, v6.4, v6.1.35, v6.1.34, v6.1.33, v6.1.32, v6.1.31, v6.1.30, v6.1.29, v6.1.28, v6.1.27, v6.1.26, v6.3, v6.1.25, v6.1.24, v6.1.23 |
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| #
147455ed |
| 01-Apr-2023 |
Emil Renner Berthing <kernel@esmil.dk> |
clk: starfive: Rename "jh7100" to "jh71x0" for the common code
Rename some variables from "jh7100" or "JH7100" to "jh71x0"
or "JH71X0".
Tested-by: Tommaso Merciai <tomm.merciai@gmail.com>
Reviewed-
clk: starfive: Rename "jh7100" to "jh71x0" for the common code
Rename some variables from "jh7100" or "JH7100" to "jh71x0"
or "JH71X0".
Tested-by: Tommaso Merciai <tomm.merciai@gmail.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
show more ...
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| #
e19aa786 |
| 01-Apr-2023 |
Emil Renner Berthing <kernel@esmil.dk> |
clk: starfive: Rename clk-starfive-jh7100.h to clk-starfive-jh71x0.h
Rename clk-starfive-jh7100.h to clk-starfive-jh71x0.h for making
the code to be common.
Tested-by: Tommaso Merciai <tomm.merciai
clk: starfive: Rename clk-starfive-jh7100.h to clk-starfive-jh71x0.h
Rename clk-starfive-jh7100.h to clk-starfive-jh71x0.h for making
the code to be common.
Tested-by: Tommaso Merciai <tomm.merciai@gmail.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
show more ...
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| #
00f1cb17 |
| 01-Apr-2023 |
Emil Renner Berthing <kernel@esmil.dk> |
clk: starfive: Factor out common JH7100 and JH7110 code
The clock control registers on the StarFive JH7100 and JH7110 work
identically, so factor out the code then drivers for the two SoCs
can share
clk: starfive: Factor out common JH7100 and JH7110 code
The clock control registers on the StarFive JH7100 and JH7110 work
identically, so factor out the code then drivers for the two SoCs
can share it without depending on each other. No functional change.
Tested-by: Tommaso Merciai <tomm.merciai@gmail.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
show more ...
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