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3bcca2a5 |
| 05-Sep-2019 |
Bin Meng <bmeng.cn@gmail.com> |
riscv: dts: sifive: Add ethernet0 to the aliases node U-Boot expects this alias to be in place in order to fix up the mac address of the ethernet node. Signed-off-by: Bin Meng <
riscv: dts: sifive: Add ethernet0 to the aliases node U-Boot expects this alias to be in place in order to fix up the mac address of the ethernet node. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
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Revision tags: v5.2.11, v5.2.10 |
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b45e0c30 |
| 21-Aug-2019 |
Yash Shah <yash.shah@sifive.com> |
riscv: dts: Add DT support for SiFive FU540 PWM driver Add the PWM DT node in SiFive FU540 soc-specific DT file. Enable the PWM nodes in HiFive Unleashed board-specific DT file.
riscv: dts: Add DT support for SiFive FU540 PWM driver Add the PWM DT node in SiFive FU540 soc-specific DT file. Enable the PWM nodes in HiFive Unleashed board-specific DT file. Signed-off-by: Yash Shah <yash.shah@sifive.com> Cc: Palmer Dabbelt <palmer@sifive.com> [paul.walmsley@sifive.com: added chip-specific compatible string; dropped reg-names string from pwm1] Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
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Revision tags: v5.2.9, v5.2.8, v5.2.7, v5.2.6, v5.2.5, v5.2.4, v5.2.3 |
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11ae2d89 |
| 25-Jul-2019 |
Paul Walmsley <paul.walmsley@sifive.com> |
riscv: dts: fu540-c000: drop "timebase-frequency" On FU540-based systems, the "timebase-frequency" (RTCCLK) is sourced from an external crystal located on the PCB. Thus the timebase
riscv: dts: fu540-c000: drop "timebase-frequency" On FU540-based systems, the "timebase-frequency" (RTCCLK) is sourced from an external crystal located on the PCB. Thus the timebase-frequency DT property should be defined by the board that uses the SoC, not the SoC itself. Drop the superfluous timebase-frequency property from the SoC DT data. (It's already present in the board DT data.) Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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Revision tags: v5.2.2 |
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26091eef |
| 19-Jul-2019 |
Yash Shah <yash.shah@sifive.com> |
riscv: dts: Add DT node for SiFive FU540 Ethernet controller driver DT node for SiFive FU540-C000 GEMGXL Ethernet controller driver added Signed-off-by: Yash Shah <yash.shah@sifive.
riscv: dts: Add DT node for SiFive FU540 Ethernet controller driver DT node for SiFive FU540-C000 GEMGXL Ethernet controller driver added Signed-off-by: Yash Shah <yash.shah@sifive.com> Reviewed-by: Sagar Kadam <sagar.kadam@sifive.com> Cc: Andrew Lunn <andrew@lunn.ch> [paul.walmsley@sifive.com: changed "phy1" to "phy0" at Andrew Lunn's suggestion] Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
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Revision tags: v5.2.1, v5.2, v5.1.16 |
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45b03df2 |
| 25-Jun-2019 |
Yash Shah <yash.shah@sifive.com> |
riscv: dts: Re-organize the DT nodes As per the convention for any SOC device with external connection, define only device DT node in SOC DTSi file with status = "disabled" and enabl
riscv: dts: Re-organize the DT nodes As per the convention for any SOC device with external connection, define only device DT node in SOC DTSi file with status = "disabled" and enable device in Board DTS file with status = "okay" Reported-by: Anup Patel <anup@brainfault.org> Signed-off-by: Yash Shah <yash.shah@sifive.com> Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
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Revision tags: v5.1.15, v5.1.14, v5.1.13, v5.1.12, v5.1.11, v5.1.10, v5.1.9, v5.1.8, v5.1.7, v5.1.6 |
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72296bde |
| 28-May-2019 |
Paul Walmsley <paul.walmsley@sifive.com> |
riscv: dts: add initial support for the SiFive FU540-C000 SoC Add initial support for the SiFive FU540-C000 SoC. This is a 28nm SoC based around the SiFive U54-MC core complex and a Til
riscv: dts: add initial support for the SiFive FU540-C000 SoC Add initial support for the SiFive FU540-C000 SoC. This is a 28nm SoC based around the SiFive U54-MC core complex and a TileLink interconnect. This file is expected to grow as more device drivers are added to the kernel. This patch includes a fix to the QSPI memory map due to a documentation bug, found by ShihPo Hung <shihpo.hung@sifive.com>, adds entries for the I2C controller, and merges all DT changes that formerly were made dynamically by the riscv-pk BBL proxy kernel. Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com> Signed-off-by: Paul Walmsley <paul@pwsan.com> Tested-by: Loys Ollivier <lollivier@baylibre.com> Tested-by: Kevin Hilman <khilman@baylibre.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Palmer Dabbelt <palmer@sifive.com> Cc: Albert Ou <aou@eecs.berkeley.edu> Cc: ShihPo Hung <shihpo.hung@sifive.com> Cc: devicetree@vger.kernel.org Cc: linux-riscv@lists.infradead.org Cc: linux-kernel@vger.kernel.org
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