Revision tags: v6.6.25, v6.6.24, v6.6.23, v6.6.16, v6.6.15, v6.6.14, v6.6.13, v6.6.12, v6.6.11, v6.6.10, v6.6.9, v6.6.8, v6.6.7, v6.6.6, v6.6.5, v6.6.4, v6.6.3, v6.6.2, v6.5.11, v6.6.1, v6.5.10, v6.6, v6.5.9, v6.5.8, v6.5.7, v6.5.6, v6.5.5, v6.5.4, v6.5.3, v6.5.2, v6.1.51, v6.5.1, v6.1.50, v6.5, v6.1.49, v6.1.48, v6.1.46, v6.1.45, v6.1.44, v6.1.43 |
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#
41c18552 |
| 30-Jul-2023 |
Marijn Suijten <marijn.suijten@somainline.org> |
arm64: dts: qcom: Use labels with generic node names for ADC channels
As discussed in [1] it is more convenient to use a generic `channel` node name for ADC channels while storing a friendly - board
arm64: dts: qcom: Use labels with generic node names for ADC channels
As discussed in [1] it is more convenient to use a generic `channel` node name for ADC channels while storing a friendly - board-specific instead of PMIC-specific - name in the label, if/when desired to overwrite the channel description already contained (but previously unused) in the driver [2]. Follow up on the dt-bindings' `channel` node name requirement, and instead provide this (sometimes per-board) channel description through a label property.
Also remove all the unused label references (not to be confused with label properties) from pm660, pmp8074 and pms405.
[1]: https://lore.kernel.org/linux-arm-msm/20221106193018.270106-1-marijn.suijten@somainline.org/T/#u [2]: https://lore.kernel.org/linux-arm-msm/20230116220909.196926-4-marijn.suijten@somainline.org/
Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230730-generic-adc-channels-v5-2-e6c69bda8034@somainline.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Revision tags: v6.1.42, v6.1.41, v6.1.40, v6.1.39, v6.1.38, v6.1.37, v6.1.36, v6.4, v6.1.35, v6.1.34, v6.1.33, v6.1.32, v6.1.31, v6.1.30, v6.1.29, v6.1.28, v6.1.27, v6.1.26, v6.3, v6.1.25, v6.1.24, v6.1.23, v6.1.22, v6.1.21, v6.1.20, v6.1.19, v6.1.18, v6.1.17, v6.1.16, v6.1.15, v6.1.14, v6.1.13, v6.2, v6.1.12, v6.1.11, v6.1.10, v6.1.9, v6.1.8, v6.1.7, v6.1.6, v6.1.5, v6.0.19, v6.0.18, v6.1.4, v6.1.3, v6.0.17, v6.1.2, v6.0.16, v6.1.1, v6.0.15, v6.0.14, v6.0.13, v6.1, v6.0.12, v6.0.11, v6.0.10, v5.15.80, v6.0.9, v5.15.79, v6.0.8, v5.15.78, v6.0.7, v5.15.77, v5.15.76, v6.0.6, v6.0.5, v5.15.75, v6.0.4, v6.0.3 |
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#
2f0300a6 |
| 20-Oct-2022 |
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
arm64: dts: qcom: sc7180: align TLMM pin configuration with DT schema
DT schema expects TLMM pin configuration nodes to be named with '-state' suffix and their optional children with '-pins' suffix.
arm64: dts: qcom: sc7180: align TLMM pin configuration with DT schema
DT schema expects TLMM pin configuration nodes to be named with '-state' suffix and their optional children with '-pins' suffix.
Merge subnodes named 'pinconf' and 'pinmux' into one entry, add function where missing (required by bindings for GPIOs) and reorganize overriding pins by boards.
Split the SPI and UART configuration into separate nodes 1. SPI (MOSI, MISO, SCLK), SPI chip-select, SPI chip-select via GPIO, 2. UART per each pin: TX, RX and optional CTS/RTS.
This allows each board to customize them easily without adding any new nodes.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Tested-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221020225135.31750-4-krzysztof.kozlowski@linaro.org
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Revision tags: v6.0.2, v5.15.74, v5.15.73, v6.0.1, v5.15.72, v6.0, v5.15.71, v5.15.70, v5.15.69, v5.15.68, v5.15.67, v5.15.66, v5.15.65, v5.15.64, v5.15.63, v5.15.62, v5.15.61, v5.15.60, v5.15.59, v5.19, v5.15.58, v5.15.57, v5.15.56, v5.15.55, v5.15.54, v5.15.53, v5.15.52, v5.15.51 |
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#
a10b760b |
| 27-Jun-2022 |
Stephen Boyd <swboyd@chromium.org> |
arm64: dts: qcom: sc7180-trogdor: Split out keyboard node and describe detachables
Trogdor devices that have a detachable keyboard still have a non-detachable keyboard input device present because w
arm64: dts: qcom: sc7180-trogdor: Split out keyboard node and describe detachables
Trogdor devices that have a detachable keyboard still have a non-detachable keyboard input device present because we include the cros-ec-keyboard.dtsi snippet in the top-level sc7180-trogdor.dtsi file that every variant board includes. We do this because the keyboard-controller node also provides some buttons like the power button and volume buttons. Unfortunately, this means we register a keyboard input device that doesn't do anything on boards with a detachable keyboard.
Change the node's compatible on detachables to the newly introduced "google,cros-ec-keyb-switches" compatible to indicate that there are only switches and no keyboard to register. Similarly, move the keyboard include that defines the keyboard-controller node out of sc7180-trogdor.dtsi to boards that actually have a keyboard so that the matrix properties are not defined on boards with the switches compatible. Future boards can either use the include approach or the node definition approach to describe a keyboard with possible switches or just some switches.
Cc: Benson Leung <bleung@chromium.org> Cc: Guenter Roeck <groeck@chromium.org> Cc: Douglas Anderson <dianders@chromium.org> Cc: Hsin-Yi Wang <hsinyi@chromium.org> Cc: "Joseph S. Barrera III" <joebar@chromium.org> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220627212802.3593012-1-swboyd@chromium.org
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Revision tags: v5.15.50, v5.15.49, v5.15.48, v5.15.47, v5.15.46, v5.15.45, v5.15.44, v5.15.43, v5.15.42, v5.18, v5.15.41, v5.15.40, v5.15.39, v5.15.38, v5.15.37, v5.15.36 |
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#
19794489 |
| 26-Apr-2022 |
Stephen Boyd <swboyd@chromium.org> |
arm64: dts: qcom: Only include sc7180.dtsi in sc7180-trogdor.dtsi
The SoC is always present on sc7180-trogdor.dtsi and thus we should include it in the "generic" dtsi file for trogdor. Previously we
arm64: dts: qcom: Only include sc7180.dtsi in sc7180-trogdor.dtsi
The SoC is always present on sc7180-trogdor.dtsi and thus we should include it in the "generic" dtsi file for trogdor. Previously we had removed it from there because we had to do the spi6/spi0 swizzle, so each trogdor variant board had to include sc7180.dtsi and then sc7180-trogdor.dtsi so that the latter dtsi file could modify the right spi bus for EC and H1 properties that are common to all trogdor boards.
Now that we're done with that we can replace sc7180.dtsi includes with sc7180-trogdor.dtsi and include sc7180.dtsi in sc7180-trogdor.dtsi as was originally intended. We still need to include sc7180-trogdor.dtsi before the bridge dtsi files though because those rely on the panel label.
Cc: "Joseph S. Barrera III" <joebar@chromium.org> Cc: Douglas Anderson <dianders@chromium.org> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220427020339.360855-4-swboyd@chromium.org
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#
d277cab7 |
| 26-Apr-2022 |
Stephen Boyd <swboyd@chromium.org> |
arm64: dts: qcom: sc7180-trogdor: Simplify spi0/spi6 labeling
We had to do this spi0/spi6 flip-flop on trogdor-r0 because the spi buses got swizzled between r0 and r1. The swizzle stopped after r1,
arm64: dts: qcom: sc7180-trogdor: Simplify spi0/spi6 labeling
We had to do this spi0/spi6 flip-flop on trogdor-r0 because the spi buses got swizzled between r0 and r1. The swizzle stopped after r1, but we kept this around to support either hardware possibility and to keep trogdor-r0 working.
trogdor-r0 isn't supported upstream, so this swizzle is not doing anything besides making a pattern that others tryt to copy for the EC and H1 nodes. Let's remove it and simplify the dts files.
Cc: "Joseph S. Barrera III" <joebar@chromium.org> Cc: Douglas Anderson <dianders@chromium.org> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220427020339.360855-3-swboyd@chromium.org
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#
51d30402 |
| 26-Apr-2022 |
Stephen Boyd <swboyd@chromium.org> |
arm64: dts: qcom: sc7180-trogdor: Simplify trackpad enabling
Trogdor boards with a detachable keyboard don't have a trackpad over i2c. Instead the trackpad is on the detachable keyboard base. Let's
arm64: dts: qcom: sc7180-trogdor: Simplify trackpad enabling
Trogdor boards with a detachable keyboard don't have a trackpad over i2c. Instead the trackpad is on the detachable keyboard base. Let's move the enabling of the trackpad i2c bus out of the base sc7180-trogdor.dtsi file so that each trogdor board that is detachable, of which there are many, doesn't have to disable the trackpad bus.
Cc: "Joseph S. Barrera III" <joebar@chromium.org> Cc: Douglas Anderson <dianders@chromium.org> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220427020339.360855-2-swboyd@chromium.org
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Revision tags: v5.15.35, v5.15.34, v5.15.33 |
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#
bc2fb47d |
| 06-Apr-2022 |
Rob Herring <robh@kernel.org> |
arm/arm64: dts: qcom: Fix boolean properties with values
Boolean properties in DT are present or not present and don't take a value. A property such as 'foo = <0>;' evaluated to true. IOW, the value
arm/arm64: dts: qcom: Fix boolean properties with values
Boolean properties in DT are present or not present and don't take a value. A property such as 'foo = <0>;' evaluated to true. IOW, the value doesn't matter.
It may have been intended that 0 values are false, but there is no change in behavior with this patch.
Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/Yk3m92Sj26/v1mLG@robh.at.kernel.org' Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Revision tags: v5.15.32, v5.15.31, v5.17, v5.15.30, v5.15.29, v5.15.28, v5.15.27, v5.15.26, v5.15.25, v5.15.24, v5.15.23, v5.15.22, v5.15.21, v5.15.20, v5.15.19, v5.15.18, v5.15.17, v5.4.173, v5.15.16, v5.15.15, v5.16, v5.15.10, v5.15.9, v5.15.8, v5.15.7, v5.15.6, v5.15.5, v5.15.4, v5.15.3, v5.15.2, v5.15.1, v5.15, v5.14.14, v5.14.13, v5.14.12, v5.14.11 |
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#
4537977a |
| 08-Oct-2021 |
Philip Chen <philipchen@chromium.org> |
arm64: dts: sc7180: Factor out ti-sn65dsi86 support
Factor out ti-sn65dsi86 edp bridge as a separate dts fragment. This helps us introduce the second source edp bridge later.
Signed-off-by: Philip
arm64: dts: sc7180: Factor out ti-sn65dsi86 support
Factor out ti-sn65dsi86 edp bridge as a separate dts fragment. This helps us introduce the second source edp bridge later.
Signed-off-by: Philip Chen <philipchen@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211008113839.v3.1.Ibada67e75d2982157e64164f1d11715d46cdc42c@changeid
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Revision tags: v5.14.10, v5.14.9, v5.14.8, v5.14.7, v5.14.6, v5.10.67, v5.10.66, v5.14.5, v5.14.4, v5.10.65, v5.14.3, v5.10.64, v5.14.2, v5.10.63, v5.14.1, v5.10.62 |
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#
82ea7d41 |
| 02-Sep-2021 |
Douglas Anderson <dianders@chromium.org> |
arm64: dts: qcom: sc7180: Base dynamic CPU power coefficients in reality
The sc7180's dynamic-power-coefficient violates the device tree bindings. The bindings (arm/cpus.yaml) say that the units for
arm64: dts: qcom: sc7180: Base dynamic CPU power coefficients in reality
The sc7180's dynamic-power-coefficient violates the device tree bindings. The bindings (arm/cpus.yaml) say that the units for the dynamic-power-coefficient are supposed to be "uW/MHz/V^2". The ones for sc7180 aren't this. Qualcomm arbitrarily picked 100 for the "little" CPUs and then picked a number for the big CPU based on this.
At the time, there was a giant dicussion about this. Apparently Qualcomm Engineers were instructed not to share the actual numbers here. As part of the discussion, I pointed out [1] that these numbers shouldn't really be secret since once a device is shipping anyone can just run a script and produce them. This patch is the result of running the script I posted in that discussion on sc7180-trogdor-coachz, which is currently available for purchase by consumers.
[1] https://lore.kernel.org/r/CAD=FV=U1FP0e3_AVHpauUUZtD-5X3XCwh5aT9fH_8S_FFML2Uw@mail.gmail.com/
I ran the script four times, measuring little, big, little, big. I used the 64-bit version of dhrystone 2.2 in my test. I got these results:
576 kHz, 596 mV, 20 mW, 88 Cx 768 kHz, 596 mV, 32 mW, 122 Cx 1017 kHz, 660 mV, 45 mW, 97 Cx 1248 kHz, 720 mV, 87 mW, 139 Cx 1324 kHz, 756 mV, 109 mW, 148 Cx 1516 kHz, 828 mV, 150 mW, 148 Cx 1612 kHz, 884 mV, 182 mW, 147 Cx 1708 kHz, 884 mV, 192 mW, 146 Cx 1804 kHz, 884 mV, 207 mW, 149 Cx Your dynamic-power-coefficient for cpu 0: 132
825 kHz, 596 mV, 142 mW, 401 Cx 979 kHz, 628 mV, 183 mW, 427 Cx 1113 kHz, 656 mV, 224 mW, 433 Cx 1267 kHz, 688 mV, 282 mW, 449 Cx 1555 kHz, 812 mV, 475 mW, 450 Cx 1708 kHz, 828 mV, 566 mW, 478 Cx 1843 kHz, 884 mV, 692 mW, 476 Cx 1900 kHz, 884 mV, 722 mW, 482 Cx 1996 kHz, 916 mV, 814 mW, 482 Cx 2112 kHz, 916 mV, 862 mW, 483 Cx 2208 kHz, 916 mV, 962 mW, 521 Cx 2323 kHz, 940 mV, 1060 mW, 517 Cx 2400 kHz, 956 mV, 1133 mW, 518 Cx Your dynamic-power-coefficient for cpu 6: 471
576 kHz, 596 mV, 26 mW, 103 Cx 768 kHz, 596 mV, 40 mW, 147 Cx 1017 kHz, 660 mV, 54 mW, 114 Cx 1248 kHz, 720 mV, 97 mW, 151 Cx 1324 kHz, 756 mV, 113 mW, 150 Cx 1516 kHz, 828 mV, 154 mW, 148 Cx 1612 kHz, 884 mV, 194 mW, 155 Cx 1708 kHz, 884 mV, 203 mW, 152 Cx 1804 kHz, 884 mV, 219 mW, 155 Cx Your dynamic-power-coefficient for cpu 0: 142
825 kHz, 596 mV, 148 mW, 530 Cx 979 kHz, 628 mV, 189 mW, 475 Cx 1113 kHz, 656 mV, 230 mW, 461 Cx 1267 kHz, 688 mV, 287 mW, 466 Cx 1555 kHz, 812 mV, 469 mW, 445 Cx 1708 kHz, 828 mV, 567 mW, 480 Cx 1843 kHz, 884 mV, 699 mW, 482 Cx 1900 kHz, 884 mV, 719 mW, 480 Cx 1996 kHz, 916 mV, 814 mW, 484 Cx 2112 kHz, 916 mV, 861 mW, 483 Cx 2208 kHz, 916 mV, 963 mW, 522 Cx 2323 kHz, 940 mV, 1063 mW, 520 Cx 2400 kHz, 956 mV, 1135 mW, 519 Cx Your dynamic-power-coefficient for cpu 6: 489
As you can see, the calculations aren't perfectly consistent but roughly you could say about 480 for big and 137 for little.
The ratio between these numbers isn't quite the same as the ratio between the two numbers that Qualcomm used. Perhaps this is because Qualcomm measured something slightly different than the 64-bit version of dhrystone 2.2 or perhaps it's because they fudged these numbers a bit (and fudged the capacity-dmips-mhz). As per discussion [2], let's use the numbers I came up with and also un-fudge capacity-dmips-mhz. While unfudging capacity-dmips-mhz, let's scale it so that bigs are 1024 which seems to be the common practice.
In general these numbers don't need to be perfectly exact. In fact, they can't be since the CPU power depends a lot on what's being run on the CPU and the big/little CPUs are each more or less efficient in different operations. Historically running the 32-bit vs. 64-bit versions of dhrystone produced notably different numbers, though I didn't test this time.
We also need to scale all of the sustainable-power numbers by the same amount. I scale ones related to the big CPUs by the adjustment I made to the big dynamic-power-coefficient and the ones related to the little CPUs by the adjustment I made to the little dynamic-power-coefficient.
[2] https://lore.kernel.org/r/0a865b6e-be34-6371-f9f2-9913ee1c5608@codeaurora.org/
Fixes: 71f873169a80 ("arm64: dts: qcom: sc7180: Add dynamic CPU power coefficients") Signed-off-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210902145127.v2.1.I049b30065f3c715234b6303f55d72c059c8625eb@changeid
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#
b2a98348 |
| 02-Sep-2021 |
Douglas Anderson <dianders@chromium.org> |
arm64: dts: qcom: sc7180: Base dynamic CPU power coefficients in reality
[ Upstream commit 82ea7d411d43f60dce878252558e926f957109f0 ]
The sc7180's dynamic-power-coefficient violates the device tree
arm64: dts: qcom: sc7180: Base dynamic CPU power coefficients in reality
[ Upstream commit 82ea7d411d43f60dce878252558e926f957109f0 ]
The sc7180's dynamic-power-coefficient violates the device tree bindings. The bindings (arm/cpus.yaml) say that the units for the dynamic-power-coefficient are supposed to be "uW/MHz/V^2". The ones for sc7180 aren't this. Qualcomm arbitrarily picked 100 for the "little" CPUs and then picked a number for the big CPU based on this.
At the time, there was a giant dicussion about this. Apparently Qualcomm Engineers were instructed not to share the actual numbers here. As part of the discussion, I pointed out [1] that these numbers shouldn't really be secret since once a device is shipping anyone can just run a script and produce them. This patch is the result of running the script I posted in that discussion on sc7180-trogdor-coachz, which is currently available for purchase by consumers.
[1] https://lore.kernel.org/r/CAD=FV=U1FP0e3_AVHpauUUZtD-5X3XCwh5aT9fH_8S_FFML2Uw@mail.gmail.com/
I ran the script four times, measuring little, big, little, big. I used the 64-bit version of dhrystone 2.2 in my test. I got these results:
576 kHz, 596 mV, 20 mW, 88 Cx 768 kHz, 596 mV, 32 mW, 122 Cx 1017 kHz, 660 mV, 45 mW, 97 Cx 1248 kHz, 720 mV, 87 mW, 139 Cx 1324 kHz, 756 mV, 109 mW, 148 Cx 1516 kHz, 828 mV, 150 mW, 148 Cx 1612 kHz, 884 mV, 182 mW, 147 Cx 1708 kHz, 884 mV, 192 mW, 146 Cx 1804 kHz, 884 mV, 207 mW, 149 Cx Your dynamic-power-coefficient for cpu 0: 132
825 kHz, 596 mV, 142 mW, 401 Cx 979 kHz, 628 mV, 183 mW, 427 Cx 1113 kHz, 656 mV, 224 mW, 433 Cx 1267 kHz, 688 mV, 282 mW, 449 Cx 1555 kHz, 812 mV, 475 mW, 450 Cx 1708 kHz, 828 mV, 566 mW, 478 Cx 1843 kHz, 884 mV, 692 mW, 476 Cx 1900 kHz, 884 mV, 722 mW, 482 Cx 1996 kHz, 916 mV, 814 mW, 482 Cx 2112 kHz, 916 mV, 862 mW, 483 Cx 2208 kHz, 916 mV, 962 mW, 521 Cx 2323 kHz, 940 mV, 1060 mW, 517 Cx 2400 kHz, 956 mV, 1133 mW, 518 Cx Your dynamic-power-coefficient for cpu 6: 471
576 kHz, 596 mV, 26 mW, 103 Cx 768 kHz, 596 mV, 40 mW, 147 Cx 1017 kHz, 660 mV, 54 mW, 114 Cx 1248 kHz, 720 mV, 97 mW, 151 Cx 1324 kHz, 756 mV, 113 mW, 150 Cx 1516 kHz, 828 mV, 154 mW, 148 Cx 1612 kHz, 884 mV, 194 mW, 155 Cx 1708 kHz, 884 mV, 203 mW, 152 Cx 1804 kHz, 884 mV, 219 mW, 155 Cx Your dynamic-power-coefficient for cpu 0: 142
825 kHz, 596 mV, 148 mW, 530 Cx 979 kHz, 628 mV, 189 mW, 475 Cx 1113 kHz, 656 mV, 230 mW, 461 Cx 1267 kHz, 688 mV, 287 mW, 466 Cx 1555 kHz, 812 mV, 469 mW, 445 Cx 1708 kHz, 828 mV, 567 mW, 480 Cx 1843 kHz, 884 mV, 699 mW, 482 Cx 1900 kHz, 884 mV, 719 mW, 480 Cx 1996 kHz, 916 mV, 814 mW, 484 Cx 2112 kHz, 916 mV, 861 mW, 483 Cx 2208 kHz, 916 mV, 963 mW, 522 Cx 2323 kHz, 940 mV, 1063 mW, 520 Cx 2400 kHz, 956 mV, 1135 mW, 519 Cx Your dynamic-power-coefficient for cpu 6: 489
As you can see, the calculations aren't perfectly consistent but roughly you could say about 480 for big and 137 for little.
The ratio between these numbers isn't quite the same as the ratio between the two numbers that Qualcomm used. Perhaps this is because Qualcomm measured something slightly different than the 64-bit version of dhrystone 2.2 or perhaps it's because they fudged these numbers a bit (and fudged the capacity-dmips-mhz). As per discussion [2], let's use the numbers I came up with and also un-fudge capacity-dmips-mhz. While unfudging capacity-dmips-mhz, let's scale it so that bigs are 1024 which seems to be the common practice.
In general these numbers don't need to be perfectly exact. In fact, they can't be since the CPU power depends a lot on what's being run on the CPU and the big/little CPUs are each more or less efficient in different operations. Historically running the 32-bit vs. 64-bit versions of dhrystone produced notably different numbers, though I didn't test this time.
We also need to scale all of the sustainable-power numbers by the same amount. I scale ones related to the big CPUs by the adjustment I made to the big dynamic-power-coefficient and the ones related to the little CPUs by the adjustment I made to the little dynamic-power-coefficient.
[2] https://lore.kernel.org/r/0a865b6e-be34-6371-f9f2-9913ee1c5608@codeaurora.org/
Fixes: 71f873169a80 ("arm64: dts: qcom: sc7180: Add dynamic CPU power coefficients") Signed-off-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210902145127.v2.1.I049b30065f3c715234b6303f55d72c059c8625eb@changeid Signed-off-by: Sasha Levin <sashal@kernel.org>
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Revision tags: v5.14, v5.10.61, v5.10.60, v5.10.53, v5.10.52, v5.10.51, v5.10.50, v5.10.49, v5.13, v5.10.46, v5.10.43, v5.10.42, v5.10.41, v5.10.40, v5.10.39, v5.4.119, v5.10.36, v5.10.35, v5.10.34, v5.4.116, v5.10.33, v5.12, v5.10.32, v5.10.31, v5.10.30, v5.10.27, v5.10.26 |
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#
ad6fc143 |
| 22-Mar-2021 |
Matthias Kaehlcke <mka@chromium.org> |
arm64: dts: qcom: sc7180: Add pompom rev3
The only kernel visible change with respect to rev2 is that pompom rev3 changed the charger thermistor from a 47k to a 100k NTC to use a thermistor which is
arm64: dts: qcom: sc7180: Add pompom rev3
The only kernel visible change with respect to rev2 is that pompom rev3 changed the charger thermistor from a 47k to a 100k NTC to use a thermistor which is supported by the PM6150 ADC driver.
Disable the charger thermal zone for pompom rev1 and rev2 to avoid the use of bogus temperature values from the unsupported thermistor.
Signed-off-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20210322094628.v4.2.I4138c3edee23d1efa637eef51e841d9d2e266659@changeid Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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Revision tags: v5.10.25, v5.10.24 |
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108ec20b |
| 15-Mar-2021 |
Douglas Anderson <dianders@chromium.org> |
arm64: dts: qcom: sc7180: pompom: Add "dmic_clk_en" + sound model
Match what's downstream for this board.
Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromiu
arm64: dts: qcom: sc7180: pompom: Add "dmic_clk_en" + sound model
Match what's downstream for this board.
Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Cc: Srinivasa Rao Mandadapu <srivasam@codeaurora.org> Cc: Ajit Pandey <ajitp@codeaurora.org> Cc: Judy Hsiao <judyhsiao@chromium.org> Cc: Cheng-Yi Chiang <cychiang@chromium.org> Cc: Stephen Boyd <swboyd@chromium.org> Cc: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20210315133924.v2.2.If218189eff613a6c48ba12d75fad992377d8f181@changeid Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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Revision tags: v5.10.23, v5.10.22, v5.10.21, v5.10.20 |
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08260782 |
| 01-Mar-2021 |
Douglas Anderson <dianders@chromium.org> |
arm64: dts: qcom: Add sc7180-trogdor-pompom skus
This is a trogdor variant. This is mostly a grab from the downstream tree with notable exceptions: - I skip -rev0. This was a super early build and
arm64: dts: qcom: Add sc7180-trogdor-pompom skus
This is a trogdor variant. This is mostly a grab from the downstream tree with notable exceptions: - I skip -rev0. This was a super early build and there's no advantage of long term support. - In -rev1 I translate the handling of the USB hub like is done for similar boards. See the difference between the downstream and upstream 'sc7180-trogdor-lazor-r0.dts' for an example. This will need to be resolved when proper support for the USB hub is figured out upstream. - I remove sound node since sound hasn't landed upstream yet. - In incorporate the pending <https://crrev.com/c/2719075> for the keyboard.
Cc: Philip Chen <philipchen@google.com> Cc: Matthias Kaehlcke <mka@chromium.org> Cc: Stephen Boyd <swboyd@chromium.org> Cc: Tzung-Bi Shih <tzungbi@chromium.org> Cc: Judy Hsiao <judyhsiao@chromium.org> Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/20210301133318.v2.12.If93a01b30d20dccacbad4be8ddc519dc20a51a1e@changeid Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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