arm64: dts: imx8mn: Add cpu-freq support

Add A53 OPP table, cpu regulator and speed grading node to
support cpu-freq driver.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Gu

arm64: dts: imx8mn: Add cpu-freq support

Add A53 OPP table, cpu regulator and speed grading node to
support cpu-freq driver.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

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arm64: dts: imx8mn: Add gpio-ranges property

Add "gpio-ranges" property to establish connections between GPIOs
and PINs on i.MX8MN pinctrl driver.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
S

arm64: dts: imx8mn: Add gpio-ranges property

Add "gpio-ranges" property to establish connections between GPIOs
and PINs on i.MX8MN pinctrl driver.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

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arm64: dts: freescale: Add i.MX8MN dtsi support

The i.MX8M Nano Media Applications Processor is a new SoC of the i.MX8M
family, it is a 14nm FinFET product of the growing mScale family targeting
the

arm64: dts: freescale: Add i.MX8MN dtsi support

The i.MX8M Nano Media Applications Processor is a new SoC of the i.MX8M
family, it is a 14nm FinFET product of the growing mScale family targeting
the consumer market. It is built in Samsung 14LPP to achieve both high
performance and low power consumption and relies on a powerful fully
coherent core complex based on a quad core ARM Cortex-A53 cluster,
Cortex-M7 low-power coprocessor and graphics accelerator.

This patch adds the basic dtsi support for i.MX8MN.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

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arm64: dts imx8mn: Remove non-existent USB OTG2

According to the i.MX8MN TRM, there is only one OTG port. The
address for OTG2 is reserved on Nano.

This patch removes the non-e

arm64: dts imx8mn: Remove non-existent USB OTG2

According to the i.MX8MN TRM, there is only one OTG port. The
address for OTG2 is reserved on Nano.

This patch removes the non-existent OTG2, usbphynop2, and the usbmisc2
nodes.

Fixes: 6c3debcbae47 ("arm64: dts: freescale: Add i.MX8MN dtsi support")
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

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arm64: dts: imx8m: Add the ENET PPS interrupt

The i.MX8M SoCs have a fourth ENET interrupt dedicated to PPS (Pulse Per
Second). Add support for it.

Suggested-by: Rogerio Nunes <

arm64: dts: imx8m: Add the ENET PPS interrupt

The i.MX8M SoCs have a fourth ENET interrupt dedicated to PPS (Pulse Per
Second). Add support for it.

Suggested-by: Rogerio Nunes <rogerio.nunes@nxp.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

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arm64: dts: imx8m: add mu node

Add mu node to let A53 could communicate with M Core.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>

arm64: dts: imx8m: add mu node

Add mu node to let A53 could communicate with M Core.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

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arm64: dts: imx8m: change ocotp node name on i.MX8M SoCs

Change OCOTP node name from ocotp-ctrl to efuse to be compliant with
yaml schema, it requires the nodename to be one of "eeprom|e

arm64: dts: imx8m: change ocotp node name on i.MX8M SoCs

Change OCOTP node name from ocotp-ctrl to efuse to be compliant with
yaml schema, it requires the nodename to be one of "eeprom|efuse|nvram".

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

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Merge tag 'arm-dt-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM devicetree updates from Arnd Bergmann:
"This is the set of device tree changes, mostly covering

Merge tag 'arm-dt-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM devicetree updates from Arnd Bergmann:
"This is the set of device tree changes, mostly covering new hardware
support, with 577 patches touching a little over 500 files.

There are five new Arm SoCs supported in this release, all of them for
existing SoC families:

- Realtek RTD1195, RTD1395 and RTD1619 -- three SoCs used in both NAS
devices and Android Set-top-box designs, along with the
"Horseradish", "Lion Skin" and "Mjolnir" reference platforms; the
Mele X1000 and Xnano X5 set-top-boxes and the Banana Pi BPi-M4
single-board computer.

- Renesas RZ/G1H (r8a7742) -- a high-end 32-bit industrial SoC and
the iW-RainboW-G21D-Qseven-RZG1H board/SoM

- Rockchips RK3326 -- low-end 64-bit SoC along with the Odroid-GO
Advance game console

Newly added machines on already supported SoCs are:

- AMLogic S905D based Smartlabs SML-5442TW TV box

- AMLogic S905X3 based ODROID-C4 SBC

- AMLogic S922XH based Beelink GT-King Pro TV box

- Allwinner A20 based Olimex A20-OLinuXino-LIME-eMMC SBC

- Aspeed ast2500 based BMCs in Facebook x86 "Yosemite V2" and YADRO
OpenPower P9 "Nicole"

- Marvell Kirkwood based Check Point L-50 router

- Mediatek MT8173 based Elm/Hana Chromebook laptops

- Microchip SAMA5D2 "Industrial Connectivity Platform" reference
board

- NXP i.MX8m based Beacon i.MX8m-Mini SoM development kit

- Octavo OSDMP15x based Linux Automation MC-1 development board

- Qualcomm SDM630 based Xiaomi Redmi Note 7 phone

- Realtek RTD1295 based Xnano X5 TV Box

- STMicroelectronics STM32MP1 based Stinger96 single-board computer
and IoT Box

- Samsung Exynos4210 based based Samsung Galaxy S2 phone

- Socionext Uniphier based Akebi96 SBC

- TI Keystone based K2G Evaluation board

- TI am5729 based Beaglebone-AI development board

Include device descriptions for additional hardware support in
existing SoCs and machines based on all major SoC platforms:

- AMlogic Meson

- Allwinner sunxi

- Arm Juno/VFP/Vexpress/Integrator

- Broadcom bcm283x/bcm2711

- Hisilicon hi6220

- Marvell EBU

- Mediatek MT27xx, MT76xx, MT81xx and MT67xx

- Microchip SAMA5D2

- NXP i.MX6/i.MX7/i.MX8 and Layerscape

- Nvidia Tegra

- Qualcomm Snapdragon

- Renesas r8a77961, r8a7791

- Rockchips RK32xx/RK33xx

- ST-Ericsson ux500

- STMicroelectronics SMT32

- Samsung Exynos and S5PV210

- Socionext Uniphier

- TI OMAP5/DRA7 and Keystone"

* tag 'arm-dt-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (564 commits)
ARM: dts: keystone: Rename "msmram" node to "sram"
arm: dts: mt2712: add uart APDMA to device tree
arm64: dts: mt8183: add mmc node
arm64: dts: mt2712: add ethernet device node
arm64: tegra: Make the RTC a wakeup source on Jetson Nano and TX1
ARM: dts: mmp3: Add the fifth SD HCI
ARM: dts: berlin*: Fix up the SDHCI node names
ARM: dts: mmp3: Fix USB & USB PHY node names
ARM: dts: mmp3: Fix L2 cache controller node name
ARM: dts: mmp*: Fix up encoding of the /rtc interrupts property
ARM: dts: pxa*: Fix up encoding of the /rtc interrupts property
ARM: dts: pxa910: Fix the gpio interrupt cell number
ARM: dts: pxa3xx: Fix up encoding of the /gpio interrupts property
ARM: dts: pxa168: Fix the gpio interrupt cell number
ARM: dts: pxa168: Add missing address/size cells to i2c nodes
ARM: dts: dove: Fix interrupt controller node name
ARM: dts: kirkwood: Fix interrupt controller node name
arm64: dts: Add SC9863A emmc and sd card nodes
arm64: dts: Add SC9863A clock nodes
arm64: dts: mt6358: add PMIC MT6358 related nodes
...

show more ...

arm64: dts: imx8m: assign clocks for A53

Assign IMX8M*_CLK_A53_SRC's parent to system pll1 and
assign IMX8M*_CLK_A53_CORE's parent to arm pll out as what
is done in drivers/clk/imx/c

arm64: dts: imx8m: assign clocks for A53

Assign IMX8M*_CLK_A53_SRC's parent to system pll1 and
assign IMX8M*_CLK_A53_CORE's parent to arm pll out as what
is done in drivers/clk/imx/clk-imx8m*.c, then we could remove
the settings in driver which triggers lockdep warning.

Reported-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

show more ...

arm64: dts: imx8mn: Update VDD_ARM 1.2GHz setpoint voltage

The latest datasheet Rev. 0.1, 03/2020 removes below constrain:

"If VDD_SOC/GPU/DDR = 0.95V, then VDD_ARM must be >= 0.95V

arm64: dts: imx8mn: Update VDD_ARM 1.2GHz setpoint voltage

The latest datasheet Rev. 0.1, 03/2020 removes below constrain:

"If VDD_SOC/GPU/DDR = 0.95V, then VDD_ARM must be >= 0.95V."

So, for 1.2GHz setpoint VDD_ARM can use its typical voltage
directly.

The datasheet can be downloaded from below link:
https://www.nxp.com/docs/en/data-sheet/IMX8MNCEC.pdf

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

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arm64: dts: imx8m: Fix AIPS reg properties

Commit dc3efc6ff0d5 ("arm64: dts: imx8m: fix aips dts node") caused several
dtc warnings like these when building with W=1:

arch/arm64

arm64: dts: imx8m: Fix AIPS reg properties

Commit dc3efc6ff0d5 ("arm64: dts: imx8m: fix aips dts node") caused several
dtc warnings like these when building with W=1:

arch/arm64/boot/dts/freescale/imx8mm.dtsi:265.23-542.5: Warning (simple_bus_reg): /soc@0/bus@30000000: simple-bus unit address format error, expected "301f0000"
arch/arm64/boot/dts/freescale/imx8mm.dtsi:544.23-602.5: Warning (simple_bus_reg): /soc@0/bus@30400000: simple-bus unit address format error, expected "305f0000"
arch/arm64/boot/dts/freescale/imx8mm.dtsi:604.23-862.5: Warning (simple_bus_reg): /soc@0/bus@30800000: simple-bus unit address format error, expected "309f0000"
arch/arm64/boot/dts/freescale/imx8mm.dtsi:864.23-909.5: Warning (simple_bus_reg): /soc@0/bus@32c00000: simple-bus unit address format error, expected "32df0000"

Fix them by using the correct address base and size in the AIPS reg
properties.

Fixes: dc3efc6ff0d5 ("arm64: dts: imx8m: fix aips dts node")
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

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arm64: dts: imx8mn: Change SDMA1 ahb clock for imx8mn

Using SDMA1 with UART1 is causing a "Timeout waiting for CH0" error.
This patch changes to ahb clock from SDMA1_ROOT to AHB which fi

arm64: dts: imx8mn: Change SDMA1 ahb clock for imx8mn

Using SDMA1 with UART1 is causing a "Timeout waiting for CH0" error.
This patch changes to ahb clock from SDMA1_ROOT to AHB which fixes the
timeout error.

Fixes: 6c3debcbae47 ("arm64: dts: freescale: Add i.MX8MN dtsi support")

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

show more ...

arm64: dts: imx8mn: Add snvs clock to powerkey

SNVS powerkey driver needs snvs clock for proper clock management,
add support for it.

Signed-off-by: Anson Huang <Anson.Huang@nxp

arm64: dts: imx8mn: Add snvs clock to powerkey

SNVS powerkey driver needs snvs clock for proper clock management,
add support for it.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

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arm64: dts: imx8m: fix aips dts node

Per binding doc fsl,aips-bus.yaml, compatible and reg is
required. And for reg, the AIPS configuration space should be
used, not all the AIPS bus

arm64: dts: imx8m: fix aips dts node

Per binding doc fsl,aips-bus.yaml, compatible and reg is
required. And for reg, the AIPS configuration space should be
used, not all the AIPS bus space.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

show more ...

arm64: dts: imx8mn: Add CPU thermal zone support

i.MX8MN shares same thermal sensor with i.MX8MM, add thermal zone
support for i.MX8MN.

Signed-off-by: Anson Huang <Anson.Huang@n

arm64: dts: imx8mn: Add CPU thermal zone support

i.MX8MN shares same thermal sensor with i.MX8MM, add thermal zone
support for i.MX8MN.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

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arm64: dts: imx8mn: align name for crypto child nodes

crypto child nodes should use the "jr" name (without an index),
as indicated in the DT binding.

Signed-off-by: Silvano di N

arm64: dts: imx8mn: align name for crypto child nodes

crypto child nodes should use the "jr" name (without an index),
as indicated in the DT binding.

Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com>
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

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arm64: dts: imx8mn: Adjust 1.2GHz OPP voltage to OD mode

According to latest datasheet Rev.0, 10/2019, there is restriction
as below:

"If VDD_SOC/GPU/DDR = 0.95V, then VDD_ARM m

arm64: dts: imx8mn: Adjust 1.2GHz OPP voltage to OD mode

According to latest datasheet Rev.0, 10/2019, there is restriction
as below:

"If VDD_SOC/GPU/DDR = 0.95V, then VDD_ARM must be >= 0.95V."

As by default SoC is running at OD mode(VDD_SOC = 0.95V), so
VDD_ARM 1.2GHz OPP's voltage should be increased to 0.95V.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

show more ...

arm64: dts: imx8mn: Init rates and parents configs for clocks

Add the initial configuration for clocks that need default parent and rate
setting.

NoC sources from SYS PLL3, runn

arm64: dts: imx8mn: Init rates and parents configs for clocks

Add the initial configuration for clocks that need default parent and rate
setting.

NoC sources from SYS PLL3, running at 600MHz. Audio AHB/IPG clks needs
to run at 400MHz for better performance.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

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arm64: dts: imx8mn: add clock for snvs rtc node

Initial commit adding imx8mn support:
6c3debcbae47 ("arm64: dts: freescale: Add i.MX8MN dtsi support")
added the "clock-names" propert

arm64: dts: imx8mn: add clock for snvs rtc node

Initial commit adding imx8mn support:
6c3debcbae47 ("arm64: dts: freescale: Add i.MX8MN dtsi support")
added the "clock-names" property for the snvs rtc node,
however it missed adding the clock.

Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

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arm64: dts: imx8mn: Memory node should be in board DT

Memory address/size depends on board design, so memory node should
be in board DT.

Signed-off-by: Anson Huang <Anson.Huang@

arm64: dts: imx8mn: Memory node should be in board DT

Memory address/size depends on board design, so memory node should
be in board DT.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

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arm64: dts: imx8mn: add crypto node

Add node for CAAM - Cryptographic Acceleration and Assurance Module.

Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Tested-by: Iuliana Pr

arm64: dts: imx8mn: add crypto node

Add node for CAAM - Cryptographic Acceleration and Assurance Module.

Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Tested-by: Iuliana Prodan <iuliana.prodan@nxp.com>
Reviewed-by: Iuliana Prodan <iuliana.prodan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

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arm64: dts: imx8m: drop "fsl,aips-bus" and "fsl,imx8mq-aips-bus"

There is no binding doc for these compatible string
"fsl,imx8mq-aips-bus" and "fsl,aips-bus", "simple-bus" is enough

arm64: dts: imx8m: drop "fsl,aips-bus" and "fsl,imx8mq-aips-bus"

There is no binding doc for these compatible string
"fsl,imx8mq-aips-bus" and "fsl,aips-bus", "simple-bus" is enough
for aips usage, so drop the upper two.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

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arm64: dts: imx8mn: Remove setting for IMX8MN_CLK_USB_CORE_REF

Since IMX8MN_CLK_USB_CORE_REF is not used at all, so remove the setting
for it.

Signed-off-by: Li Jun <jun.li@nxp.

arm64: dts: imx8mn: Remove setting for IMX8MN_CLK_USB_CORE_REF

Since IMX8MN_CLK_USB_CORE_REF is not used at all, so remove the setting
for it.

Signed-off-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

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arm64: dts: imx8m: Add ddr controller nodes

This is used by the imx-ddrc devfreq driver to implement dynamic
frequency scaling of DRAM.

Support for proactive scaling via interco

arm64: dts: imx8m: Add ddr controller nodes

This is used by the imx-ddrc devfreq driver to implement dynamic
frequency scaling of DRAM.

Support for proactive scaling via interconnect will come later. The
high-performance bus masters which need that (display, vpu, gpu) are
mostly not yet enabled in upstream anyway.

Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

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arm64: dts: imx8mn: remove "simple-bus" for anatop

Remove "simple-bus" compatible for device anatop,
since no child nodes exist under it and it is not
a populated bus.

Signe

arm64: dts: imx8mn: remove "simple-bus" for anatop

Remove "simple-bus" compatible for device anatop,
since no child nodes exist under it and it is not
a populated bus.

Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

show more ...