|
Revision tags: v6.6.25, v6.6.24, v6.6.23, v6.6.16, v6.6.15, v6.6.14, v6.6.13, v6.6.12, v6.6.11, v6.6.10, v6.6.9, v6.6.8, v6.6.7, v6.6.6, v6.6.5, v6.6.4, v6.6.3, v6.6.2, v6.5.11, v6.6.1, v6.5.10, v6.6, v6.5.9, v6.5.8, v6.5.7, v6.5.6, v6.5.5, v6.5.4, v6.5.3, v6.5.2, v6.1.51, v6.5.1, v6.1.50, v6.5, v6.1.49, v6.1.48, v6.1.46, v6.1.45 |
|
| #
461b487e |
| 09-Aug-2023 |
Fabio Estevam <festevam@denx.de> |
arm64: dts: imx8mm-beacon-baseboard: Remove usbotg2 pinctrl-names
There is no pinctrl description under usbotg2 node, so remove the unneeded
'pinctrl-names' property.
This fixes the following schem
arm64: dts: imx8mm-beacon-baseboard: Remove usbotg2 pinctrl-names
There is no pinctrl description under usbotg2 node, so remove the unneeded
'pinctrl-names' property.
This fixes the following schema warning:
imx8mm-beacon-kit.dtb: usb@32e50000: 'pinctrl-0' is a dependency of 'pinctrl-names'
Signed-off-by: Fabio Estevam <festevam@denx.de>
Acked-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
show more ...
|
|
Revision tags: v6.1.44, v6.1.43, v6.1.42, v6.1.41, v6.1.40, v6.1.39, v6.1.38, v6.1.37, v6.1.36, v6.4, v6.1.35 |
|
| #
9c9b1187 |
| 15-Jun-2023 |
Adam Ford <aford173@gmail.com> |
arm64: dts: imx8mm-beacon: Change camera I2C address
The DSI to HDMI bridge uses the address currently assigned to
the camera, so change the camera address to the alternative
address of 0x10 in prep
arm64: dts: imx8mm-beacon: Change camera I2C address
The DSI to HDMI bridge uses the address currently assigned to
the camera, so change the camera address to the alternative
address of 0x10 in preparation to enable the bridge.
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
show more ...
|
|
Revision tags: v6.1.34, v6.1.33, v6.1.32, v6.1.31, v6.1.30, v6.1.29, v6.1.28, v6.1.27, v6.1.26, v6.3, v6.1.25, v6.1.24, v6.1.23, v6.1.22, v6.1.21, v6.1.20, v6.1.19, v6.1.18, v6.1.17, v6.1.16, v6.1.15, v6.1.14, v6.1.13, v6.2, v6.1.12, v6.1.11, v6.1.10, v6.1.9, v6.1.8, v6.1.7 |
|
| #
3c033fb1 |
| 16-Jan-2023 |
Marek Vasut <marex@denx.de> |
arm64: dts: imx8mm: Deduplicate PCIe clock-names property
Move the PCIe clock-names property from various DTs into SoC dtsi to
reduce duplication. In case of a couple of boards, reorder the clock
so
arm64: dts: imx8mm: Deduplicate PCIe clock-names property
Move the PCIe clock-names property from various DTs into SoC dtsi to
reduce duplication. In case of a couple of boards, reorder the clock
so they match the order in yaml DT bindings.
Reviewed-by: Alexander Stein <alexander.stein@ew.tq-group.com> # imx8mm.dtsi, imx8mm-tqma8mqml-mba8mx.dts
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
show more ...
|
|
Revision tags: v6.1.6, v6.1.5, v6.0.19, v6.0.18, v6.1.4, v6.1.3, v6.0.17, v6.1.2, v6.0.16, v6.1.1, v6.0.15, v6.0.14, v6.0.13, v6.1, v6.0.12 |
|
| #
5225ba9d |
| 02-Dec-2022 |
Adam Ford <aford173@gmail.com> |
arm64: dts: imx8mm-beacon: Fix ecspi2 pinmux
Early hardware did not support hardware handshaking on the UART, but
final production hardware did. When the hardware was updated the chip
select was ch
arm64: dts: imx8mm-beacon: Fix ecspi2 pinmux
Early hardware did not support hardware handshaking on the UART, but
final production hardware did. When the hardware was updated the chip
select was changed to facilitate hardware handshaking on UART3. Fix the
ecspi2 pin mux to eliminate a pin conflict with UART3 and allow the
EEPROM to operate again.
Fixes: 4ce01ce36d77 ("arm64: dts: imx8mm-beacon: Enable RTS-CTS on UART3")
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
show more ...
|
|
Revision tags: v6.0.11, v6.0.10, v5.15.80, v6.0.9, v5.15.79, v6.0.8, v5.15.78, v6.0.7, v5.15.77, v5.15.76, v6.0.6, v6.0.5, v5.15.75, v6.0.4, v6.0.3, v6.0.2, v5.15.74, v5.15.73, v6.0.1, v5.15.72, v6.0, v5.15.71, v5.15.70, v5.15.69, v5.15.68, v5.15.67, v5.15.66, v5.15.65, v5.15.64, v5.15.63, v5.15.62, v5.15.61, v5.15.60, v5.15.59, v5.19, v5.15.58, v5.15.57, v5.15.56, v5.15.55, v5.15.54, v5.15.53, v5.15.52, v5.15.51, v5.15.50, v5.15.49, v5.15.48, v5.15.47, v5.15.46, v5.15.45, v5.15.44 |
|
| #
33597c62 |
| 26-May-2022 |
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
arm64: dts: fsl: adjust whitespace around '='
Fix whitespace coding style: use single space instead of tabs or
multiple spaces around '=' sign in property assignment. No functional
changes (same DT
arm64: dts: fsl: adjust whitespace around '='
Fix whitespace coding style: use single space instead of tabs or
multiple spaces around '=' sign in property assignment. No functional
changes (same DTB).
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
show more ...
|
|
Revision tags: v5.15.43, v5.15.42, v5.18, v5.15.41, v5.15.40, v5.15.39, v5.15.38, v5.15.37, v5.15.36 |
|
| #
4ce01ce3 |
| 26-Apr-2022 |
Adam Ford <aford173@gmail.com> |
arm64: dts: imx8mm-beacon: Enable RTS-CTS on UART3
There is a header for a DB9 serial port, but any attempts to use
hardware handshaking fail. Enable RTS and CTS pin muxing and enable
handshaking i
arm64: dts: imx8mm-beacon: Enable RTS-CTS on UART3
There is a header for a DB9 serial port, but any attempts to use
hardware handshaking fail. Enable RTS and CTS pin muxing and enable
handshaking in the uart node.
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
show more ...
|
|
Revision tags: v5.15.35, v5.15.34, v5.15.33, v5.15.32, v5.15.31, v5.17, v5.15.30, v5.15.29, v5.15.28, v5.15.27, v5.15.26, v5.15.25, v5.15.24, v5.15.23, v5.15.22, v5.15.21 |
|
| #
f471b9a5 |
| 05-Feb-2022 |
Adam Ford <aford173@gmail.com> |
arm64: dts: imx8mm-beacon: Enable PCIe
The baseboard supports a PCIe slot with a 100MHz reference clock,
but it's controlled by a different GPIO, so a gated clock is
required.
Signed-off-by: Adam F
arm64: dts: imx8mm-beacon: Enable PCIe
The baseboard supports a PCIe slot with a 100MHz reference clock,
but it's controlled by a different GPIO, so a gated clock is
required.
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
show more ...
|
|
Revision tags: v5.15.20, v5.15.19, v5.15.18, v5.15.17, v5.4.173, v5.15.16, v5.15.15, v5.16, v5.15.10, v5.15.9, v5.15.8, v5.15.7, v5.15.6 |
|
| #
9f046930 |
| 28-Nov-2021 |
Adam Ford <aford173@gmail.com> |
arm64: dts: imx8mm-beacon: Enable OV5640 Camera
The baseboard has support for a TDNext 5640 Camera which
uses an OV5640 connected to a 2-lane CSI2 interface.
With the CSI and mipi_csi2 drivers poin
arm64: dts: imx8mm-beacon: Enable OV5640 Camera
The baseboard has support for a TDNext 5640 Camera which
uses an OV5640 connected to a 2-lane CSI2 interface.
With the CSI and mipi_csi2 drivers pointing to an OV5640 camera, the media
pipeline can be configured with the following:
media-ctl --links "'ov5640 1-003c':0->'imx7-mipi-csis.0':0[1]"
The camera and various nodes in the pipeline can be configured for UYVY:
media-ctl -v -V "'ov5640 1-003c':0 [fmt:UYVY8_1X16/640x480 field:none]"
media-ctl -v -V "'csi':0 [fmt:UYVY8_1X16/640x480 field:none]"
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
show more ...
|
|
Revision tags: v5.15.5, v5.15.4, v5.15.3, v5.15.2, v5.15.1 |
|
| #
e3f77507 |
| 04-Nov-2021 |
Adam Ford <aford173@gmail.com> |
arm64: dts: imx8mm-beacon: Enable USB Controllers
The i.MX8M Mini has two available USB controllers. On the
imx8mm-beacon board, USB1 is routed to a mini-USB port with
OTG functionality. USB2 is r
arm64: dts: imx8mm-beacon: Enable USB Controllers
The i.MX8M Mini has two available USB controllers. On the
imx8mm-beacon board, USB1 is routed to a mini-USB port with
OTG functionality. USB2 is routed to a USB hub which has
three host-only ports connected to it.
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
show more ...
|
| #
5628b9fe |
| 26-Apr-2022 |
Adam Ford <aford173@gmail.com> |
arm64: dts: imx8mm-beacon: Enable RTS-CTS on UART3
commit 4ce01ce36d77137cf60776b320babed89de6bd4c upstream.
There is a header for a DB9 serial port, but any attempts to use
hardware handshaking fa
arm64: dts: imx8mm-beacon: Enable RTS-CTS on UART3
commit 4ce01ce36d77137cf60776b320babed89de6bd4c upstream.
There is a header for a DB9 serial port, but any attempts to use
hardware handshaking fail. Enable RTS and CTS pin muxing and enable
handshaking in the uart node.
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
show more ...
|
| #
5628b9fe |
| 26-Apr-2022 |
Adam Ford <aford173@gmail.com> |
arm64: dts: imx8mm-beacon: Enable RTS-CTS on UART3
commit 4ce01ce36d77137cf60776b320babed89de6bd4c upstream.
There is a header for a DB9 serial port, but any attempts to use
hardware handshaking fa
arm64: dts: imx8mm-beacon: Enable RTS-CTS on UART3
commit 4ce01ce36d77137cf60776b320babed89de6bd4c upstream.
There is a header for a DB9 serial port, but any attempts to use
hardware handshaking fail. Enable RTS and CTS pin muxing and enable
handshaking in the uart node.
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
show more ...
|
|
Revision tags: v5.15, v5.14.14, v5.14.13, v5.14.12, v5.14.11, v5.14.10, v5.14.9, v5.14.8, v5.14.7, v5.14.6, v5.10.67, v5.10.66, v5.14.5, v5.14.4, v5.10.65, v5.14.3, v5.10.64, v5.14.2, v5.10.63, v5.14.1, v5.10.62, v5.14, v5.10.61, v5.10.60, v5.10.53, v5.10.52, v5.10.51, v5.10.50, v5.10.49, v5.13, v5.10.46, v5.10.43, v5.10.42, v5.10.41, v5.10.40, v5.10.39, v5.4.119, v5.10.36, v5.10.35, v5.10.34, v5.4.116, v5.10.33, v5.12, v5.10.32, v5.10.31, v5.10.30, v5.10.27, v5.10.26, v5.10.25, v5.10.24, v5.10.23, v5.10.22, v5.10.21, v5.10.20, v5.10.19, v5.4.101, v5.10.18, v5.10.17, v5.11, v5.10.16, v5.10.15, v5.10.14 |
|
| #
190621e0 |
| 17-Dec-2020 |
Adam Ford <aford173@gmail.com> |
arm64: dts: imx8mm-beacon: Drop unused clock-names reference
The wlf,wm8962 driver does not use the clock-names property.
Drop it.
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Shawn
arm64: dts: imx8mm-beacon: Drop unused clock-names reference
The wlf,wm8962 driver does not use the clock-names property.
Drop it.
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
show more ...
|
|
Revision tags: v5.10, v5.8.17, v5.8.16, v5.8.15, v5.9, v5.8.14, v5.8.13, v5.8.12, v5.8.11, v5.8.10, v5.8.9, v5.8.8, v5.8.7, v5.8.6, v5.4.62 |
|
| #
0a96ec9b |
| 28-Aug-2020 |
Krzysztof Kozlowski <krzk@kernel.org> |
arm64: dts: imx8mm-beacon: Align pin configuration group names with schema
Device tree schema expects pin configuration groups to end with 'grp'
suffix. This fixes dtbs_check warnings like:
pinc
arm64: dts: imx8mm-beacon: Align pin configuration group names with schema
Device tree schema expects pin configuration groups to end with 'grp'
suffix. This fixes dtbs_check warnings like:
pinctrl@30330000: 'pcal6414-gpio', 'pmicirq', 'usdhc1grp100mhz', 'usdhc1grp200mhz', 'usdhc1grpgpio',
'usdhc2grp100mhz', 'usdhc2grp200mhz', 'usdhc2grpgpio', 'usdhc3grp100mhz', 'usdhc3grp200mhz'
do not match any of the regexes: 'grp$', 'pinctrl-[0-9]+'
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
show more ...
|
|
Revision tags: v5.8.5, v5.8.4, v5.4.61 |
|
| #
2eedac07 |
| 24-Aug-2020 |
Krzysztof Kozlowski <krzk@kernel.org> |
arm64: dts: imx8mm-beacon-baseboard: Correct LED default state
There is no LED default state "none". leds-gpio driver maps it to
"off", so correct them to fix dtbs_check warnings like:
arch/arm6
arm64: dts: imx8mm-beacon-baseboard: Correct LED default state
There is no LED default state "none". leds-gpio driver maps it to
"off", so correct them to fix dtbs_check warnings like:
arch/arm64/boot/dts/freescale/imx8mm-beacon-kit.dt.yaml:
leds: led0:default-state:0: 'none' is not one of ['on', 'off', 'keep']
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
show more ...
|
|
Revision tags: v5.8.3, v5.4.60 |
|
| #
843b993c |
| 19-Aug-2020 |
Fabio Estevam <festevam@gmail.com> |
arm64: dts: imx8m: Fix the SPI chipselect polarity
The conversion of the spi-imx driver to use GPIO descriptors
in commit 8cdcd8aeee28 ("spi: imx/fsl-lpspi: Convert to GPIO descriptors")
helped to d
arm64: dts: imx8m: Fix the SPI chipselect polarity
The conversion of the spi-imx driver to use GPIO descriptors
in commit 8cdcd8aeee28 ("spi: imx/fsl-lpspi: Convert to GPIO descriptors")
helped to detect the following SPI chipselect polarity mismatch on an
imx6q-sabresd for example:
[ 4.854337] m25p80@0 enforce active low on chipselect handle
Prior to the above commit, the chipselect polarity passed via cs-gpios
property was ignored and considered active-low.
The reason for such mismatch is clearly explained in the comments inside
drivers/gpio/gpiolib-of.c:
* SPI children have active low chip selects
* by default. This can be specified negatively
* by just omitting "spi-cs-high" in the
* device node, or actively by tagging on
* GPIO_ACTIVE_LOW as flag in the device
* tree. If the line is simultaneously
* tagged as active low in the device tree
* and has the "spi-cs-high" set, we get a
* conflict and the "spi-cs-high" flag will
* take precedence.
To properly represent the SPI chipselect polarity, change it to active-low
when the "spi-cs-high" property is absent.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
show more ...
|
|
Revision tags: v5.8.2, v5.4.59, v5.8.1, v5.4.58, v5.4.57, v5.4.56, v5.8, v5.7.12, v5.4.55, v5.7.11, v5.4.54, v5.7.10, v5.4.53, v5.4.52, v5.7.9, v5.7.8, v5.4.51, v5.4.50, v5.7.7, v5.4.49, v5.7.6, v5.7.5, v5.4.48, v5.7.4, v5.7.3, v5.4.47, v5.4.46, v5.7.2, v5.4.45, v5.7.1, v5.4.44, v5.7, v5.4.43, v5.4.42, v5.4.41, v5.4.40, v5.4.39, v5.4.38, v5.4.37, v5.4.36, v5.4.35, v5.4.34, v5.4.33, v5.4.32, v5.4.31, v5.4.30, v5.4.29, v5.6, v5.4.28 |
|
| #
593816fa |
| 24-Mar-2020 |
Adam Ford <aford173@gmail.com> |
arm64: dts: imx: Add Beacon i.MX8m-Mini development kit
Beacon Embeddedworks is launching a development kit based on the
i.MX8M Mini SoC. The kit consists of a System on Module (SOM)
+ baseboard.
arm64: dts: imx: Add Beacon i.MX8m-Mini development kit
Beacon Embeddedworks is launching a development kit based on the
i.MX8M Mini SoC. The kit consists of a System on Module (SOM)
+ baseboard. The SOM has the SoC, eMMC, and Ethernet. The baseboard
has an wm8962 audio CODEC, a single USB OTG, and three USB host ports.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
show more ...
|
|
Revision tags: v5.10, v5.8.17, v5.8.16, v5.8.15, v5.9, v5.8.14, v5.8.13, v5.8.12, v5.8.11, v5.8.10, v5.8.9, v5.8.8, v5.8.7, v5.8.6, v5.4.62 |
|
| #
0a96ec9b |
| 28-Aug-2020 |
Krzysztof Kozlowski <krzk@kernel.org> |
arm64: dts: imx8mm-beacon: Align pin configuration group names with schema
Device tree schema expects pin configuration groups to end with 'grp'
suffix. This fixes dtbs_check warnings l
arm64: dts: imx8mm-beacon: Align pin configuration group names with schema
Device tree schema expects pin configuration groups to end with 'grp'
suffix. This fixes dtbs_check warnings like:
pinctrl@30330000: 'pcal6414-gpio', 'pmicirq', 'usdhc1grp100mhz', 'usdhc1grp200mhz', 'usdhc1grpgpio',
'usdhc2grp100mhz', 'usdhc2grp200mhz', 'usdhc2grpgpio', 'usdhc3grp100mhz', 'usdhc3grp200mhz'
do not match any of the regexes: 'grp$', 'pinctrl-[0-9]+'
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
show more ...
|
|
Revision tags: v5.8.5, v5.8.4, v5.4.61 |
|
| #
2eedac07 |
| 24-Aug-2020 |
Krzysztof Kozlowski <krzk@kernel.org> |
arm64: dts: imx8mm-beacon-baseboard: Correct LED default state
There is no LED default state "none". leds-gpio driver maps it to
"off", so correct them to fix dtbs_check warnings like:
arm64: dts: imx8mm-beacon-baseboard: Correct LED default state
There is no LED default state "none". leds-gpio driver maps it to
"off", so correct them to fix dtbs_check warnings like:
arch/arm64/boot/dts/freescale/imx8mm-beacon-kit.dt.yaml:
leds: led0:default-state:0: 'none' is not one of ['on', 'off', 'keep']
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
show more ...
|
|
Revision tags: v5.8.3, v5.4.60 |
|
| #
843b993c |
| 19-Aug-2020 |
Fabio Estevam <festevam@gmail.com> |
arm64: dts: imx8m: Fix the SPI chipselect polarity
The conversion of the spi-imx driver to use GPIO descriptors
in commit 8cdcd8aeee28 ("spi: imx/fsl-lpspi: Convert to GPIO descriptors")
arm64: dts: imx8m: Fix the SPI chipselect polarity
The conversion of the spi-imx driver to use GPIO descriptors
in commit 8cdcd8aeee28 ("spi: imx/fsl-lpspi: Convert to GPIO descriptors")
helped to detect the following SPI chipselect polarity mismatch on an
imx6q-sabresd for example:
[ 4.854337] m25p80@0 enforce active low on chipselect handle
Prior to the above commit, the chipselect polarity passed via cs-gpios
property was ignored and considered active-low.
The reason for such mismatch is clearly explained in the comments inside
drivers/gpio/gpiolib-of.c:
* SPI children have active low chip selects
* by default. This can be specified negatively
* by just omitting "spi-cs-high" in the
* device node, or actively by tagging on
* GPIO_ACTIVE_LOW as flag in the device
* tree. If the line is simultaneously
* tagged as active low in the device tree
* and has the "spi-cs-high" set, we get a
* conflict and the "spi-cs-high" flag will
* take precedence.
To properly represent the SPI chipselect polarity, change it to active-low
when the "spi-cs-high" property is absent.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Revision tags: v5.8.2, v5.4.59, v5.8.1, v5.4.58, v5.4.57, v5.4.56, v5.8, v5.7.12, v5.4.55, v5.7.11, v5.4.54, v5.7.10, v5.4.53, v5.4.52, v5.7.9, v5.7.8, v5.4.51, v5.4.50, v5.7.7, v5.4.49, v5.7.6, v5.7.5, v5.4.48, v5.7.4, v5.7.3, v5.4.47, v5.4.46, v5.7.2, v5.4.45, v5.7.1, v5.4.44, v5.7, v5.4.43, v5.4.42, v5.4.41, v5.4.40, v5.4.39, v5.4.38, v5.4.37, v5.4.36, v5.4.35, v5.4.34, v5.4.33, v5.4.32, v5.4.31, v5.4.30, v5.4.29, v5.6, v5.4.28 |
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593816fa |
| 24-Mar-2020 |
Adam Ford <aford173@gmail.com> |
arm64: dts: imx: Add Beacon i.MX8m-Mini development kit
Beacon Embeddedworks is launching a development kit based on the
i.MX8M Mini SoC. The kit consists of a System on Module (SOM)
arm64: dts: imx: Add Beacon i.MX8m-Mini development kit
Beacon Embeddedworks is launching a development kit based on the
i.MX8M Mini SoC. The kit consists of a System on Module (SOM)
+ baseboard. The SOM has the SoC, eMMC, and Ethernet. The baseboard
has an wm8962 audio CODEC, a single USB OTG, and three USB host ports.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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