History log of /openbmc/linux/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi (Results 101 – 125 of 147)
Revision (<<< Hide revision tags) (Show revision tags >>>) Date Author Comments
Revision tags: v5.4.42, v5.4.41, v5.4.40, v5.4.39, v5.4.38, v5.4.37, v5.4.36, v5.4.35, v5.4.34, v5.4.33, v5.4.32, v5.4.31, v5.4.30, v5.4.29, v5.6, v5.4.28, v5.4.27, v5.4.26
# dd12fa69 17-Mar-2020 Vladimir Oltean <vladimir.oltean@nxp.com>

arm64: dts: ls1028a: Specify the DMA channels for the DSPI controllers

LS1028A has a functional connection to the eDMA module. Even if the
spi-fsl-dspi.c driver is not using DMA for LS10

arm64: dts: ls1028a: Specify the DMA channels for the DSPI controllers

LS1028A has a functional connection to the eDMA module. Even if the
spi-fsl-dspi.c driver is not using DMA for LS1028A now, define the slots
in the DMAMUX for connecting the eDMA channels to the 3 DSPI
controllers.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

show more ...


Revision tags: v5.4.25
# e0d7856e 06-Mar-2020 Michael Walle <michael@walle.cc>

arm64: dts: ls1028a: add "fsl,vf610-edma" compatible

The bootloader does the IOMMU fixup and dynamically adds the "iommus"
property to devices according to its compatible string. In case

arm64: dts: ls1028a: add "fsl,vf610-edma" compatible

The bootloader does the IOMMU fixup and dynamically adds the "iommus"
property to devices according to its compatible string. In case of the
eDMA controller this property is missing. Add it. After that the IOMMU
will work with the eDMA core.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

show more ...


# 854e80bc 03-Apr-2020 Linus Torvalds <torvalds@linux-foundation.org>

Merge tag 'arm-dt-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM devicetree updates from Arnd Bergmann:
"Most of the commits are for additional hardware support

Merge tag 'arm-dt-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM devicetree updates from Arnd Bergmann:
"Most of the commits are for additional hardware support and minor
fixes for existing machines for all the usual platforms: qcom,
amlogic, at91, gemini, mediatek, ti, socfpga, i.mx, layerscape,
uniphier, rockchip, exynos, ux500, mvebu, tegra, stm32, renesas,
sunxi, broadcom, omap, and versatile.

The conversion of binding files to machine-readable yaml format
continues, along with fixes found during the validation. Andre
Przywara takes over maintainership for the old Calxeda Highbank
platform and provides a number of updates.

The OMAP2+ platforms see a continued move from platform data into dts
files, for many devices that relied on a mix of auxiliary data in
addition to the DT description

A moderate number of new SoCs and machines are added, here is a full
list:

- Two new Qualcomm SoCs with their evaluation boards: Snapdragon 865
(SM8250) is the current high-end phone chip, and IPQ6018 is a new
WiFi-6 router chip.

- Mediatek MT8516 application processor SoC for voice assistants,
along with the "pumpkin" development board

- NXP i.MX8M Plus SoC, a variant of the popular i.MX8M, along with an
evaluation board.

- Kontron "sl28" board family based on NXP LS1028A

- Eleven variations of the new i.MX6 TechNexion Pico board, combining
the "dwarf", "hobbit", "nymph" and "pi" baseboards with i.MX6/i.MX7
SoM carriers

- Three additional variants of the Toradex Colibri board family, all
based on versions of the NXP i.MX7.

- The Pinebook Pro laptop based on Rockchip RK3399

- Samsung S7710 Galaxy Xcover 2, a 2013 vintage Android phone based
on the ST-Ericsson u8500 platform

- DH Electronics DHCOM SoM and PDK2 rev. 400 carrier based on
STMicroelectronics stm32mp157

- Renesas M3ULCB starter kit for R-Car M3-W+

- Hoperun HiHope development board with Renesas RZ/G2M

- Pine64 PineTab tablet and PinePhone phone, both based on Allwinner
A64

- Linutronix Testbox v2 for the Lamobo R1 router, based on Allwinner
A20

- PocketBook Touch Lux 3 ebook reader, based on Allwinner A13"

* tag 'arm-dt-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (520 commits)
ARM: dts: ux500: Fix missing node renames
arm64: dts: Revert "specify console via command line"
MAINTAINERS: Update Calxeda Highbank maintainership
arm: dts: calxeda: Group port-phys and sgpio-gpio items
arm: dts: calxeda: Fix interrupt grouping
arm: dts: calxeda: Provide UART clock
arm: dts: calxeda: Basic DT file fixes
arm64: dts: specify console via command line
ARM: dts: at91: sama5d27_wlsom1_ek: add USB device node
ARM: dts: gemini: Add thermal zone to DIR-685
ARM: dts: gemini: Rename IDE nodes
ARM: socfpga: arria10: Add ptp_ref clock to ethernet nodes
arm64: dts: ti: k3-j721e-mcu: add scm node and phy-gmii-sel nodes
arm64: dts: ti: k3-am65-mcu: add phy-gmii-sel node
arm64: dts: ti: k3-am65-mcu: Add DMA entries for ADC
arm64: dts: ti: k3-am65-main: Add DMA entries for main_spi0
arm64: dts: ti: k3-j721e-mcu-wakeup: Add DMA entries for ADC
arm64: dts: ti: k3-am65: Add clocks to dwc3 nodes
arm64: dts: meson-g12b-odroid-n2: add SPIFC controller node
arm64: dts: khadas-vim3: add SPIFC controller node
...

show more ...


# 1f944f97 31-Mar-2020 Linus Torvalds <torvalds@linux-foundation.org>

Merge tag 'tty-5.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty

Pull tty/serial updates from Greg KH:
"Here is the big set of TTY / Serial patches for 5.7-rc1

Merge tag 'tty-5.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty

Pull tty/serial updates from Greg KH:
"Here is the big set of TTY / Serial patches for 5.7-rc1

Lots of console fixups and reworking in here, serial core tweaks
(doesn't that ever get old, why are we still creating new serial
devices?), serial driver updates, line-protocol driver updates, and
some vt cleanups and fixes included in here as well.

All have been in linux-next with no reported issues"

* tag 'tty-5.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty: (161 commits)
serial: 8250: Optimize irq enable after console write
serial: 8250: Fix rs485 delay after console write
vt: vt_ioctl: fix use-after-free in vt_in_use()
vt: vt_ioctl: fix VT_DISALLOCATE freeing in-use virtual console
tty: serial: make SERIAL_SPRD depend on COMMON_CLK
tty: serial: fsl_lpuart: fix return value checking
tty: serial: fsl_lpuart: move dma_request_chan()
ARM: dts: tango4: Make /serial compatible with ns16550a
ARM: dts: mmp*: Make the serial ports compatible with xscale-uart
ARM: dts: mmp*: Fix serial port names
ARM: dts: mmp2-brownstone: Don't redeclare phandle references
ARM: dts: pxa*: Make the serial ports compatible with xscale-uart
ARM: dts: pxa*: Fix serial port names
ARM: dts: pxa*: Don't redeclare phandle references
serial: omap: drop unused dt-bindings header
serial: 8250: 8250_omap: Add DMA support for UARTs on K3 SoCs
serial: 8250: 8250_omap: Work around errata causing spurious IRQs with DMA
serial: 8250: 8250_omap: Extend driver data to pass FIFO trigger info
serial: 8250: 8250_omap: Move locking out from __dma_rx_do_complete()
serial: 8250: 8250_omap: Account for data in flight during DMA teardown
...

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# 9b631649 22-Mar-2020 Linus Walleij <linus.walleij@linaro.org>

arm64: dts: Fix leftover entry-methods for PSCI

These two device trees were either missed or added after
the commit correcting the "entry-method" from
"arm,psci" to just "psci" as pe

arm64: dts: Fix leftover entry-methods for PSCI

These two device trees were either missed or added after
the commit correcting the "entry-method" from
"arm,psci" to just "psci" as per the binding.

Link: https://lore.kernel.org/r/20200322115846.16265-1-linus.walleij@linaro.org
Cc: Sudeep Holla <sudeep.holla@arm.com>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Chunyan Zhang <chunyan.zhang@unisoc.com>
Reviewed-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

show more ...


# 630952e1 12-Mar-2020 Michael Walle <michael@walle.cc>

arm64: dts: ls1028a: disable the felix switch by default

Disable the felix switch by default and enable it per board which are
actually using it.

Signed-off-by: Michael Walle <m

arm64: dts: ls1028a: disable the felix switch by default

Disable the felix switch by default and enable it per board which are
actually using it.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

show more ...


# f6ff3f6d 11-Mar-2020 Xiaowei Bao <xiaowei.bao@nxp.com>

arm64: dts: ls1028a: Add PCIe controller DT nodes

LS1028a implements 2 PCIe 3.0 controllers.

Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqia

arm64: dts: ls1028a: Add PCIe controller DT nodes

LS1028a implements 2 PCIe 3.0 controllers.

Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Tested-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

show more ...


# 2607d724 07-Mar-2020 Michael Walle <michael@walle.cc>

arm64: dts: ls1028a: add missing LPUART nodes

The LS1028A has six LPUART controllers. Add the nodes.

This was tested on a custom board.

Signed-off-by: Michael Walle <michae

arm64: dts: ls1028a: add missing LPUART nodes

The LS1028A has six LPUART controllers. Add the nodes.

This was tested on a custom board.

Signed-off-by: Michael Walle <michael@walle.cc>
Link: https://lore.kernel.org/r/20200307091302.14881-2-michael@walle.cc
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

show more ...


Revision tags: v5.4.24, v5.4.23
# b1520d8b 24-Feb-2020 Claudiu Manoil <claudiu.manoil@nxp.com>

arm64: dts: ls1028a: add node for Felix switch

Add the switch device node, available on PF5, so that the switch port
sub-nodes (net devices) can be linked to corresponding board specific

arm64: dts: ls1028a: add node for Felix switch

Add the switch device node, available on PF5, so that the switch port
sub-nodes (net devices) can be linked to corresponding board specific
phy nodes (external ports) or have their link mode defined (internal
ports).

The switch device features 6 ports, 4 with external links and 2
internally facing to the LS1028A SoC and connected via fixed links to 2
internal ENETC Ethernet controller ports.

Add the corresponding ENETC host port device nodes, mapped to PF2 and
PF6 PCIe functions. Since the switch only supports tagging on one CPU
port, only one port pair (swp4, eno2) is enabled by default and the
other, lower speed, port pair is disabled to prevent the PCI core from
probing them. If enabled, swp5 will be a fixed-link slave port.

DSA tagging can also be moved from the swp4-eno2 2.5G port pair to the
1G swp5-eno3 pair by changing the ethernet = <&enetc_port2> phandle to
<&enetc_port3> and moving it under port5, but in that case enetc_port2
should not be disabled, because it is the hardware owner of the Felix
PCS and disabling its memory would result in access faults in the Felix
DSA driver.

All ports are disabled by default, including the CPU port, and need to
be enabled on a per-board basis.

The phy-mode binding of the internal ENETC ports was modified from
"gmii" to "internal" to match the phy-mode of the internal-facing switch
ports connected to them. The ENETC driver does not perform any phy_mode
validation anyway, so the change is only cosmetic. Also, enetc_port2 is
defined as a fixed-link 1000 Mbps port even though it is 2500 Mbps (as
can be seen by the fact that it is connected to mscc_felix_port4). The
fact that it is currently defined as 1000 Mbps is an artifact of its
PHYLIB implementation instead of PHYLINK (the former can't describe a
fixed-link speed higher than what swphy can emulate from the Clause 22
MDIO spec).

The switch's INTB interrupt line signals:
- PTP TX timestamp availability
- TSN Frame Preemption

And don't forget to enable the 4MB BAR4 in the root complex ECAM space,
where the switch registers are mapped.

Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Tested-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

show more ...


Revision tags: v5.4.22
# 1a4bfe0f 23-Feb-2020 Vladimir Oltean <vladimir.oltean@nxp.com>

arm64: dts: ls1028a: disable all enetc ports by default

There are few boards that enable all ENETC ports, so instead of having
board DTs disable them, do so in the DTSI and have the boar

arm64: dts: ls1028a: disable all enetc ports by default

There are few boards that enable all ENETC ports, so instead of having
board DTs disable them, do so in the DTSI and have the boards enable the
ports they use.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

show more ...


# 8023321d 23-Feb-2020 Vladimir Oltean <vladimir.oltean@nxp.com>

arm64: dts: ls1028a: delete extraneous #interrupt-cells for ENETC RCIE

This specifier overrides the interrupt specifier with 3 cells from gic
(/interrupt-controller@6000000), but in fact

arm64: dts: ls1028a: delete extraneous #interrupt-cells for ENETC RCIE

This specifier overrides the interrupt specifier with 3 cells from gic
(/interrupt-controller@6000000), but in fact ENETC is not an interrupt
controller, so the property is bogus.

Interrupts used by the children of the ENETC RCIE must use the full
3-cell specifier required by the GIC.

The issue has no functional consequence so there is no real reason to
port the patch to stable trees.

Fixes: 927d7f857542 ("arm64: dts: fsl: ls1028a: Add PCI IERC node and ENETC endpoints")
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Tested-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

show more ...


Revision tags: v5.4.21
# c2d35ada 18-Feb-2020 Michael Walle <michael@walle.cc>

arm64: dts: ls1028a: add missing SPI nodes

The LS1028A has three (dual) SPI controller. These are compatible with
the ones from the LS1021A. Add the nodes.

The third controller

arm64: dts: ls1028a: add missing SPI nodes

The LS1028A has three (dual) SPI controller. These are compatible with
the ones from the LS1021A. Add the nodes.

The third controller was tested on a custom board.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

show more ...


Revision tags: v5.4.20, v5.4.19
# ab84bad5 10-Feb-2020 Yangbo Lu <yangbo.lu@nxp.com>

arm64: dts: ls1028a: support external trigger timestamp fifo of PTP timer

There is an external trigger timestamp fifo for PTP timer
of LS1028A. Add property fsl,extts-fifo for that.

arm64: dts: ls1028a: support external trigger timestamp fifo of PTP timer

There is an external trigger timestamp fifo for PTP timer
of LS1028A. Add property fsl,extts-fifo for that.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

show more ...


# 1afa9c3b 08-Feb-2020 Linus Torvalds <torvalds@linux-foundation.org>

Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM Device-tree updates from Olof Johansson:
"New SoCs:

- Atmel/Microchip SAM9X60 (ARM926

Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM Device-tree updates from Olof Johansson:
"New SoCs:

- Atmel/Microchip SAM9X60 (ARM926 SoC)

- OMAP 37xx gets split into AM3703/AM3715/DM3725, who are all
variants of it with different GPU/media IP configurations.

- ST stm32mp15 SoCs (1-2 Cortex-A7, CAN, GPU depending on SKU)

- ST Ericsson ab8505 (variant of ab8500) and db8520 (variant of
db8500)

- Unisoc SC9863A SoC (8x Cortex-A55 mobile chipset w/ GPU, modem)

- Qualcomm SC7180 (8-core 64bit SoC, unnamed CPU class)

New boards:

- Allwinner:
+ Emlid Neutis SoM (H3 variant)
+ Libre Computer ALL-H3-IT
+ PineH64 Model B

- Amlogic:
+ Libretech Amlogic GX PC (s905d and s912-based variants)

- Atmel/Microchip:
+ Kizboxmini, sam9x60 EK, sama5d27 Wireless SOM (wlsom1)

- Marvell:
+ Armada 385-based SolidRun Clearfog GTR

- NXP:
+ Gateworks GW59xx boards based on i.MX6/6Q/6QDL
+ Tolino Shine 3 eBook reader (i.MX6sl)
+ Embedded Artists COM (i.MX7ULP)
+ SolidRun CLearfog CX/ITX and HoneyComb (LX2160A-based systems)
+ Google Coral Edge TPU (i.MX8MQ)

- Rockchip:
+ Radxa Dalang Carrier (supports rk3288 and rk3399 SOMs)
+ Radxa Rock Pi N10 (RK3399Pro-based)
+ VMARC RK3399Pro SOM

- ST:
+ Reference boards for stm32mp15

- ST Ericsson:
+ Samsung Galaxy S III mini (GT-I8190)
+ HREF520 reference board for DB8520

- TI OMAP:
+ Gen1 Amazon Echo (OMAP3630-based)

- Qualcomm:
+ Inforce 6640 Single Board Computer (msm8996-based)
+ SC7180 IDP (SC7180-based)"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (623 commits)
dt-bindings: fix compilation error of the example in marvell,mmp3-hsic-phy.yaml
arm64: dts: ti: k3-am654-base-board: Add CSI2 OV5640 camera
arm64: dts: ti: k3-am65-main Add CAL node
arm64: dts: ti: k3-j721e-main: Add McASP nodes
arm64: dts: ti: k3-am654-main: Add McASP nodes
arm64: dts: ti: k3-j721e: DMA support
arm64: dts: ti: k3-j721e-main: Move secure proxy and smmu under main_navss
arm64: dts: ti: k3-j721e-main: Correct main NAVSS representation
arm64: dts: ti: k3-j721e: Correct the address for MAIN NAVSS
arm64: dts: ti: k3-am65: DMA support
arm64: dts: ti: k3-am65-main: Move secure proxy under cbass_main_navss
arm64: dts: ti: k3-am65-main: Correct main NAVSS representation
ARM: dts: aspeed: rainier: Add UCD90320 power sequencer
ARM: dts: aspeed: rainier: Switch PSUs to unknown version
arm64: dts: rockchip: Kill off "simple-panel" compatibles
ARM: dts: rockchip: Kill off "simple-panel" compatibles
arm64: dts: rockchip: rename dwmmc node names to mmc
ARM: dts: rockchip: rename dwmmc node names to mmc
arm64: dts: exynos: Rename Samsung and Exynos to lowercase
arm64: dts: uniphier: add reset-names to NAND controller node
...

show more ...


Revision tags: v5.4.18, v5.4.17, v5.4.16, v5.5, v5.4.15, v5.4.14, v5.4.13, v5.4.12, v5.4.11, v5.4.10, v5.4.9, v5.4.8, v5.4.7, v5.4.6, v5.4.5, v5.4.4, v5.4.3
# 33eae7fb 12-Dec-2019 Yinbo Zhu <yinbo.zhu@nxp.com>

arm64: dts: ls1028a: fix endian setting for dcfg

DCFG block uses little endian. Fix it so that register access becomes
correct.

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>

arm64: dts: ls1028a: fix endian setting for dcfg

DCFG block uses little endian. Fix it so that register access becomes
correct.

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Acked-by: Yangbo Lu <yangbo.lu@nxp.com>
Fixes: 8897f3255c9c ("arm64: dts: Add support for NXP LS1028A SoC")
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

show more ...


# 869bf854 11-Dec-2019 Peng Ma <peng.ma@nxp.com>

arm64: dts: ls1028a: Update edma compatible to fit eDMA driver

The eDMA of LS1028A soc has a little bit different from others, So we
should distinguish them in driver by compatible.

arm64: dts: ls1028a: Update edma compatible to fit eDMA driver

The eDMA of LS1028A soc has a little bit different from others, So we
should distinguish them in driver by compatible.

Signed-off-by: Peng Ma <peng.ma@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

show more ...


# 3f0fb37b 11-Dec-2019 Michael Walle <michael@walle.cc>

arm64: dts: ls1028a: fix reboot node

The reboot register isn't located inside the DCFG controller, but in its
own RST controller. Fix it.

Fixes: 8897f3255c9c ("arm64: dts: Add s

arm64: dts: ls1028a: fix reboot node

The reboot register isn't located inside the DCFG controller, but in its
own RST controller. Fix it.

Fixes: 8897f3255c9c ("arm64: dts: Add support for NXP LS1028A SoC")
Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

show more ...


Revision tags: v5.3.15, v5.4.2
# 9c015e13 29-Nov-2019 Michael Walle <michael@walle.cc>

arm64: dts: ls1028a: put SAIs into async mode

The LS1028A SoC has only unidirectional SAIs. Therefore, it doesn't make
sense to have the RX and TX part synchronous. Even worse, the RX pa

arm64: dts: ls1028a: put SAIs into async mode

The LS1028A SoC has only unidirectional SAIs. Therefore, it doesn't make
sense to have the RX and TX part synchronous. Even worse, the RX part
wont work out of the box because by default it is configured as
synchronous to the TX part. And as said before, the pinmux of the SoC
can only be configured to route either the RX or the TX signals to the
SAI but never both at the same time. Thus configure the asynchronous
mode by default.

Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Alison Wang <alison.wang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

show more ...


# 434f9cc1 09-Dec-2019 Michael Walle <michael@walle.cc>

arm64: dts: ls1028a: add missing sai nodes

The LS1028A has six SAI cores.

Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Alison Wang <alison.wang@nxp.com>
Signed-

arm64: dts: ls1028a: add missing sai nodes

The LS1028A has six SAI cores.

Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Alison Wang <alison.wang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

show more ...


# 961f8209 09-Dec-2019 Michael Walle <michael@walle.cc>

arm64: dts: ls1028a: fix typo in TMU calibration data

The temperature sensor may jump backwards because there is a wrong
calibration value. Both values have to be monotonically increasin

arm64: dts: ls1028a: fix typo in TMU calibration data

The temperature sensor may jump backwards because there is a wrong
calibration value. Both values have to be monotonically increasing.
Fix it.

This was tested on a custom board.

Fixes: 571cebfe8e2b ("arm64: dts: ls1028a: Add Thermal Monitor Unit node")
Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Tang Yuantian <andy.tang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

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# c77fae5b 04-Dec-2019 Ashish Kumar <Ashish.Kumar@nxp.com>

arm64: dts: ls1028a: Add FlexSPI support

Add fspi node property for LS1028A SoC for FlexSPI driver.
Property added for FlexSPI controller and for the connected
slave device for the L

arm64: dts: ls1028a: Add FlexSPI support

Add fspi node property for LS1028A SoC for FlexSPI driver.
Property added for FlexSPI controller and for the connected
slave device for the LS1028ARDB and LS1028AQDS target.
RDB and QDS are having one SPI-NOR flash device, mt35xu02g
connected at CS0.
This flash device "mt35xu02g" is tested for octal read

Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

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Revision tags: v5.4.1, v5.3.14, v5.4, v5.3.13, v5.3.12, v5.3.11, v5.3.10, v5.3.9, v5.3.8
# 0b680963 25-Oct-2019 Fabio Estevam <festevam@gmail.com>

arm64: dts: ls1028a: Fix tmu unit address

The following build warning is seen with W=1:

arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi:531.20-581.5: Warning (simple_bus_reg): /soc/t

arm64: dts: ls1028a: Fix tmu unit address

The following build warning is seen with W=1:

arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi:531.20-581.5: Warning (simple_bus_reg): /soc/tmu@1f00000: simple-bus unit address format error, expected "1f80000"

Fix it by adjusting the tmu unit address to match its reg entry.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

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# 68e36a42 25-Oct-2019 Fabio Estevam <festevam@gmail.com>

arm64: dts: ls1028a: Move thermal-zone out of SoC

Move thermal-zone node from the soc node to the root node.

thermal-zone node does not have any register properties and thus
sho

arm64: dts: ls1028a: Move thermal-zone out of SoC

Move thermal-zone node from the soc node to the root node.

thermal-zone node does not have any register properties and thus
shouldn't be placed on the bus.

This fixes the following build warnings with W=1:

arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi:583.17-612.5: Warning (simple_bus_reg): /soc/thermal-zones: missing or empty reg/ranges property

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

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Revision tags: v5.3.7
# 91035cb0 14-Oct-2019 Wen He <wen.he_1@nxp.com>

arm64: dts: ls1028a: Update #clock-cells of dpclk node

Update the property #clock-cells = <1> to #clock-cells = <0> of the
dpclk, since the Display output pixel clock driver provides sin

arm64: dts: ls1028a: Update #clock-cells of dpclk node

Update the property #clock-cells = <1> to #clock-cells = <0> of the
dpclk, since the Display output pixel clock driver provides single
clock output.

Signed-off-by: Wen He <wen.he_1@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

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Revision tags: v5.3.6, v5.3.5, v5.3.4, v5.3.3, v5.3.2, v5.3.1
# 13782597 20-Sep-2019 Wen He <wen.he_1@nxp.com>

arm64: dts: ls1028a: Update the clock providers for the Mali DP500

In order to maximise performance of the LCD Controller's 64-bit AXI
bus, for any give speed bin of the device, the AXI

arm64: dts: ls1028a: Update the clock providers for the Mali DP500

In order to maximise performance of the LCD Controller's 64-bit AXI
bus, for any give speed bin of the device, the AXI master interface
clock(ACLK) clock can be up to CPU_frequency/2, which is already
capable of optimal performance. In general, ACLK is always expected
to be equal to CPU_frequency/2. APB slave interface clock(PCLK) and
Main processing clock(PCLK) both are tied to the same clock as ACLK.

This change followed the LS1028A Architecture Specification Manual.

Signed-off-by: Wen He <wen.he_1@nxp.com>
Acked-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

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