Revision tags: v5.15.41, v5.15.40, v5.15.39, v5.15.38, v5.15.37, v5.15.36, v5.15.35, v5.15.34, v5.15.33, v5.15.32, v5.15.31, v5.15.30, v5.15.29, v5.15.28, v5.15.27, v5.15.26, v5.15.25, v5.15.24, v5.15.23, v5.15.22, v5.15.21, v5.15.20, v5.15.19, v5.15.18, v5.15.17, v5.4.173, v5.15.16, v5.15.15, v5.15.10, v5.15.9, v5.15.8, v5.15.7, v5.15.6, v5.15.5, v5.15.4, v5.15.3, v5.15.2, v5.15.1, v5.15, v5.14.14, v5.14.13, v5.14.12, v5.14.11, v5.14.10, v5.14.9, v5.14.8, v5.14.7, v5.14.6, v5.10.67, v5.10.66, v5.14.5, v5.14.4, v5.10.65, v5.14.3, v5.10.64, v5.14.2, v5.10.63, v5.14.1, v5.10.62, v5.14, v5.10.61, v5.10.60, v5.10.53, v5.10.52, v5.10.51, v5.10.50, v5.10.49, v5.13, v5.10.46, v5.10.43, v5.10.42, v5.10.41, v5.10.40, v5.10.39, v5.4.119, v5.10.36, v5.10.35, v5.10.34, v5.4.116, v5.10.33, v5.12, v5.10.32, v5.10.31, v5.10.30, v5.10.27, v5.10.26, v5.10.25, v5.10.24, v5.10.23, v5.10.22, v5.10.21, v5.10.20, v5.10.19, v5.4.101, v5.10.18, v5.10.17, v5.11, v5.10.16, v5.10.15, v5.10.14, v5.10 |
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5919eec0 |
| 01-Dec-2020 |
Daniel Palmer <daniel@0x0f.com> |
ARM: mstar: SMP support
This patch adds SMP support for MStar/Sigmastar chips that have a second core like those in the infinity2m family.
So far only single and dual core chips have been found so
ARM: mstar: SMP support
This patch adds SMP support for MStar/Sigmastar chips that have a second core like those in the infinity2m family.
So far only single and dual core chips have been found so this does the bare minimum to boot the second core. From what I can tell not having the "holding pen" code to handle multiple cores is fine if there is only one core the will get booted. This might need to be reconsidered if chips with more cores turn up.
Signed-off-by: Daniel Palmer <daniel@0x0f.com> Link: https://lore.kernel.org/r/20201201134330.3037007-11-daniel@0x0f.com' Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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ba2290b1 |
| 01-Dec-2020 |
Daniel Palmer <daniel@0x0f.com> |
ARM: mstar: Add infinity2m support
The infinity2m series of chips are like the other Mstar/Sigmastar chips in that they have a Cortex A7 system with DDR memory integrated in a single package.
The i
ARM: mstar: Add infinity2m support
The infinity2m series of chips are like the other Mstar/Sigmastar chips in that they have a Cortex A7 system with DDR memory integrated in a single package.
The infinity2m chips are intended for recording the incoming streams from IP cameras. So instead of video encoders they have video decoders, instead of a camera interface they have display hardware and so on.
Aside from the above points the big difference about these chips is that they include a second Cortex A7 core.
Signed-off-by: Daniel Palmer <daniel@0x0f.com> Link: https://lore.kernel.org/r/20201201134330.3037007-5-daniel@0x0f.com' Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Revision tags: v5.8.17, v5.8.16, v5.8.15, v5.9, v5.8.14, v5.8.13, v5.8.12, v5.8.11, v5.8.10, v5.8.9, v5.8.8, v5.8.7, v5.8.6, v5.4.62, v5.8.5, v5.8.4, v5.4.61, v5.8.3, v5.4.60, v5.8.2, v5.4.59, v5.8.1, v5.4.58, v5.4.57, v5.4.56, v5.8, v5.7.12, v5.4.55, v5.7.11, v5.4.54, v5.7.10, v5.4.53, v5.4.52, v5.7.9 |
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312b62b6 |
| 10-Jul-2020 |
Daniel Palmer <daniel@0x0f.com> |
ARM: mstar: Add machine for MStar/Sigmastar Armv7 SoCs
Initial support for the MStar/Sigmastar Armv7 based IP camera and dashcam SoCs.
These chips are interesting in that they contain a Cortex-A7,
ARM: mstar: Add machine for MStar/Sigmastar Armv7 SoCs
Initial support for the MStar/Sigmastar Armv7 based IP camera and dashcam SoCs.
These chips are interesting in that they contain a Cortex-A7, peripherals and system memory in a single tiny QFN package that can be hand soldered allowing almost anyone to embed Linux in their projects.
Signed-off-by: Daniel Palmer <daniel@0x0f.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Revision tags: v5.8.17, v5.8.16, v5.8.15, v5.9, v5.8.14, v5.8.13, v5.8.12, v5.8.11, v5.8.10, v5.8.9, v5.8.8, v5.8.7, v5.8.6, v5.4.62, v5.8.5, v5.8.4, v5.4.61, v5.8.3, v5.4.60, v5.8.2, v5.4.59, v5.8.1, v5.4.58, v5.4.57, v5.4.56, v5.8, v5.7.12, v5.4.55, v5.7.11, v5.4.54, v5.7.10, v5.4.53, v5.4.52, v5.7.9 |
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#
312b62b6 |
| 10-Jul-2020 |
Daniel Palmer <daniel@0x0f.com> |
ARM: mstar: Add machine for MStar/Sigmastar Armv7 SoCs Initial support for the MStar/Sigmastar Armv7 based IP camera and dashcam SoCs. These chips are interesting in that they c
ARM: mstar: Add machine for MStar/Sigmastar Armv7 SoCs Initial support for the MStar/Sigmastar Armv7 based IP camera and dashcam SoCs. These chips are interesting in that they contain a Cortex-A7, peripherals and system memory in a single tiny QFN package that can be hand soldered allowing almost anyone to embed Linux in their projects. Signed-off-by: Daniel Palmer <daniel@0x0f.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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