#
ff78a189 |
| 26-Nov-2014 |
Nicolas Ferre <nicolas.ferre@atmel.com> |
ARM: at91: remove old at91-specific clock driver
This clock driver collection was specific to AT91 and only used in !DT cases. All clocks and the clock trees for all Atmel SoCs are now described by
ARM: at91: remove old at91-specific clock driver
This clock driver collection was specific to AT91 and only used in !DT cases. All clocks and the clock trees for all Atmel SoCs are now described by drivers using the common clock framework.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
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Revision tags: v3.18-rc6, v3.18-rc5, v3.18-rc4, v3.18-rc3, v3.18-rc2 |
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#
7538ec7d |
| 21-Oct-2014 |
Nicolas Ferre <nicolas.ferre@atmel.com> |
ARM: at91: remove no-MMU at91x40 support
As there is currently no-one to take care of this old !MMU target and as its support in recent kernels is a bit rotten, remove this at91x40 support and the b
ARM: at91: remove no-MMU at91x40 support
As there is currently no-one to take care of this old !MMU target and as its support in recent kernels is a bit rotten, remove this at91x40 support and the board file associated with it (at91eb01). There are modern ARM !MMU in Mainline now so this target is not interesting for building tests anymore. It would be better to start from these modern ARM !MMU platforms to reintroduce at91x40 support if needed.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Greg Ungerer <gerg@uclinux.org> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
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Revision tags: v3.18-rc1, v3.17, v3.17-rc7, v3.17-rc6 |
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#
726d32bf |
| 15-Sep-2014 |
Nicolas Ferre <nicolas.ferre@atmel.com> |
ARM: at91: SAMA5D4 SoC detection code and low level routines
SoC identification code, kernel uncompress and low level debugging routines update. On SAMA5D4, DBGU is at another address AT91_BASE_DBGU
ARM: at91: SAMA5D4 SoC detection code and low level routines
SoC identification code, kernel uncompress and low level debugging routines update. On SAMA5D4, DBGU is at another address AT91_BASE_DBGU2 so another round of detection is needed. We also had to differentiate with SAMA5D3 SoC family and rename some variables.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
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#
7d80335e |
| 15-Sep-2014 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
ARM: at91: Give the PIT irq as an argument of at91sam926x_pit_init
This allows to remove the dependency of the timer driver on mach/hardware.h and having an hardcoded interrupt number in the driver
ARM: at91: Give the PIT irq as an argument of at91sam926x_pit_init
This allows to remove the dependency of the timer driver on mach/hardware.h and having an hardcoded interrupt number in the driver itself.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Revision tags: v3.17-rc5, v3.17-rc4 |
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#
d2992e51 |
| 02-Sep-2014 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
ARM: at91: soc: Add init_time callback
Introduce an init_time callback to the at91_init_soc structure to be able to tweak the init_time machine callback on a per-soc basis, instead of having to rely
ARM: at91: soc: Add init_time callback
Introduce an init_time callback to the at91_init_soc structure to be able to tweak the init_time machine callback on a per-soc basis, instead of having to rely on a global one.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Conflicts: arch/arm/mach-at91/setup.c
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Revision tags: v3.17-rc3, v3.17-rc2, v3.17-rc1, v3.16, v3.16-rc7, v3.16-rc6, v3.16-rc5, v3.16-rc4 |
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#
1bd59dbe |
| 01-Jul-2014 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
ARM: at91: generic.h: Add include safe guards
The generic.h header file doesn't have any safe guards against multiple inclusion. It only worked so far because all the symbols defined in it were exte
ARM: at91: generic.h: Add include safe guards
The generic.h header file doesn't have any safe guards against multiple inclusion. It only worked so far because all the symbols defined in it were extern, but this is a rather fragile assumption.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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#
351a4ffe |
| 03-Jul-2014 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
ARM: at91: Remove rstc and shdwnc global base addresses
Now that there's no user left for the global variables holding the reset and shutdown controllers base address, we can remove these variables
ARM: at91: Remove rstc and shdwnc global base addresses
Now that there's no user left for the global variables holding the reset and shutdown controllers base address, we can remove these variables and their associated mapping function.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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#
99d63fa1 |
| 03-Jul-2014 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
ARM: at91: Remove reset code from the machine code
Now that the transition is over and that we probe our reset driver in every case, we can remove the legacy code from the machine directory.
Signed
ARM: at91: Remove reset code from the machine code
Now that the transition is over and that we probe our reset driver in every case, we can remove the legacy code from the machine directory.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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#
65f2ce96 |
| 02-Jul-2014 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
ARM: at91/soc: Introduce register_devices callback
Some core devices should be registered by the SoC itself rather than by every board using this SoC. Introduce a register_devices callback that shou
ARM: at91/soc: Introduce register_devices callback
Some core devices should be registered by the SoC itself rather than by every board using this SoC. Introduce a register_devices callback that should be called during the init_machine in order to do that.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Revision tags: v3.16-rc3, v3.16-rc2, v3.16-rc1, v3.15, v3.15-rc8, v3.15-rc7, v3.15-rc6, v3.15-rc5, v3.15-rc4, v3.15-rc3, v3.15-rc2, v3.15-rc1, v3.14, v3.14-rc8, v3.14-rc7, v3.14-rc6, v3.14-rc5, v3.14-rc4, v3.14-rc3, v3.14-rc2, v3.14-rc1, v3.13, v3.13-rc8, v3.13-rc7, v3.13-rc6, v3.13-rc5, v3.13-rc4, v3.13-rc3, v3.13-rc2, v3.13-rc1, v3.12, v3.12-rc7, v3.12-rc6, v3.12-rc5 |
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#
c8a8c630 |
| 11-Oct-2013 |
Boris BREZILLON <b.brezillon@overkiz.com> |
ARM: at91: add Kconfig options for common clk support
This patch adds the following Kconfig options to prepare the transition to common clk framework:
- AT91_USE_OLD_CLK: this option is selected by
ARM: at91: add Kconfig options for common clk support
This patch adds the following Kconfig options to prepare the transition to common clk framework:
- AT91_USE_OLD_CLK: this option is selected by every SoC which does not support new at91 clks based on common clk framework (SoC which does not define the clock tree in its device tree). This options is also selected when the user choose non dt boards support (new at91 clks can only be registered from a device tree definition).
- COMMON_CLK_AT91: this option cannot be selected directly. Instead it is enabled if these 3 conditions are met: * at least one of the selected SoCs have a PMC (Power Management Controller) Unit * device tree support is enabled * the old at91 clk implementation is disabled (every selected SoC define its clks in its device tree and non dt boards support is disabled)
- OLD_CLK_AT91: this option cannot be selected directly. Instead it is enabled if these 2 conditions are met: * at least one of the selected SoCs have a PMC (Power Management Controller) Unit * at least one of the selected SoCs does not define its clks in its device tree or non dt-boards support is enabled
This patch selects AT91_USE_OLD_CLK in all currently supported SoCs. These selects will be removed after clk definitions are properly added in each soc's device tree. It also selects AT91_USE_OLD_CLK in all non-dt boards support.
AT91_PMC_UNIT references are replaced by OLD_CLK_AT91, because PMC Unit is enabled for both old and common clk implementations, and old clk implementation should not be compiled if COMMON_CLK is enabled.
To avoid future link errors, a new stub is created for at91_dt_clock_init function if OLD_CLK_AT91 is disabled.
A new check is added in dt init functions (setup.c) to prepare for SoCs supporting new clk implementation. These SoCs won't setup the register_clocks callback (clk registration is done using of_clk_init).
Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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#
94c4c79f |
| 16-Oct-2013 |
Johan Hovold <jhovold@gmail.com> |
ARM: at91: fix hanged boot due to early rtt-interrupt
Make sure the RTT-interrupts are masked at boot by adding a new helper function to be used at SOC-init.
This fixes hanged boot on all AT91 SOCs
ARM: at91: fix hanged boot due to early rtt-interrupt
Make sure the RTT-interrupts are masked at boot by adding a new helper function to be used at SOC-init.
This fixes hanged boot on all AT91 SOCs with an RTT, for example, if an RTT-alarm goes off after a non-clean shutdown (e.g. when using RTC wakeup).
The RTC and RTT-peripherals are powered by backup power (VDDBU) (on all AT91 SOCs but RM9200) and are not reset on wake-up, user, watchdog or software reset. This means that their interrupts may be enabled during early boot if, for example, they where not disabled during a previous shutdown (e.g. due to a buggy driver or a non-clean shutdown such as a user reset). Furthermore, an RTC or RTT-alarm may also be active.
The RTC and RTT-interrupts use the shared system-interrupt line, which is also used by the PIT, and if an interrupt occurs before a handler (e.g. RTC-driver) has been installed this leads to the system interrupt being disabled and prevents the system from booting.
Note that when boot hangs due to an early RTC or RTT-interrupt, the only way to get the system to start again is to remove the backup power (e.g. battery) or to disable the interrupt manually from the bootloader. In particular, a user reset is not sufficient.
Signed-off-by: Johan Hovold <jhovold@gmail.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: stable@vger.kernel.org # 3.11.x
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#
6de714c2 |
| 16-Oct-2013 |
Johan Hovold <jhovold@gmail.com> |
ARM: at91: fix hanged boot due to early rtc-interrupt
Make sure the RTC-interrupts are masked at boot by adding a new helper function to be used at SOC-init.
This fixes hanged boot on all AT91 SOCs
ARM: at91: fix hanged boot due to early rtc-interrupt
Make sure the RTC-interrupts are masked at boot by adding a new helper function to be used at SOC-init.
This fixes hanged boot on all AT91 SOCs with an RTC (but RM9200), for example, after a reset during an RTC-update or if an RTC-alarm goes off after shutdown (e.g. when using RTC wakeup).
The RTC and RTT-peripherals are powered by backup power (VDDBU) (on all AT91 SOCs but RM9200) and are not reset on wake-up, user, watchdog or software reset. This means that their interrupts may be enabled during early boot if, for example, they where not disabled during a previous shutdown (e.g. due to a buggy driver or a non-clean shutdown such as a user reset). Furthermore, an RTC or RTT-alarm may also be active.
The RTC and RTT-interrupts use the shared system-interrupt line, which is also used by the PIT, and if an interrupt occurs before a handler (e.g. RTC-driver) has been installed this leads to the system interrupt being disabled and prevents the system from booting.
Note that when boot hangs due to an early RTC or RTT-interrupt, the only way to get the system to start again is to remove the backup power (e.g. battery) or to disable the interrupt manually from the bootloader. In particular, a user reset is not sufficient.
Signed-off-by: Johan Hovold <jhovold@gmail.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: stable@vger.kernel.org # 3.11.x
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Revision tags: v3.12-rc4, v3.12-rc3, v3.12-rc2, v3.12-rc1, v3.11, v3.11-rc7, v3.11-rc6, v3.11-rc5, v3.11-rc4, v3.11-rc3, v3.11-rc2, v3.11-rc1 |
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#
7b6d864b |
| 08-Jul-2013 |
Robin Holt <holt@sgi.com> |
reboot: arm: change reboot_mode to use enum reboot_mode
Preparing to move the parsing of reboot= to generic kernel code forces the change in reboot_mode handling to use the enum.
[akpm@linux-founda
reboot: arm: change reboot_mode to use enum reboot_mode
Preparing to move the parsing of reboot= to generic kernel code forces the change in reboot_mode handling to use the enum.
[akpm@linux-foundation.org: fix arch/arm/mach-socfpga/socfpga.c] Signed-off-by: Robin Holt <holt@sgi.com> Cc: Russell King <rmk+kernel@arm.linux.org.uk> Cc: Russ Anderson <rja@sgi.com> Cc: Robin Holt <holt@sgi.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Guan Xuetao <gxt@mprc.pku.edu.cn> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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Revision tags: v3.10, v3.10-rc7, v3.10-rc6, v3.10-rc5, v3.10-rc4 |
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#
546c830c |
| 01-Jun-2013 |
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
ARM: at91: fix at91_extern_irq usage for non-dt boards
Since 4b68520dc0ec96153bc0d87bca5ffba508edfcf ARM: at91: add AIC5 support
we allocate the at91_extern_irq.
This patch makes it static and sto
ARM: at91: fix at91_extern_irq usage for non-dt boards
Since 4b68520dc0ec96153bc0d87bca5ffba508edfcf ARM: at91: add AIC5 support
we allocate the at91_extern_irq.
This patch makes it static and stores the non-dt extern irq in the soc structure. It is then possible to use a at91_get_extern_irq() function to get the value for outside of the irq driver. It is useful for passing its value to at91_aic_init().
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Ludovic Desroches <ludovic.desroches@atmel.com> [nicolas.ferre@atmel.com: rework commit message] Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Revision tags: v3.10-rc3, v3.10-rc2, v3.10-rc1, v3.9, v3.9-rc8, v3.9-rc7, v3.9-rc6, v3.9-rc5, v3.9-rc4, v3.9-rc3, v3.9-rc2, v3.9-rc1, v3.8, v3.8-rc7, v3.8-rc6, v3.8-rc5, v3.8-rc4, v3.8-rc3, v3.8-rc2, v3.8-rc1, v3.7, v3.7-rc8, v3.7-rc7, v3.7-rc6, v3.7-rc5 |
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#
6bb27d73 |
| 08-Nov-2012 |
Stephen Warren <swarren@nvidia.com> |
ARM: delete struct sys_timer
Now that the only field in struct sys_timer is .init, delete the struct, and replace the machine descriptor .timer field with the initialization function itself.
This w
ARM: delete struct sys_timer
Now that the only field in struct sys_timer is .init, delete the struct, and replace the machine descriptor .timer field with the initialization function itself.
This will enable moving timer drivers into drivers/clocksource without having to place a public prototype of each struct sys_timer object into include/linux; the intent is to create a single of_clocksource_init() function that determines which timer driver to initialize by scanning the device dtree, much like the proposed irqchip_init() at: http://www.spinics.net/lists/arm-kernel/msg203686.html
Includes mach-omap2 fixes from Igor Grinberg.
Tested-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Revision tags: v3.7-rc4, v3.7-rc3 |
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#
397f8c3c |
| 28-Oct-2012 |
Joachim Eastwood <manabian@gmail.com> |
ARM: AT91: Add AT91RM9200 DT board
Signed-off-by: Joachim Eastwood <manabian@gmail.com> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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#
738a0fd7 |
| 24-Oct-2012 |
Nicolas Ferre <nicolas.ferre@atmel.com> |
ARM: at91: fix external interrupts in non-DT case
Management of external interrupts has changed but the non-DT code has not integrated these changes. Add a mask to pass external irq specification fr
ARM: at91: fix external interrupts in non-DT case
Management of external interrupts has changed but the non-DT code has not integrated these changes. Add a mask to pass external irq specification from SoC specific code to the at91_aic_init() function.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Ludovic Desroches <ludovic.desroches@atmel.com> Cc: stable <stable@vger.kernel.org> [v3.6]
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Revision tags: v3.7-rc2, v3.7-rc1, v3.6, v3.6-rc7, v3.6-rc6, v3.6-rc5, v3.6-rc4, v3.6-rc3, v3.6-rc2, v3.6-rc1, v3.5, v3.5-rc7, v3.5-rc6, v3.5-rc5, v3.5-rc4, v3.5-rc3, v3.5-rc2, v3.5-rc1 |
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#
c4b68520 |
| 30-May-2012 |
Ludovic Desroches <ludovic.desroches@atmel.com> |
ARM: at91: add AIC5 support
The number of lines of AIC5 has increased from 32 to 128. Due to this increase, a source select register has been introduced for the interrupt line selection. Moreover, r
ARM: at91: add AIC5 support
The number of lines of AIC5 has increased from 32 to 128. Due to this increase, a source select register has been introduced for the interrupt line selection. Moreover, register mapping has been changed. For that reasons, we need some dedicated callbacks for AIC5. Power management is also concerned by these changes. On suspend, we can't get the whole interrupt mask register as before, we have to read this register 128 times. To reduce this overhead, a snapshot of the whole IMR is maintained.
Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Revision tags: v3.4, v3.4-rc7, v3.4-rc6, v3.4-rc5, v3.4-rc4, v3.4-rc3, v3.4-rc2 |
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#
a27fa581 |
| 05-Apr-2012 |
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
ARM: at91: drop at91_set_serial_console
at91_set_serial_console is used to define the default console of linux. This is already manage by the cmdline. And if the boot loader can not be modified you
ARM: at91: drop at91_set_serial_console
at91_set_serial_console is used to define the default console of linux. This is already manage by the cmdline. And if the boot loader can not be modified you can still set it by enabling the CONFIG_CMDLINE_EXTEND option. And then the command-line arguments provided by the boot loader will be appended to the default kernel command string.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Revision tags: v3.4-rc1, v3.3, v3.3-rc7, v3.3-rc6 |
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#
eb5e76ff |
| 02-Mar-2012 |
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
ARM: at91: add pmc DT support
Specified the main Oscillator via clock binding. This will allow to do not hardcode it anymore in the DT board at 12MHz.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLAR
ARM: at91: add pmc DT support
Specified the main Oscillator via clock binding. This will allow to do not hardcode it anymore in the DT board at 12MHz.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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#
2b11ea5b |
| 27-Feb-2012 |
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
ARM: at91/dt: add specific DT soc init
This will allow to have static Device mapping and DT probe mapping for the System Controller.
Temporary keep the call to ioremap_registers() until we have the
ARM: at91/dt: add specific DT soc init
This will allow to have static Device mapping and DT probe mapping for the System Controller.
Temporary keep the call to ioremap_registers() until we have the binding for the SDRAM/DDR Controller.
Temporary keep the main clock hardcoded to 12MHz until we have the binding for the PMC.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Revision tags: v3.3-rc5, v3.3-rc4 |
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#
8014d6f4 |
| 14-Feb-2012 |
Nicolas Ferre <nicolas.ferre@atmel.com> |
ARM: at91: AIC and GPIO IRQ device tree initialization
Both AIC and GPIO controllers are now using the standard of_irq_init() function to initialize IRQs in case of DT use. The DT specific initializ
ARM: at91: AIC and GPIO IRQ device tree initialization
Both AIC and GPIO controllers are now using the standard of_irq_init() function to initialize IRQs in case of DT use. The DT specific initialization functions are now separated from the non-DT case and are now using "linear" irq domains. The .map() irqdomain operation is responsible for positioning the IRQ handlers. In AIC case, the Linux IRQ number is directly programmed in the hardware to avoid an additional reverse mapping operation. The AIC position its irq domain as the "default" irq domain.
For DT case, the priority is not yet filled in the SMR. It will be the subject of another patch.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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#
f363c407 |
| 12-Feb-2012 |
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
ARM: at91: make sdram/ddr register base soc independent
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
|
#
5e9cf5e1 |
| 20-Feb-2012 |
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
ARM: at91: make ST (System Timer) soc independent
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Reviewed-by: Ryan Mallon <
ARM: at91: make ST (System Timer) soc independent
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Reviewed-by: Ryan Mallon <rmallon@gmail.com>
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Revision tags: v3.3-rc3, v3.3-rc2, v3.3-rc1, v3.2, v3.2-rc7, v3.2-rc6, v3.2-rc5, v3.2-rc4 |
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#
4342d647 |
| 27-Nov-2011 |
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
ARM: at91: make matrix register base soc independent
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Reviewed-by: Ryan Mallo
ARM: at91: make matrix register base soc independent
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Reviewed-by: Ryan Mallon <rmallon@gmail.com> Cc: linux-usb@vger.kernel.org Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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