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Revision tags: v6.6.25, v6.6.24, v6.6.23, v6.6.16, v6.6.15, v6.6.14, v6.6.13, v6.6.12, v6.6.11, v6.6.10, v6.6.9, v6.6.8, v6.6.7, v6.6.6, v6.6.5, v6.6.4, v6.6.3, v6.6.2, v6.5.11, v6.6.1, v6.5.10, v6.6, v6.5.9, v6.5.8, v6.5.7, v6.5.6, v6.5.5, v6.5.4, v6.5.3, v6.5.2, v6.1.51, v6.5.1, v6.1.50, v6.5, v6.1.49, v6.1.48, v6.1.46, v6.1.45, v6.1.44, v6.1.43, v6.1.42, v6.1.41, v6.1.40, v6.1.39, v6.1.38, v6.1.37, v6.1.36, v6.4, v6.1.35 |
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| #
d3a0d116 |
| 17-Jun-2023 |
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
dt-bindings: pinctrl: qcom,sdx65-tlmm: add pcie_clkreq function
DTS and driver already support pcie_clkreq function for a pin. Add it
to fix dtbs_check warning:
qcom-sdx65-mtp.dtb: pinctrl@f1000
dt-bindings: pinctrl: qcom,sdx65-tlmm: add pcie_clkreq function
DTS and driver already support pcie_clkreq function for a pin. Add it
to fix dtbs_check warning:
qcom-sdx65-mtp.dtb: pinctrl@f100000: pcie-ep-clkreq-default-state: 'oneOf' conditional failed, one must be fixed:
'bias-disable', 'drive-strength', 'function', 'pins' do not match any of the regexes: '-pins$', 'pinctrl-[0-9]+'
'pcie_clkreq' is not one of ['blsp_uart1', 'blsp_spi1', ... 'gpio']
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20230617111809.129232-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Revision tags: v6.1.34, v6.1.33, v6.1.32, v6.1.31, v6.1.30, v6.1.29, v6.1.28, v6.1.27, v6.1.26, v6.3, v6.1.25, v6.1.24 |
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| #
810e171e |
| 07-Apr-2023 |
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
dt-bindings: pinctrl: qcom,sdx65-tlmm: simplify with unevaluatedProperties
All Qualcomm SoC Top Level Mode Multiplexer pin controllers have similar
capabilities regarding pin properties, thus we can
dt-bindings: pinctrl: qcom,sdx65-tlmm: simplify with unevaluatedProperties
All Qualcomm SoC Top Level Mode Multiplexer pin controllers have similar
capabilities regarding pin properties, thus we can just accept entire
set provided by qcom,tlmm-common.yaml schema.
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230407184546.161168-30-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Revision tags: v6.1.23, v6.1.22, v6.1.21, v6.1.20, v6.1.19, v6.1.18, v6.1.17, v6.1.16, v6.1.15, v6.1.14, v6.1.13, v6.2, v6.1.12, v6.1.11, v6.1.10, v6.1.9, v6.1.8, v6.1.7, v6.1.6, v6.1.5, v6.0.19, v6.0.18, v6.1.4, v6.1.3, v6.0.17, v6.1.2, v6.0.16 |
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| #
12a18bb7 |
| 30-Dec-2022 |
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
dt-bindings: pinctrl: qcom: allow nine interrupts on SM6350
Almost all Qualcomm SoC Top Level Mode Multiplexers come with only
summary interrupt. SM6350 is different because downstream and upstream
dt-bindings: pinctrl: qcom: allow nine interrupts on SM6350
Almost all Qualcomm SoC Top Level Mode Multiplexers come with only
summary interrupt. SM6350 is different because downstream and upstream
DTS have nine of the interrupts. Allow such variation.
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221230135645.56401-7-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Revision tags: v6.1.1, v6.0.15, v6.0.14, v6.0.13, v6.1, v6.0.12, v6.0.11, v6.0.10, v5.15.80, v6.0.9, v5.15.79, v6.0.8, v5.15.78, v6.0.7, v5.15.77, v5.15.76, v6.0.6, v6.0.5, v5.15.75, v6.0.4, v6.0.3 |
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| #
222ca103 |
| 17-Oct-2022 |
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
dt-bindings: pinctrl: qcom,sdx65-tlmm: minor style cleanups
Drop "binding" from description (and align it with other Qualcomm
pinctrl bindings), use double quotes consistently, drop redundant
quotes
dt-bindings: pinctrl: qcom,sdx65-tlmm: minor style cleanups
Drop "binding" from description (and align it with other Qualcomm
pinctrl bindings), use double quotes consistently, drop redundant
quotes and rename file to match compatible (to match coding
convention).
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20221017230012.47878-20-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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