e42fb487 | 15-Oct-2024 |
Thu Nguyen <thu@os.amperecomputing.com> |
Change include style to use system includes
The libcper header files in `libcper` are installed to `usr/include/libcper`. Use that system includes in `libcper` source instead of using the project in
Change include style to use system includes
The libcper header files in `libcper` are installed to `usr/include/libcper`. Use that system includes in `libcper` source instead of using the project includes.
Change-Id: I596edc2c754dae4829844f535a1e34caa246fb43 Signed-off-by: Thu Nguyen <thu@os.amperecomputing.com>
show more ...
|
a3b7f8a2 | 04-Nov-2024 |
Ed Tanous <etanous@nvidia.com> |
Unflatten edk includes
Installing the edk headers into a folder requires us to do odd things with imports, and either include headers with "..", or otherwise get the include directories lined up.
M
Unflatten edk includes
Installing the edk headers into a folder requires us to do odd things with imports, and either include headers with "..", or otherwise get the include directories lined up.
Move the contents of edk/*.c/h up a level, and just simplify the include structure. This is done to fix the immediate change of the prior patch and make this build again. Happy to discuss other options.
Change-Id: I328f20bca6d23100993493445bee0e5e11d2866a Signed-off-by: Ed Tanous <etanous@nvidia.com>
show more ...
|
04f57716 | 29-Aug-2024 |
Dung Cao <dung@os.amperecomputing.com> |
Add support for AMPERE CPERs
Support Ampere CPER entries
Change-Id: I607a89209138fa53914c55c07aba8b7d6f382e5e Signed-off-by: Dung Cao <dung@os.amperecomputing.com> |
2d17acec | 27-Aug-2024 |
Ed Tanous <etanous@nvidia.com> |
Improve Nvidia CPER decode
Add decoding of registers to the structure. Note, this requires COUNTED_BY support which is borrowed from LIBPLDM.
Also add unit-tests for NVIDIA section, and update sch
Improve Nvidia CPER decode
Add decoding of registers to the structure. Note, this requires COUNTED_BY support which is borrowed from LIBPLDM.
Also add unit-tests for NVIDIA section, and update schema to match existing register decoding.
Change-Id: If1c9cae97de35ba6a5dad1f462d3989ec6ac6a90 Signed-off-by: Karthik Rajagopalan <krajagopalan@nvidia.com> Signed-off-by: Ed Tanous <etanous@nvidia.com>
show more ...
|
255bd81a | 06-Sep-2024 |
Karthik Rajagopalan <krajagopalan@nvidia.com> |
Use extern C guards in all headers
The project uses a mix of C and C++ requiring extern "C" guards from C++ code both within the project & from C++ apps that use libcper. That won't be required with
Use extern C guards in all headers
The project uses a mix of C and C++ requiring extern "C" guards from C++ code both within the project & from C++ apps that use libcper. That won't be required with this change.
Change-Id: I835dd05166732ca213c72eae2904815a8769599b Signed-off-by: Karthik Rajagopalan <krajagopalan@nvidia.com>
show more ...
|
379e492a | 28-Aug-2024 |
Patrick Williams <patrick@stwcx.xyz> |
Adjust strncpy sizes
When building under bitbake with the latest openbmc, we get compile warnings such as these:
``` | ../git/sections/cper-section-nvidia.c: In function 'ir_section_nvidia_to_cper'
Adjust strncpy sizes
When building under bitbake with the latest openbmc, we get compile warnings such as these:
``` | ../git/sections/cper-section-nvidia.c: In function 'ir_section_nvidia_to_cper': | ../git/sections/cper-section-nvidia.c:67:9: error: '__builtin_strncpy' specified bound 16 equals destination size [-Werror=stringop-truncation] | 67 | strncpy(section_cper->Signature, ```
Using `strncpy` on its own is unsafe because a string too long will end up in the destination buffer without NUL termination. Adjust the strncpy to be one shorter than the buffer and force the trailing byte to be a NUL.
Repeat this pattern for all `strncpy` calls.
Change-Id: I45c630733f0138d2b089a60f698d75e1c09de9e2 Signed-off-by: Patrick Williams <patrick@stwcx.xyz>
show more ...
|
bf68fa15 | 04-Aug-2024 |
George Liu <liuxiwei@ieisystem.com> |
generator/README.md: Fix MD040 warnings
The following warnings are generated by using markdownlint analysis: ``` MD040/fenced-code-language Fenced code blocks should have a language specified [Conte
generator/README.md: Fix MD040 warnings
The following warnings are generated by using markdownlint analysis: ``` MD040/fenced-code-language Fenced code blocks should have a language specified [Context: "```"] ``` Refer to markdown-lint [1] to fix MD040 [1]: https://github.com/updownpress/markdown-lint/blob/master/rules/040-fenced-code-language.md
Change-Id: I172710424721f2694c8eb5efb186db1f107279ec Signed-off-by: George Liu <liuxiwei@ieisystem.com>
show more ...
|
683e0550 | 07-Mar-2024 |
Karthik Rajagopalan <krajagopalan@nvidia.com> |
Add support for NVIDIA CPERs
Support Nvidia CPER entries.
Change-Id: Iea9bde181ead55ad99cdb2a341501bf48e1d82a8 Signed-off-by: Ed Tanous <etanous@nvidia.com> |
fedd457d | 12-Jul-2024 |
Ed Tanous <ed@tanous.net> |
Remove trailing whitespace
clang-format won't remove trailing whitespace if that's the only change. Fix them all.
Change-Id: Ic6e14af43cdd11905d3b58430d49b9ec1484f812 Signed-off-by: Ed Tanous <ed@t
Remove trailing whitespace
clang-format won't remove trailing whitespace if that's the only change. Fix them all.
Change-Id: Ic6e14af43cdd11905d3b58430d49b9ec1484f812 Signed-off-by: Ed Tanous <ed@tanous.net>
show more ...
|
b35d957e | 18-Jun-2024 |
Ed Tanous <etanous@nvidia.com> |
Enforce const correctness
Clang enforces const correctness. Apply its fixes.
Change-Id: I93f6a6dcb11844003a3691292de721e3b72b4a47 Signed-off-by: Ed Tanous <etanous@nvidia.com> |
f8fc7052 | 03-May-2024 |
John Chung <john.chung@arm.com> |
Formatting .c/.h files and fix memory leakage issues
Signed-off-by: John Chung <john.chung@arm.com> Change-Id: Id8328f412c2724992d80c0b3f895c8f85bc4ae68 |
044afd01 | 03-May-2024 |
John Chung <john.chung@arm.com> |
Formatting coding style
* .json files * .md files
Signed-off-by: John Chung <john.chung@arm.com> Change-Id: I5fec2bbc1e76ae68a29eb5610f567979cc794bc8 |
ef9a325f | 24-Aug-2022 |
Lawrence Tang <lawrence.tang@arm.com> |
cper_generate: Add dynamic printing of section shortcodes.
Change-Id: Ic946361358c4b75c1a42c0164ef9d0998faf4a37 |
8f977457 | 24-Aug-2022 |
Lawrence Tang <lawrence.tang@arm.com> |
Switch to modular includes for generator.
Change-Id: Ie2926938912400b86c32733f04d59377c447c66c |
617949e4 | 08-Aug-2022 |
Lawrence Tang <lawrence.tang@arm.com> |
Add CPER conversion for single section records. |
e31af623 | 08-Aug-2022 |
Lawrence Tang <lawrence.tang@arm.com> |
Add dependency information to README. |
5f388a3f | 08-Aug-2022 |
Lawrence Tang <lawrence.tang@arm.com> |
Fix minor generation bug, reformat CLI parsing. |
efe17e2c | 08-Aug-2022 |
Lawrence Tang <lawrence.tang@arm.com> |
Fix several review comments. |
e407b4c8 | 21-Jul-2022 |
Lawrence Tang <lawrence.tang@arm.com> |
Partial reformat to kernel code style. |
0a4b3f2d | 21-Jul-2022 |
Lawrence Tang <lawrence.tang@arm.com> |
Fix bugs appearing from fuzzing. |
e29006a8 | 20-Jul-2022 |
Lawrence Tang <lawrence.tang@arm.com> |
Remove outdated mention to AER. |
04750a9e | 20-Jul-2022 |
Lawrence Tang <lawrence.tang@arm.com> |
Fix errata in IA32x64 processing. |
3ab351fe | 20-Jul-2022 |
Lawrence Tang <lawrence.tang@arm.com> |
Fix errors in CPER write, remove PCIe AER support. |
01e3a44d | 20-Jul-2022 |
Lawrence Tang <lawrence.tang@arm.com> |
Fix IA32x64 pointer corruption, invalid generation on ARM. |
aacf0e26 | 20-Jul-2022 |
Lawrence Tang <lawrence.tang@arm.com> |
Add fixes based on test fuzzing. |