| 62d53785 | 04-Feb-2026 |
Cosmo Chou <cosmo.chou@quantatw.com> |
oemcommands: oem_crashdump: remove unused VirtualBankV3 structure
Virtual Bank v3 was never implemented in any BIOS release. Remove the unused structure and associated parsing code to simplify maint
oemcommands: oem_crashdump: remove unused VirtualBankV3 structure
Virtual Bank v3 was never implemented in any BIOS release. Remove the unused structure and associated parsing code to simplify maintenance and prevent issues.
Change-Id: Ib1c1e2da505a663cbbdb57b83c59b4cc2d7a0559 Signed-off-by: Cosmo Chou <cosmo.chou@quantatw.com>
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| d6550abc | 27-Nov-2025 |
Cosmo Chou <cosmo.chou@quantatw.com> |
oemcommands: oem crashdump support for Turin and Venice
- Add MCA Bank V4 and CPU WDT Bank V4/V5 for Turin and Venice. - Change PCIe bus number to use hex formatting.
Tested: V4: ``` root@bmc:~# ca
oemcommands: oem crashdump support for Turin and Venice
- Add MCA Bank V4 and CPU WDT Bank V4/V5 for Turin and Venice. - Change PCIe bus number to use hex formatting.
Tested: V4: ``` root@bmc:~# cat /var/lib/fb-ipmi-oem/crashdump_11.txt Crash Dump generated at: 2025-11-27 09:14:09
[Bus1a Dev2 Fun3] Command : 0xA2A1 Status : 0xB2B1 Slot : 0xC2C1 Secondary Bus : 0x0B Vendor ID : 0x3412 Device ID : 0x7856 Class Code : 0x332211 Bridge: Secondary Status : 0x0201 Bridge: Control : 0x0403 Uncorrectable Error Status : 0x06050403 Uncorrectable Error Mask : 0x16151413 Uncorrectable Error Severity : 0x26252423 Correctable Error Status : 0x36353433 Correctable Error Mask : 0x46454443 Header Log DW0 : 0x0D0C0B0A Header Log DW1 : 0x1D1C1B1A Header Log DW2 : 0x2D2C2B2A Header Log DW3 : 0x3D3C3B3A Root Error Status : 0x04030201 Correctable Error Source ID : 0xDDCC Error Source ID : 0xF2F1 Lane Error Status : 0xE4E3E2E1
[CCM0] OrigWdtAddrLogHi : 0x04030201 OrigWdtAddrLogLo : 0x08070605 OrigWdtAddrLogStat : 0x0C0B0A09 [CCM1] OrigWdtAddrLogHi : 0x14131211 OrigWdtAddrLogLo : 0x18171615 OrigWdtAddrLogStat : 0x1C1B1A19 [CCM2] OrigWdtAddrLogHi : 0x24232221 OrigWdtAddrLogLo : 0x28272625 OrigWdtAddrLogStat : 0x2C2B2A29 [CCM3] OrigWdtAddrLogHi : 0x34333231 OrigWdtAddrLogLo : 0x38373635 OrigWdtAddrLogStat : 0x3C3B3A39 [CCM4] OrigWdtAddrLogHi : 0x44434241 OrigWdtAddrLogLo : 0x48474645 OrigWdtAddrLogStat : 0x4C4B4A49 [CCM5] OrigWdtAddrLogHi : 0x54535251 OrigWdtAddrLogLo : 0x58575655 OrigWdtAddrLogStat : 0x5C5B5A59 [CCM6] OrigWdtAddrLogHi : 0x64636261 OrigWdtAddrLogLo : 0x68676665 OrigWdtAddrLogStat : 0x6C6B6A69 [CCM7] OrigWdtAddrLogHi : 0x74737271 OrigWdtAddrLogLo : 0x78777675 OrigWdtAddrLogStat : 0x7C7B7A79
Bank ID : 0xB1, Core ID : 0xB2 SYNCFLOOD_STATUS : 0x0807060504030201 MCA_CTRL : 0x1817161514131211 MCA_STATUS : 0x2827262524232221 MCA_ADDR : 0x3837363534333231 MCA_MISC0 : 0x4847464544434241 MCA_CTRL_MASK : 0x5857565554535251 MCA_CONFIG : 0x6867666564636261 MCA_IPID : 0x7877767574737271 MCA_SYND : 0x8887868584838281 MCA_DESTAT : 0x9897969594939291 MCA_DEADDR : 0xA8A7A6A5A4A3A2A1 MCA_MISC1 : 0xB8B7B6B5B4B3B2B1 MCA_SYND1MSR : 0xC8C7C6C5C4C3C2C1 MCA_SYND2MSR : 0xD8D7D6D5D4D3D2D1 MCA_TRANSADDR : 0xE8E7E6E5E4E3E2E1 MCA_TRANSSYND : 0xF8F7F6F5F4F3F2F1 MCA_TRANSSTAT : 0x0102030405060708 ```
V5: ``` root@bmc:~# cat /var/lib/fb-ipmi-oem/crashdump_3.txt Crash Dump generated at: 2025-11-27 18:47:43
[CCM0] OrigWdtAddrLogHi : 0x04030201 OrigWdtAddrLogLo : 0x08070605 OrigWdtAddrLogStat : 0x0C0B0A09 [CCM1] OrigWdtAddrLogHi : 0x14131211 OrigWdtAddrLogLo : 0x18171615 OrigWdtAddrLogStat : 0x1C1B1A19 [CCM2] OrigWdtAddrLogHi : 0x24232221 OrigWdtAddrLogLo : 0x28272625 OrigWdtAddrLogStat : 0x2C2B2A29 [CCM3] OrigWdtAddrLogHi : 0x34333231 OrigWdtAddrLogLo : 0x38373635 OrigWdtAddrLogStat : 0x3C3B3A39 [CCM4] OrigWdtAddrLogHi : 0x44434241 OrigWdtAddrLogLo : 0x48474645 OrigWdtAddrLogStat : 0x4C4B4A49 [CCM5] OrigWdtAddrLogHi : 0x54535251 OrigWdtAddrLogLo : 0x58575655 OrigWdtAddrLogStat : 0x5C5B5A59 [CCM6] OrigWdtAddrLogHi : 0x64636261 OrigWdtAddrLogLo : 0x68676665 OrigWdtAddrLogStat : 0x6C6B6A69 [CCM7] OrigWdtAddrLogHi : 0x74737271 OrigWdtAddrLogLo : 0x78777675 OrigWdtAddrLogStat : 0x7C7B7A79 [CCM8] OrigWdtAddrLogHi : 0x84838281 OrigWdtAddrLogLo : 0x88878685 OrigWdtAddrLogStat : 0x8C8B8A89 [CCM9] OrigWdtAddrLogHi : 0x94939291 OrigWdtAddrLogLo : 0x98979695 OrigWdtAddrLogStat : 0x9C9B9A99 [CCM10] OrigWdtAddrLogHi : 0xA4A3A2A1 OrigWdtAddrLogLo : 0xA8A7A6A5 OrigWdtAddrLogStat : 0xACABAAA9 [CCM11] OrigWdtAddrLogHi : 0xB4B3B2B1 OrigWdtAddrLogLo : 0xB8B7B6B5 OrigWdtAddrLogStat : 0xBCBBBAB9 [CCM12] OrigWdtAddrLogHi : 0xC4C3C2C1 OrigWdtAddrLogLo : 0xC8C7C6C5 OrigWdtAddrLogStat : 0xCCCBCAC9 [CCM13] OrigWdtAddrLogHi : 0xD4D3D2D1 OrigWdtAddrLogLo : 0xD8D7D6D5 OrigWdtAddrLogStat : 0xDCDBDAD9 [CCM14] OrigWdtAddrLogHi : 0xE4E3E2E1 OrigWdtAddrLogLo : 0xE8E7E6E5 OrigWdtAddrLogStat : 0xECEBEAE9 [CCM15] OrigWdtAddrLogHi : 0xF4F3F2F1 OrigWdtAddrLogLo : 0xF8F7F6F5 OrigWdtAddrLogStat : 0xFCFBFAF9 ```
Change-Id: I70628184809e309603cdec460f5acb6dfc6c6cea Signed-off-by: Cosmo Chou <cosmo.chou@quantatw.com>
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| 695ef4e2 | 19-Sep-2025 |
Alex Wang <alex.ts.wang@fii-foxconn.com> |
oemcommands: Add command to get FRU ID
During the BIOS boot process, the BIOS issues the IPMI command "Read FRU Data" (NetFn = Storage / 0x0A, Command = 0x11; IPMI v2.0 §34.2) to read FRU contents.
oemcommands: Add command to get FRU ID
During the BIOS boot process, the BIOS issues the IPMI command "Read FRU Data" (NetFn = Storage / 0x0A, Command = 0x11; IPMI v2.0 §34.2) to read FRU contents. Per the "Read FRU Data" request format: byte 1 = FRU Device ID; bytes 2–3 = FRU inventory offset (LSB then MSB); byte 4 = count to read (count is 1-based). See IPMI v2.0 (Intel) linked below.
When the BIOS reads the FRU, there are two Bianca entries, and the BIOS cannot tell which FRU ID corresponds to the first or the second Bianca FRU because FRU IDs are dynamic based on entity-manager probing order. This OEM command uses the I2C bus and slave address as parameters to clearly map which FRU ID comes from which Bianca.
netfn 0x30, cmd 0x84: CMD_OEM_GET_FRU_ID This command allows BIOS to retrieve a specific FRU ID using the bus and slave address during POST.
Parameters: - param 0: bus - param 1: slave address
References: [1] https://www.intel.la/content/dam/www/public/us/en/documents/specification-updates/ipmi-intelligent-platform-mgt-interface-spec-2nd-gen-v2-0-spec-update.pdf
Change-Id: I1684afac02cfecec98036951701e856e886aa8fa Signed-off-by: Alex Wang <alex.ts.wang@fii-foxconn.com>
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| 4006fe72 | 19-Aug-2025 |
Liora Guo <liora.guo.wiwynn@gmail.com> |
Enhance sys_info and postcode for multi-host
This patch enhances multi-host platform support in the OCP debug card display (sys_info and postcode pages) and OEM command modules. It replaces hard-cod
Enhance sys_info and postcode for multi-host
This patch enhances multi-host platform support in the OCP debug card display (sys_info and postcode pages) and OEM command modules. It replaces hard-coded D-Bus paths and single-interface networkqueries with dynamic lookups based on the current host selector position. -Sys_Info page now retrieves the correct FRU path. -POSTCODE page dynamically calls Boot.PostCode<N> service/object for each host slot. -Network information Network information now supports fetching from eth1 when eth0 is unavailable, preventing missing data or crashes.
Motivation: Original implementation used hardcoded D-Bus paths such as PostCode0 and only checked eth0 for network-related data. On multi-host platforms, each host has a separate PostCode service, and FRU/FW data may differ or be present in alternate paths. Moreover, some systems expose IP/MAC data on eth1, causing failures when only eth0 is queried. These issue led to incomplete data being shown or crashes in the sys_info display.
Design: - Introduced logic to dynamically determine the current host position and fetch the corresponding PostCode service (PostCode0 ~ PostCode7). - Enhance `getNetworkData` to check both eth0 and eth1 for IP and MAC addresses, and avoid crashes if a value is not found. - Updated FRU retrieval to support multiple motherboard paths and fallback paths, using filtered D-Bus object mapping via interface matching and predicate. - Ensured all std::string results are checked before accessing to prevent null dereferencing and crashes.
Change-Id: I0c88eb58c3b416437a02994c4c202d5c2269d32a Signed-off-by: Liora Guo <liora.guo.wiwynn@gmail.com>
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| d95de99f | 13-Aug-2025 |
Potin Lai <potin.lai@quantatw.com> |
remove group extension commands
The Group Extension Commands section was originally introduced to support ARM SBMR.
Since phosphor-ipmi-host now provides the support for the commands [1], this redu
remove group extension commands
The Group Extension Commands section was originally introduced to support ARM SBMR.
Since phosphor-ipmi-host now provides the support for the commands [1], this redundant implementation can be removed to avoid duplication and simplify maintenance.
[1] https://github.com/openbmc/phosphor-host-ipmid/commit/0a3f40b92c44bb196e355f845c6aafd1d2dce5fe
Change-Id: Ie20ab6a035adc7314a70164adbc3bc779013dfd6 Signed-off-by: Potin Lai <potin.lai@quantatw.com>
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| e4e18ca2 | 04-Jun-2025 |
Kevin Tung <Kevin.Tung@quantatw.com> |
update sysfw version path for compatibility with new bios updater
The new BIOS updater[1] reads and writes the BIOS version from /var/bios/host0_bios_version.txt. This change updates the version pat
update sysfw version path for compatibility with new bios updater
The new BIOS updater[1] reads and writes the BIOS version from /var/bios/host0_bios_version.txt. This change updates the version path from /var/lib/fb-ipmi-oem/appData.json to /var/bios/host0_bios_version.txt to ensure compatibility and allow the new updater to retrieve the BIOS version correctly.
[1] https://gerrit.openbmc.org/c/openbmc/phosphor-bmc-code-mgmt/+/76101
Tested on Harma: ``` curl --silent $creds https://$bmc/redfish/v1/UpdateService/FirmwareInventory/Harma_BIOS_7246 { "@odata.id": "/redfish/v1/UpdateService/FirmwareInventory/Harma_BIOS_7246", "@odata.type": "#SoftwareInventory.v1_1_0.SoftwareInventory", "Description": "Unknown image", "Id": "Harma_BIOS_7246", "Name": "Software Inventory", "Status": { "Health": "Warning", "HealthRollup": "OK", "State": "Disabled" }, "Updateable": true, "Version": "F0M_2A08" } ```
Signed-off-by: Kevin Tung <Kevin.Tung@quantatw.com> Change-Id: If19b4b006961cd7514ac9556dfbf34845b7c1b74
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| 80e7f214 | 10-Jun-2025 |
Alex Wang <alex.ts.wang@fii-foxconn.com> |
Increase the PPIN input length to 16 bytes
Clemente BIOS specification requirement: change the length to 16 bytes.
Change-Id: I5eee4179f3711937eeaa2fa0566018c9f9df4831 Signed-off-by: Alex Wang <ale
Increase the PPIN input length to 16 bytes
Clemente BIOS specification requirement: change the length to 16 bytes.
Change-Id: I5eee4179f3711937eeaa2fa0566018c9f9df4831 Signed-off-by: Alex Wang <alex.ts.wang@fii-foxconn.com>
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| 13ce3793 | 27-Aug-2024 |
Patrick Williams <patrick@stwcx.xyz> |
usb-dbg: C++ise frames
Signed-off-by: Patrick Williams <patrick@stwcx.xyz> Change-Id: I25e4bcb74c8a5294b09531d95d66b22432ed070e |
| a758d0a4 | 27-Aug-2024 |
Patrick Williams <patrick@stwcx.xyz> |
usb-dbg: C++ise panel
Signed-off-by: Patrick Williams <patrick@stwcx.xyz> Change-Id: Ib4671a3598d61f903f868846196cd8e645b11fb7 |
| d96e2701 | 23-May-2024 |
Potin Lai <potin.lai@quantatw.com> |
groupextcommands: Add SBMR send boot progress command
Add send boot progress command for postcode recording. NetFn: 0x2C, Cmd: 0x02, Group: 0xAE (SBMR)
Tested Result: ``` root@bmc:~# ipmitool raw 0
groupextcommands: Add SBMR send boot progress command
Add send boot progress command for postcode recording. NetFn: 0x2C, Cmd: 0x02, Group: 0xAE (SBMR)
Tested Result: ``` root@bmc:~# ipmitool raw 0x2C 0x02 0xAE 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 ae root@bmc:~# ipmitool raw 0x2C 0x02 0xAE 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 ae root@bmc:~# ipmitool raw 0x2C 0x02 0xAE 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 ae root@bmc:~# busctl call xyz.openbmc_project.State.Boot.PostCode0 /xyz/openbmc_project/State/Boot/PostCode0 xyz.openbmc_project.State.Boot.PostCode GetPostCodes q 1 -j { "type" : "a(tay)", "data" : [ [ [ 72623859790382856, [ 1, 2, 3, 4, 5, 6, 7, 8, 9 ] ], [ 1230066625199609624, [ 17, 18, 19, 20, 21, 22, 23, 24, 25 ] ], [ 2387509390608836392, [ 33, 34, 35, 36, 37, 38, 39, 40, 41 ] ] ] ] } ```
Change-Id: If064fe1300c63e334022a54054958a000200d9d8 Signed-off-by: Potin Lai <potin.lai@quantatw.com>
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| 010dee04 | 16-Aug-2024 |
Patrick Williams <patrick@stwcx.xyz> |
clang-format: re-format for clang-18
clang-format-18 isn't compatible with the clang-format-17 output, so we need to reformat the code with the latest version. The way clang-18 handles lambda forma
clang-format: re-format for clang-18
clang-format-18 isn't compatible with the clang-format-17 output, so we need to reformat the code with the latest version. The way clang-18 handles lambda formatting also changed, so we have made changes to the organization default style format to better handle lambda formatting.
See I5e08687e696dd240402a2780158664b7113def0e for updated style. See Iea0776aaa7edd483fa395e23de25ebf5a6288f71 for clang-18 enablement.
Change-Id: Ide19264aa5b2b01a5102b4b2a9cf226ba8dec699 Signed-off-by: Patrick Williams <patrick@stwcx.xyz>
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| 99d42b6e | 14-Aug-2024 |
Cosmo Chou <cosmo.chou@quantatw.com> |
oemcommands: add https boot commands
1. netfn 0x30, cmd 0x57: GET_HTTPS_BOOT_DATA: for BIOS to read cert data during POST
2. netfn 0x30, cmd 0x58: GET_HTTPS_BOOT_ATTR: for BIOS to read cert info du
oemcommands: add https boot commands
1. netfn 0x30, cmd 0x57: GET_HTTPS_BOOT_DATA: for BIOS to read cert data during POST
2. netfn 0x30, cmd 0x58: GET_HTTPS_BOOT_ATTR: for BIOS to read cert info during POST param 0: cert size param 1: CRC32 of the cert
Change-Id: I258072916061f7859d101f2b4f8cdda018314b0c Signed-off-by: Cosmo Chou <cosmo.chou@quantatw.com>
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| b340aa28 | 08-Jul-2024 |
Peter Yin <peter.yin@quantatw.com> |
Add extra postcode and remove critical sensor/SEL
1.Add 4-byte postcode support for AMD platform. 2.Remove critical sensor and SEL support.
Change-Id: Icb14afb4424ad03410a3a1b749036f1e6b3f3842 Sign
Add extra postcode and remove critical sensor/SEL
1.Add 4-byte postcode support for AMD platform. 2.Remove critical sensor and SEL support.
Change-Id: Icb14afb4424ad03410a3a1b749036f1e6b3f3842 Signed-off-by: Peter Yin <peter.yin@quantatw.com>
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| 7ab87bbb | 27-Jun-2024 |
Cosmo Chou <cosmo.chou@quantatw.com> |
support OEM Crashdump
Supports OEM Crashdump command, BIOS sends crashdump data during POST.
Change-Id: Ie3eaee7c14ae52623b8e150e7ef9aa453fe26820 Signed-off-by: Cosmo Chou <cosmo.chou@quantatw.com> |
| b48d6839 | 27-Mar-2024 |
Peter Yin <peter.yin@quantatw.com> |
appcommands: modify appData.json path
Application persistent data should be written to /var/lib/${PN}. Change the path for appData.json from /etc to /var/lib/fb-ipmi-oem/.
Change-Id: Ibf4bb729f919b
appcommands: modify appData.json path
Application persistent data should be written to /var/lib/${PN}. Change the path for appData.json from /etc to /var/lib/fb-ipmi-oem/.
Change-Id: Ibf4bb729f919b2bebf0c0ce46465e194c5845799 Signed-off-by: Peter Yin <peter.yin@quantatw.com>
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| 7451903c | 04-Feb-2024 |
cchoux <cosmo.chou@quantatw.com> |
parse Unified SEL
Parsing Facebook Unified SEL
Change-Id: I7c6afe1d0ee559e34f8f0d9fa6db3c0e33af25d3 Signed-off-by: Cosmo Chou <cosmo.chou@quantatw.com> |
| b2ae88b4 | 12-Sep-2023 |
cchoux <cosmo.chou@quantatw.com> |
support specifying MB FRU eeprom path
The MB FRUID should be exposed with ID 0 for BIOS to get the data to fill out SMBIOS table during POST. However, current IDs depend on the ordering of the FruDe
support specifying MB FRU eeprom path
The MB FRUID should be exposed with ID 0 for BIOS to get the data to fill out SMBIOS table during POST. However, current IDs depend on the ordering of the FruDevice object paths.
(1) Using the object with "Type: EEPROM" and "Name: MB FRU" in the EntityManager to figure out the MB FRU eeprom path. Other FRUIDs still depend on the ordering of the FruDevice object paths.
example of the entity-manager config: ``` { "Address": "$address", "Bus": "$bus", "Name": "MB FRU", "Type": "EEPROM" }, ```
(2) For System GUID that BIOS populates into SMBIOS table during POST, also use the MB FRU eeprom path instead of the hardcoding eeprom path.
Change-Id: If950c471f92b99180bab1a629d56d3a912d3b5f4 Signed-off-by: Cosmo Chou <cosmo.chou@quantatw.com>
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| 7bb4592a | 10-Apr-2023 |
Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com> |
usb-dbg: User Setting frame: Support Boot Order
Description: - Support boot order feature for ocp debug card - Change boot sequence data type from array to vector.
Design: - The behavior of user se
usb-dbg: User Setting frame: Support Boot Order
Description: - Support boot order feature for ocp debug card - Change boot sequence data type from array to vector.
Design: - The behavior of user set/get boot option on debug card will same as the oem set/get boot order cmd. The functions 'getBootOrder' and 'setBootOrder' are extracted from the OEM set/get boot order cmd for OCP debug card operation to use.
Usage: 1. Press uart button to the host want to check. 2. Go to boot order in User Setting frame will get current boot order. 3. After selecting the boot option, the option will be set on the top of the order. And this boot sequence will be get by BIOS and save after the host reboot.
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com> Change-Id: If1a2d91f43133e1779f61719a9816f974e068da3
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| 14ddea58 | 05-Jun-2023 |
Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com> |
Support dimm loop detection for the AMD platform
Description: - Support detection of the DIMM loop pattern for the AMD platform
Design: - The ipmi handler netfn=0x38,cmd=0x33 handles BIC incoming
Support dimm loop detection for the AMD platform
Description: - Support detection of the DIMM loop pattern for the AMD platform
Design: - The ipmi handler netfn=0x38,cmd=0x33 handles BIC incoming postcode and call the detection function to check if this is the DIMM loop pattern of AMD platform and store those patterns in an in-memory space.
Reference from Meta_BIOS_Requirement_Spec_v0.80 For AMD platform, the POST code looping pattern format should be: (each group has 4 bytes) ●Group #0: [DDEE0000] ●Group #1: [DDEE] + Total Error Count ●Group #2: [DDEE] + Number of Error DIMM ●Group #3: [DDEE] + Dimm location ●Group #4: [DDEE] + major code ●Group #5: [DDEE] + minor code
Change-Id: I9598f71775936cea9a860a091bc74aefea8701f3 Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
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| 2405ae98 | 10-May-2023 |
Patrick Williams <patrick@stwcx.xyz> |
clang-format: copy latest and re-format
clang-format-16 has some backwards incompatible changes that require additional settings for best compatibility and re-running the formatter. Copy the latest
clang-format: copy latest and re-format
clang-format-16 has some backwards incompatible changes that require additional settings for best compatibility and re-running the formatter. Copy the latest .clang-format from the docs repository and reformat the repository.
Change-Id: Id3ff2ed97fd733b2bbfe6e4890c2e6dd8c212085 Signed-off-by: Patrick Williams <patrick@stwcx.xyz>
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| 6c931e43 | 05-Dec-2022 |
Jayashree Dhanapal <jayashree-d@hcl.com> |
IPMI OEM BIC - Clear CMOS
Register an IPMI command handler with NetFn 0x38 Cmd 0x25 and send this command to BIC through IPMB to clear CMOS.
TESTED : Tested and verified in Facebook YosemiteV2 plat
IPMI OEM BIC - Clear CMOS
Register an IPMI command handler with NetFn 0x38 Cmd 0x25 and send this command to BIC through IPMB to clear CMOS.
TESTED : Tested and verified in Facebook YosemiteV2 platform.
Signed-off-by: Jayashree Dhanapal <jayashree-d@hcl.com> Change-Id: I5df7a637c5860ae7b0fc7e65e5737614fb3c4293
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| 05d0ce93 | 17-Nov-2022 |
Kumar Thangavel <thangavel.k@hcl.com> |
IPMI OEM BIC - Get Bios Flash Size
Register an IPMI command handler with NetFn: 0x38 Cmd: 0x19 send this command to BIC through IPMB to get the Bios flash size.
TESTED : Verified in YosemiteV2 plat
IPMI OEM BIC - Get Bios Flash Size
Register an IPMI command handler with NetFn: 0x38 Cmd: 0x19 send this command to BIC through IPMB to get the Bios flash size.
TESTED : Verified in YosemiteV2 platform and able to get bios flash size.
Signed-off-by: Kumar Thangavel <thangavel.k@hcl.com> Change-Id: I8a82f2495c1c7d4fefb49de471052cd9d740e75d
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| 41027b96 | 16-Dec-2022 |
Bonnie Lo <Bonnie_Lo@wiwynn.com> |
IPMI set CurrentHostState property
Register an IPMI handler to receive the command from BIC netFn: 0x38 cmd: 0x0C
BIC sends the GPIO value for host power state to BMC On: 0x1 Off: 0x0
This handler
IPMI set CurrentHostState property
Register an IPMI handler to receive the command from BIC netFn: 0x38 cmd: 0x0C
BIC sends the GPIO value for host power state to BMC On: 0x1 Off: 0x0
This handler starts the corresponding target to set "CurrentHostState" property On: obmc-host-startmin@$slot.target Off: obmc-host-stop@@$slot.target
Test Case: Set "RequestedHostTransition" property on phosphor-state-manager to On/Off/Reboot/ForceWarmReboot and check the host status
Signed-off-by: Bonnie Lo <Bonnie_Lo@wiwynn.com> Change-Id: I891f38d7e836238fa3ba8287df5a855cf2d9a8d9
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| 25b79bf4 | 16-Dec-2022 |
Bonnie Lo <Bonnie_Lo@wiwynn.com> |
IPMI OEM Get BIC GPIO State
Register an IPMI command handler - NetFn: 0x38 Cmd: 0x03. Send command through IPMB to get BIC GPIO state. Add Meta IANA definition for future utilization.
Limitation: 1
IPMI OEM Get BIC GPIO State
Register an IPMI command handler - NetFn: 0x38 Cmd: 0x03. Send command through IPMB to get BIC GPIO state. Add Meta IANA definition for future utilization.
Limitation: 1. Could only get the state of BIC GPIOs which are configured as GPIO 2. Couldn't get all BIC GPIO states
Test Case: Call IPMI OEM get BIC GPIO state
Signed-off-by: Bonnie Lo <Bonnie_Lo@wiwynn.com> Change-Id: Idda8d4c532b2971c14662e7b34ea101cf584fa22
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| e1ff81fa | 21-Nov-2022 |
Karthikeyan Pasupathi <pkarthikeyan1509@gmail.com> |
usb-dbg: Handled error for host selector position
Added error handling for host selector position and enhancement.
Tested on Yosemitev2
Signed-off-by: Karthikeyan Pasupathi <pkarthikeyan1509@gmail
usb-dbg: Handled error for host selector position
Added error handling for host selector position and enhancement.
Tested on Yosemitev2
Signed-off-by: Karthikeyan Pasupathi <pkarthikeyan1509@gmail.com> Change-Id: Iac9414ccc282bd3e24b6434f0ae57dac586659a6
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