xref: /openbmc/x86-power-control/README.md (revision abbcd4a5) 
1# X86 power control
2
3This repository contains an OpenBMC compliant implementation of power control
4for x86 servers. It relies on a number of features to do its job. It has several
5intentional design goals.
6
71. The BMC should maintain the Host state machine internally, and be able to
8   track state changes.
92. The implementation should either give the requested power control result, or
10   should log an error on the failure it detected.
113. The BMC should support all the common operations, hard power on/off/cycle,
12   soft power on/off/cycle.
13
14This daemon has been successfully used on a variety of server platforms; it
15should be able to support platforms with power control GPIOs similar to those in
16its config file.
17
18x86-power-control uses default json file (power-config-host0.json) for GPIO
19configuration. However this can be customized by producing your own
20power-config-host0.json file.
21
22Definitions can be configured by two type:
23
241. GPIO
25
26For the platform having direct GPIO access can use the type GPIO and define like
27below.
28
29    {
30        "Name" : "PostComplete",
31        "LineName" : "POST_COMPLETE",
32        "Type" : "GPIO"
33    },
34
352. DBUS
36
37For the platform not having direct GPIO access can use dbus based event monitor
38by using the type DBUS.
39
40    {
41        "Name" : "PowerButton",
42        "DbusName" : "xyz.openbmc_project.Chassis.Event",
43        "Path" : "/xyz/openbmc_project/Chassis/Event",
44        "Interface" : "xyz.openbmc_project.Chassis.Event",
45        "Property" : "PowerButton_Host1",
46        "Type" : "DBUS"
47    },
48
49x86-power-control will monitor the property change from the given DbusName and
50take appropriate action. \*define Property as a bool variable.
51
52Caveats: This implementation does not currently implement the common targets
53that other implementations do. There were several attempts to, but all ended in
54timing issues and boot inconsistencies during stress operations.
55
56## Build Options
57
58#### chassis-system-reset
59
60Enable chassis system power reset to allow removing power and restoring back.
61
62#### use-plt-rst
63
64The POST Complete GPIO is usually held asserted by BIOS after POST complete and
65de-asserts on reset. This de-assert behavior is currently used to detect warm
66resets.
67
68Some systems are adding support for a PLT_RST eSPI signal that can be used to
69more accurately detect warm resets. When this option is enabled,
70x86-power-control will use PLT_RST to detect warm resets instead of POST
71Complete.
72
73See https://github.com/Intel-BMC/host-misc-comm-manager for implementation
74example.
75