xref: /openbmc/x86-power-control/README.md (revision 809545a6) 
1# X86 power control
2
3This repository contains an OpenBMC compliant implementation of power control
4for x86 servers.  It relies on a number of features to do its job.  It has
5several intentional design goals.
61. The BMC should maintain the Host state machine internally, and be able to
7   track state changes.
82. The implementation should either give the requested power control result, or
9   should log an error on the failure it detected.
103. The BMC should support all the common operations, hard power on/off/cycle,
11   soft power on/off/cycle.
12
13This daemon has been successfully used on a variety of server platforms; it
14should be able to support platforms with power control GPIOs similar to those
15in its config file.
16
17x86-power-control uses default json file (power-config-host0.json) for GPIO
18configuration.  However this can be customized by producing your own
19power-config-host0.json file.
20
21Definitions can be configured by two type:
22
231. GPIO
24
25For the platform having direct GPIO access can use the type GPIO and define
26like below.
27
28    {
29        "Name" : "PostComplete",
30        "LineName" : "POST_COMPLETE",
31        "Type" : "GPIO"
32    },
33
342. DBUS
35
36For the platform not having direct GPIO access can use dbus based event monitor
37by using the type DBUS.
38
39    {
40        "Name" : "PowerButton",
41        "DbusName" : "xyz.openbmc_project.Chassis.Event",
42        "Path" : "/xyz/openbmc_project/Chassis/Event",
43        "Interface" : "xyz.openbmc_project.Chassis.Event",
44        "Property" : "PowerButton_Host1",
45        "Type" : "DBUS"
46    },
47
48x86-power-control will monitor the property change from the given DbusName and
49take appropriate action.  *define Property as a bool variable.
50
51Caveats:
52This implementation does not currently implement the common targets that other
53implementations do.  There were several attempts to, but all ended in timing
54issues and boot inconsistencies during stress operations.
55
56## Build Options
57
58#### chassis-system-reset
59Enable chassis system power reset to allow removing power and restoring back.
60
61#### use-plt-rst
62The POST Complete GPIO is usually held asserted by BIOS after POST complete and
63de-asserts on reset.  This de-assert behavior is currently used to detect warm
64resets.
65
66Some systems are adding support for a PLT_RST eSPI signal that can be used to
67more accurately detect warm resets.  When this option is enabled,
68x86-power-control will use PLT_RST to detect warm resets instead of POST
69Complete.
70
71See https://github.com/Intel-BMC/host-misc-comm-manager for implementation
72example.
73