1 /* 2 * Copyright (C) 2016 Michal Simek <michals@xilinx.com> 3 * Copyright (C) 2015 Nathan Rossi <nathan@nathanrossi.com> 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 * 7 * The following Boot Header format/structures and values are defined in the 8 * following documents: 9 * * ug1085 ZynqMP TRM doc v1.4 (Chapter 11, Table 11-4) 10 * * ug1137 ZynqMP Software Developer Guide v6.0 (Chapter 16) 11 */ 12 13 #ifndef _ZYNQMPIMAGE_H_ 14 #define _ZYNQMPIMAGE_H_ 15 16 #include <stdint.h> 17 18 #define HEADER_INTERRUPT_DEFAULT (cpu_to_le32(0xeafffffe)) 19 #define HEADER_REGINIT_NULL (cpu_to_le32(0xffffffff)) 20 #define HEADER_WIDTHDETECTION (cpu_to_le32(0xaa995566)) 21 #define HEADER_IMAGEIDENTIFIER (cpu_to_le32(0x584c4e58)) 22 #define HEADER_CPU_SELECT_A53_64BIT (0x2 << 10) 23 24 enum { 25 ENCRYPTION_EFUSE = 0xa5c3c5a3, 26 ENCRYPTION_OEFUSE = 0xa5c3c5a7, 27 ENCRYPTION_BBRAM = 0x3a5c3c5a, 28 ENCRYPTION_OBBRAM = 0xa35c7ca5, 29 ENCRYPTION_NONE = 0x0, 30 }; 31 32 struct zynqmp_reginit { 33 uint32_t address; 34 uint32_t data; 35 }; 36 37 #define HEADER_INTERRUPT_VECTORS 8 38 #define HEADER_REGINITS 256 39 40 struct image_header_table { 41 uint32_t version; /* 0x00 */ 42 uint32_t nr_parts; /* 0x04 */ 43 uint32_t partition_header_offset; /* 0x08, divided by 4 */ 44 uint32_t image_header_offset; /* 0x0c, divided by 4 */ 45 uint32_t auth_certificate_offset; /* 0x10 */ 46 uint32_t boot_device; /* 0x14 */ 47 uint32_t __reserved1[9]; /* 0x18 - 0x38 */ 48 uint32_t checksum; /* 0x3c */ 49 }; 50 51 #define PART_ATTR_VEC_LOCATION 0x800000 52 #define PART_ATTR_BS_BLOCK_SIZE_MASK 0x700000 53 #define PART_ATTR_BS_BLOCK_SIZE_DEFAULT 0x000000 54 #define PART_ATTR_BS_BLOCK_SIZE_8MB 0x400000 55 #define PART_ATTR_BIG_ENDIAN 0x040000 56 #define PART_ATTR_PART_OWNER_MASK 0x030000 57 #define PART_ATTR_PART_OWNER_FSBL 0x000000 58 #define PART_ATTR_PART_OWNER_UBOOT 0x010000 59 #define PART_ATTR_RSA_SIG 0x008000 60 #define PART_ATTR_CHECKSUM_MASK 0x007000 61 #define PART_ATTR_CHECKSUM_NONE 0x000000 62 #define PART_ATTR_CHECKSUM_MD5 0x001000 63 #define PART_ATTR_CHECKSUM_SHA2 0x002000 64 #define PART_ATTR_CHECKSUM_SHA3 0x003000 65 #define PART_ATTR_DEST_CPU_SHIFT 8 66 #define PART_ATTR_DEST_CPU_MASK 0x000f00 67 #define PART_ATTR_DEST_CPU_NONE 0x000000 68 #define PART_ATTR_DEST_CPU_A53_0 0x000100 69 #define PART_ATTR_DEST_CPU_A53_1 0x000200 70 #define PART_ATTR_DEST_CPU_A53_2 0x000300 71 #define PART_ATTR_DEST_CPU_A53_3 0x000400 72 #define PART_ATTR_DEST_CPU_R5_0 0x000500 73 #define PART_ATTR_DEST_CPU_R5_1 0x000600 74 #define PART_ATTR_DEST_CPU_R5_L 0x000700 75 #define PART_ATTR_DEST_CPU_PMU 0x000800 76 #define PART_ATTR_ENCRYPTED 0x000080 77 #define PART_ATTR_DEST_DEVICE_SHIFT 4 78 #define PART_ATTR_DEST_DEVICE_MASK 0x000070 79 #define PART_ATTR_DEST_DEVICE_NONE 0x000000 80 #define PART_ATTR_DEST_DEVICE_PS 0x000010 81 #define PART_ATTR_DEST_DEVICE_PL 0x000020 82 #define PART_ATTR_DEST_DEVICE_PMU 0x000030 83 #define PART_ATTR_DEST_DEVICE_XIP 0x000040 84 #define PART_ATTR_A53_EXEC_AARCH32 0x000008 85 #define PART_ATTR_TARGET_EL_SHIFT 1 86 #define PART_ATTR_TARGET_EL_MASK 0x000006 87 #define PART_ATTR_TZ_SECURE 0x000001 88 89 static const char *dest_cpus[0x10] = { 90 "none", "a5x-0", "a5x-1", "a5x-2", "a5x-3", "r5-0", "r5-1", 91 "r5-lockstep", "pmu", "unknown", "unknown", "unknown", "unknown", 92 "unknown", "unknown", "unknown" 93 }; 94 95 struct partition_header { 96 uint32_t len_enc; /* 0x00, divided by 4 */ 97 uint32_t len_unenc; /* 0x04, divided by 4 */ 98 uint32_t len; /* 0x08, divided by 4 */ 99 uint32_t next_partition_offset; /* 0x0c */ 100 uint64_t entry_point; /* 0x10 */ 101 uint64_t load_address; /* 0x18 */ 102 uint32_t offset; /* 0x20, divided by 4 */ 103 uint32_t attributes; /* 0x24 */ 104 uint32_t __reserved1; /* 0x28 */ 105 uint32_t checksum_offset; /* 0x2c, divided by 4 */ 106 uint32_t __reserved2; /* 0x30 */ 107 uint32_t auth_certificate_offset; /* 0x34 */ 108 uint32_t __reserved3; /* 0x38 */ 109 uint32_t checksum; /* 0x3c */ 110 }; 111 112 struct zynqmp_header { 113 uint32_t interrupt_vectors[HEADER_INTERRUPT_VECTORS]; /* 0x0 */ 114 uint32_t width_detection; /* 0x20 */ 115 uint32_t image_identifier; /* 0x24 */ 116 uint32_t encryption; /* 0x28 */ 117 uint32_t image_load; /* 0x2c */ 118 uint32_t image_offset; /* 0x30 */ 119 uint32_t pfw_image_length; /* 0x34 */ 120 uint32_t total_pfw_image_length; /* 0x38 */ 121 uint32_t image_size; /* 0x3c */ 122 uint32_t image_stored_size; /* 0x40 */ 123 uint32_t image_attributes; /* 0x44 */ 124 uint32_t checksum; /* 0x48 */ 125 uint32_t __reserved1[19]; /* 0x4c */ 126 uint32_t image_header_table_offset; /* 0x98 */ 127 uint32_t __reserved2[7]; /* 0x9c */ 128 struct zynqmp_reginit register_init[HEADER_REGINITS]; /* 0xb8 */ 129 uint32_t __reserved4[66]; /* 0x9c0 */ 130 }; 131 132 #endif /* _ZYNQMPIMAGE_H_ */ 133