1# Copyright (c) 2016 Google, Inc
2# Written by Simon Glass <sjg@chromium.org>
3#
4# SPDX-License-Identifier:      GPL-2.0+
5#
6# Entry-type module for 'u-boot'
7#
8
9import struct
10
11from entry import Entry
12from blob import Entry_blob
13
14FD_SIGNATURE   = struct.pack('<L', 0x0ff0a55a)
15MAX_REGIONS    = 5
16
17(REGION_DESCRIPTOR, REGION_BIOS, REGION_ME, REGION_GBE,
18        REGION_PDATA) = range(5)
19
20class Region:
21    def __init__(self, data, frba, region_num):
22        pos = frba + region_num * 4
23        val = struct.unpack('<L', data[pos:pos + 4])[0]
24        self.base = (val & 0xfff) << 12
25        self.limit = ((val & 0x0fff0000) >> 4) | 0xfff
26        self.size = self.limit - self.base + 1
27
28class Entry_intel_descriptor(Entry_blob):
29    """Intel flash descriptor block (4KB)
30
31    This is placed at the start of flash and provides information about
32    the SPI flash regions. In particular it provides the base address and
33    size of the ME region, allowing us to place the ME binary in the right
34    place.
35    """
36    def __init__(self, image, etype, node):
37        Entry_blob.__init__(self, image, etype, node)
38        self._regions = []
39
40    def GetPositions(self):
41        pos = self.data.find(FD_SIGNATURE)
42        if pos == -1:
43            self.Raise('Cannot find FD signature')
44        flvalsig, flmap0, flmap1, flmap2 = struct.unpack('<LLLL',
45                                                    self.data[pos:pos + 16])
46        frba = ((flmap0 >> 16) & 0xff) << 4
47        for i in range(MAX_REGIONS):
48            self._regions.append(Region(self.data, frba, i))
49
50        # Set the offset for ME only, for now, since the others are not used
51        return {'intel-me': [self._regions[REGION_ME].base,
52                             self._regions[REGION_ME].size]}
53