xref: /openbmc/u-boot/scripts/Makefile.build (revision 6b44ae6b) 
1# ==========================================================================
2# Building
3# ==========================================================================
4
5# Modified for U-Boot
6prefix := tpl
7src := $(patsubst $(prefix)/%,%,$(obj))
8ifeq ($(obj),$(src))
9prefix := spl
10src := $(patsubst $(prefix)/%,%,$(obj))
11ifeq ($(obj),$(src))
12prefix := .
13endif
14endif
15
16PHONY := __build
17__build:
18
19# Init all relevant variables used in kbuild files so
20# 1) they have correct type
21# 2) they do not inherit any value from the environment
22obj-y :=
23obj-m :=
24lib-y :=
25lib-m :=
26always :=
27targets :=
28subdir-y :=
29subdir-m :=
30EXTRA_AFLAGS   :=
31EXTRA_CFLAGS   :=
32EXTRA_CPPFLAGS :=
33EXTRA_LDFLAGS  :=
34asflags-y  :=
35ccflags-y  :=
36cppflags-y :=
37ldflags-y  :=
38
39subdir-asflags-y :=
40subdir-ccflags-y :=
41
42# Read auto.conf if it exists, otherwise ignore
43# Modified for U-Boot
44-include include/config/auto.conf
45-include $(prefix)/include/autoconf.mk
46include scripts/Makefile.uncmd_spl
47
48include scripts/Kbuild.include
49
50# For backward compatibility check that these variables do not change
51save-cflags := $(CFLAGS)
52
53# The filename Kbuild has precedence over Makefile
54kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
55kbuild-file := $(if $(wildcard $(kbuild-dir)/Kbuild),$(kbuild-dir)/Kbuild,$(kbuild-dir)/Makefile)
56include $(kbuild-file)
57
58# Added for U-Boot
59asflags-y  += $(PLATFORM_CPPFLAGS)
60ccflags-y  += $(PLATFORM_CPPFLAGS)
61cppflags-y += $(PLATFORM_CPPFLAGS)
62
63# If the save-* variables changed error out
64ifeq ($(KBUILD_NOPEDANTIC),)
65        ifneq ("$(save-cflags)","$(CFLAGS)")
66                $(error CFLAGS was changed in "$(kbuild-file)". Fix it to use ccflags-y)
67        endif
68endif
69
70include scripts/Makefile.lib
71
72ifdef host-progs
73ifneq ($(hostprogs-y),$(host-progs))
74$(warning kbuild: $(obj)/Makefile - Usage of host-progs is deprecated. Please replace with hostprogs-y!)
75hostprogs-y += $(host-progs)
76endif
77endif
78
79# Do not include host rules unless needed
80ifneq ($(hostprogs-y)$(hostprogs-m),)
81include scripts/Makefile.host
82endif
83
84# Uncommented for U-Boot
85#  We need to create output dicrectory for SPL and TPL even for in-tree build
86#ifneq ($(KBUILD_SRC),)
87# Create output directory if not already present
88_dummy := $(shell [ -d $(obj) ] || mkdir -p $(obj))
89
90# Create directories for object files if directory does not exist
91# Needed when obj-y := dir/file.o syntax is used
92_dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] || mkdir -p $(d)))
93#endif
94
95ifndef obj
96$(warning kbuild: Makefile.build is included improperly)
97endif
98
99# ===========================================================================
100
101ifneq ($(strip $(lib-y) $(lib-m) $(lib-)),)
102lib-target := $(obj)/lib.a
103endif
104
105ifneq ($(strip $(obj-y) $(obj-m) $(obj-) $(subdir-m) $(lib-target)),)
106builtin-target := $(obj)/built-in.o
107endif
108
109modorder-target := $(obj)/modules.order
110
111# We keep a list of all modules in $(MODVERDIR)
112
113__build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \
114	 $(if $(KBUILD_MODULES),$(obj-m) $(modorder-target)) \
115	 $(subdir-ym) $(always)
116	@:
117
118# Linus' kernel sanity checking tool
119ifneq ($(KBUILD_CHECKSRC),0)
120  ifeq ($(KBUILD_CHECKSRC),2)
121    quiet_cmd_force_checksrc = CHECK   $<
122          cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
123  else
124      quiet_cmd_checksrc     = CHECK   $<
125            cmd_checksrc     = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
126  endif
127endif
128
129# Do section mismatch analysis for each module/built-in.o
130ifdef CONFIG_DEBUG_SECTION_MISMATCH
131  cmd_secanalysis = ; scripts/mod/modpost $@
132endif
133
134# Compile C sources (.c)
135# ---------------------------------------------------------------------------
136
137# Default is built-in, unless we know otherwise
138modkern_cflags =                                          \
139	$(if $(part-of-module),                           \
140		$(KBUILD_CFLAGS_MODULE) $(CFLAGS_MODULE), \
141		$(KBUILD_CFLAGS_KERNEL) $(CFLAGS_KERNEL))
142quiet_modtag := $(empty)   $(empty)
143
144$(real-objs-m)        : part-of-module := y
145$(real-objs-m:.o=.i)  : part-of-module := y
146$(real-objs-m:.o=.s)  : part-of-module := y
147$(real-objs-m:.o=.lst): part-of-module := y
148
149$(real-objs-m)        : quiet_modtag := [M]
150$(real-objs-m:.o=.i)  : quiet_modtag := [M]
151$(real-objs-m:.o=.s)  : quiet_modtag := [M]
152$(real-objs-m:.o=.lst): quiet_modtag := [M]
153
154$(obj-m)              : quiet_modtag := [M]
155
156# Default for not multi-part modules
157modname = $(basetarget)
158
159$(multi-objs-m)         : modname = $(modname-multi)
160$(multi-objs-m:.o=.i)   : modname = $(modname-multi)
161$(multi-objs-m:.o=.s)   : modname = $(modname-multi)
162$(multi-objs-m:.o=.lst) : modname = $(modname-multi)
163$(multi-objs-y)         : modname = $(modname-multi)
164$(multi-objs-y:.o=.i)   : modname = $(modname-multi)
165$(multi-objs-y:.o=.s)   : modname = $(modname-multi)
166$(multi-objs-y:.o=.lst) : modname = $(modname-multi)
167
168quiet_cmd_cc_s_c = CC $(quiet_modtag)  $@
169cmd_cc_s_c       = $(CC) $(c_flags) $(DISABLE_LTO) -fverbose-asm -S -o $@ $<
170
171$(obj)/%.s: $(src)/%.c FORCE
172	$(call if_changed_dep,cc_s_c)
173
174quiet_cmd_cc_i_c = CPP $(quiet_modtag) $@
175cmd_cc_i_c       = $(CPP) $(c_flags)   -o $@ $<
176
177$(obj)/%.i: $(src)/%.c FORCE
178	$(call if_changed_dep,cc_i_c)
179
180cmd_gensymtypes =                                                           \
181    $(CPP) -D__GENKSYMS__ $(c_flags) $< |                                   \
182    $(GENKSYMS) $(if $(1), -T $(2))                                         \
183     $(patsubst y,-s _,$(CONFIG_HAVE_UNDERSCORE_SYMBOL_PREFIX))             \
184     $(if $(KBUILD_PRESERVE),-p)                                            \
185     -r $(firstword $(wildcard $(2:.symtypes=.symref) /dev/null))
186
187quiet_cmd_cc_symtypes_c = SYM $(quiet_modtag) $@
188cmd_cc_symtypes_c =                                                         \
189    set -e;                                                                 \
190    $(call cmd_gensymtypes,true,$@) >/dev/null;                             \
191    test -s $@ || rm -f $@
192
193$(obj)/%.symtypes : $(src)/%.c FORCE
194	$(call cmd,cc_symtypes_c)
195
196# C (.c) files
197# The C file is compiled and updated dependency information is generated.
198# (See cmd_cc_o_c + relevant part of rule_cc_o_c)
199
200quiet_cmd_cc_o_c = CC $(quiet_modtag)  $@
201
202ifndef CONFIG_MODVERSIONS
203cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<
204
205else
206# When module versioning is enabled the following steps are executed:
207# o compile a .tmp_<file>.o from <file>.c
208# o if .tmp_<file>.o doesn't contain a __ksymtab version, i.e. does
209#   not export symbols, we just rename .tmp_<file>.o to <file>.o and
210#   are done.
211# o otherwise, we calculate symbol versions using the good old
212#   genksyms on the preprocessed source and postprocess them in a way
213#   that they are usable as a linker script
214# o generate <file>.o from .tmp_<file>.o using the linker to
215#   replace the unresolved symbols __crc_exported_symbol with
216#   the actual value of the checksum generated by genksyms
217
218cmd_cc_o_c = $(CC) $(c_flags) -c -o $(@D)/.tmp_$(@F) $<
219cmd_modversions =								\
220	if $(OBJDUMP) -h $(@D)/.tmp_$(@F) | grep -q __ksymtab; then		\
221		$(call cmd_gensymtypes,$(KBUILD_SYMTYPES),$(@:.o=.symtypes))	\
222		    > $(@D)/.tmp_$(@F:.o=.ver);					\
223										\
224		$(LD) $(LDFLAGS) -r -o $@ $(@D)/.tmp_$(@F) 			\
225			-T $(@D)/.tmp_$(@F:.o=.ver);				\
226		rm -f $(@D)/.tmp_$(@F) $(@D)/.tmp_$(@F:.o=.ver);		\
227	else									\
228		mv -f $(@D)/.tmp_$(@F) $@;					\
229	fi;
230endif
231
232ifdef CONFIG_FTRACE_MCOUNT_RECORD
233ifdef BUILD_C_RECORDMCOUNT
234ifeq ("$(origin RECORDMCOUNT_WARN)", "command line")
235  RECORDMCOUNT_FLAGS = -w
236endif
237# Due to recursion, we must skip empty.o.
238# The empty.o file is created in the make process in order to determine
239#  the target endianness and word size. It is made before all other C
240#  files, including recordmcount.
241sub_cmd_record_mcount =					\
242	if [ $(@) != "scripts/mod/empty.o" ]; then	\
243		$(objtree)/scripts/recordmcount $(RECORDMCOUNT_FLAGS) "$(@)";	\
244	fi;
245recordmcount_source := $(srctree)/scripts/recordmcount.c \
246		    $(srctree)/scripts/recordmcount.h
247else
248sub_cmd_record_mcount = set -e ; perl $(srctree)/scripts/recordmcount.pl "$(ARCH)" \
249	"$(if $(CONFIG_CPU_BIG_ENDIAN),big,little)" \
250	"$(if $(CONFIG_64BIT),64,32)" \
251	"$(OBJDUMP)" "$(OBJCOPY)" "$(CC) $(KBUILD_CFLAGS)" \
252	"$(LD)" "$(NM)" "$(RM)" "$(MV)" \
253	"$(if $(part-of-module),1,0)" "$(@)";
254recordmcount_source := $(srctree)/scripts/recordmcount.pl
255endif
256cmd_record_mcount =						\
257	if [ "$(findstring $(CC_FLAGS_FTRACE),$(_c_flags))" =	\
258	     "$(CC_FLAGS_FTRACE)" ]; then			\
259		$(sub_cmd_record_mcount)			\
260	fi;
261endif
262
263define rule_cc_o_c
264	$(call echo-cmd,checksrc) $(cmd_checksrc)			  \
265	$(call echo-cmd,cc_o_c) $(cmd_cc_o_c);				  \
266	$(cmd_modversions)						  \
267	$(call echo-cmd,record_mcount)					  \
268	$(cmd_record_mcount)						  \
269	scripts/basic/fixdep $(depfile) $@ '$(call make-cmd,cc_o_c)' >    \
270	                                              $(dot-target).tmp;  \
271	rm -f $(depfile);						  \
272	mv -f $(dot-target).tmp $(dot-target).cmd
273endef
274
275# Built-in and composite module parts
276$(obj)/%.o: $(src)/%.c $(recordmcount_source) FORCE
277	$(call cmd,force_checksrc)
278	$(call if_changed_rule,cc_o_c)
279
280# Single-part modules are special since we need to mark them in $(MODVERDIR)
281
282$(single-used-m): $(obj)/%.o: $(src)/%.c $(recordmcount_source) FORCE
283	$(call cmd,force_checksrc)
284	$(call if_changed_rule,cc_o_c)
285	@{ echo $(@:.o=.ko); echo $@; } > $(MODVERDIR)/$(@F:.o=.mod)
286
287quiet_cmd_cc_lst_c = MKLST   $@
288      cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \
289		     $(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \
290				     System.map $(OBJDUMP) > $@
291
292$(obj)/%.lst: $(src)/%.c FORCE
293	$(call if_changed_dep,cc_lst_c)
294
295# Compile assembler sources (.S)
296# ---------------------------------------------------------------------------
297
298modkern_aflags := $(KBUILD_AFLAGS_KERNEL) $(AFLAGS_KERNEL)
299
300$(real-objs-m)      : modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)
301$(real-objs-m:.o=.s): modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)
302
303quiet_cmd_as_s_S = CPP $(quiet_modtag) $@
304cmd_as_s_S       = $(CPP) $(a_flags)   -o $@ $<
305
306$(obj)/%.s: $(src)/%.S FORCE
307	$(call if_changed_dep,as_s_S)
308
309quiet_cmd_as_o_S = AS $(quiet_modtag)  $@
310cmd_as_o_S       = $(CC) $(a_flags) -c -o $@ $<
311
312$(obj)/%.o: $(src)/%.S FORCE
313	$(call if_changed_dep,as_o_S)
314
315targets += $(real-objs-y) $(real-objs-m) $(lib-y)
316targets += $(extra-y) $(MAKECMDGOALS) $(always)
317
318# Linker scripts preprocessor (.lds.S -> .lds)
319# ---------------------------------------------------------------------------
320quiet_cmd_cpp_lds_S = LDS     $@
321      cmd_cpp_lds_S = $(CPP) $(cpp_flags) -P -C -U$(ARCH) \
322	                     -D__ASSEMBLY__ -DLINKER_SCRIPT -o $@ $<
323
324$(obj)/%.lds: $(src)/%.lds.S FORCE
325	$(call if_changed_dep,cpp_lds_S)
326
327# ASN.1 grammar
328# ---------------------------------------------------------------------------
329quiet_cmd_asn1_compiler = ASN.1   $@
330      cmd_asn1_compiler = $(objtree)/scripts/asn1_compiler $< \
331				$(subst .h,.c,$@) $(subst .c,.h,$@)
332
333.PRECIOUS: $(objtree)/$(obj)/%-asn1.c $(objtree)/$(obj)/%-asn1.h
334
335$(obj)/%-asn1.c $(obj)/%-asn1.h: $(src)/%.asn1 $(objtree)/scripts/asn1_compiler
336	$(call cmd,asn1_compiler)
337
338# Build the compiled-in targets
339# ---------------------------------------------------------------------------
340
341# To build objects in subdirs, we need to descend into the directories
342$(sort $(subdir-obj-y)): $(subdir-ym) ;
343
344#
345# Rule to compile a set of .o files into one .o file
346#
347ifdef builtin-target
348quiet_cmd_link_o_target = LD      $@
349# If the list of objects to link is empty, just create an empty built-in.o
350cmd_link_o_target = $(if $(strip $(obj-y)),\
351		      $(LD) $(ld_flags) -r -o $@ $(filter $(obj-y), $^) \
352		      $(cmd_secanalysis),\
353		      rm -f $@; $(AR) rcs$(KBUILD_ARFLAGS) $@)
354
355$(builtin-target): $(obj-y) FORCE
356	$(call if_changed,link_o_target)
357
358targets += $(builtin-target)
359endif # builtin-target
360
361#
362# Rule to create modules.order file
363#
364# Create commands to either record .ko file or cat modules.order from
365# a subdirectory
366modorder-cmds =						\
367	$(foreach m, $(modorder),			\
368		$(if $(filter %/modules.order, $m),	\
369			cat $m;, echo kernel/$m;))
370
371$(modorder-target): $(subdir-ym) FORCE
372	$(Q)(cat /dev/null; $(modorder-cmds)) > $@
373
374#
375# Rule to compile a set of .o files into one .a file
376#
377ifdef lib-target
378quiet_cmd_link_l_target = AR      $@
379cmd_link_l_target = rm -f $@; $(AR) rcs$(KBUILD_ARFLAGS) $@ $(lib-y)
380
381$(lib-target): $(lib-y) FORCE
382	$(call if_changed,link_l_target)
383
384targets += $(lib-target)
385endif
386
387#
388# Rule to link composite objects
389#
390#  Composite objects are specified in kbuild makefile as follows:
391#    <composite-object>-objs := <list of .o files>
392#  or
393#    <composite-object>-y    := <list of .o files>
394link_multi_deps =                     \
395$(filter $(addprefix $(obj)/,         \
396$($(subst $(obj)/,,$(@:.o=-objs)))    \
397$($(subst $(obj)/,,$(@:.o=-y)))), $^)
398
399quiet_cmd_link_multi-y = LD      $@
400cmd_link_multi-y = $(LD) $(ld_flags) -r -o $@ $(link_multi_deps) $(cmd_secanalysis)
401
402quiet_cmd_link_multi-m = LD [M]  $@
403cmd_link_multi-m = $(cmd_link_multi-y)
404
405$(multi-used-y): FORCE
406	$(call if_changed,link_multi-y)
407$(call multi_depend, $(multi-used-y), .o, -objs -y)
408
409$(multi-used-m): FORCE
410	$(call if_changed,link_multi-m)
411	@{ echo $(@:.o=.ko); echo $(link_multi_deps); } > $(MODVERDIR)/$(@F:.o=.mod)
412$(call multi_depend, $(multi-used-m), .o, -objs -y)
413
414targets += $(multi-used-y) $(multi-used-m)
415
416
417# Descending
418# ---------------------------------------------------------------------------
419
420PHONY += $(subdir-ym)
421$(subdir-ym):
422	$(Q)$(MAKE) $(build)=$@
423
424# Add FORCE to the prequisites of a target to force it to be always rebuilt.
425# ---------------------------------------------------------------------------
426
427PHONY += FORCE
428
429FORCE:
430
431# Read all saved command lines and dependencies for the $(targets) we
432# may be building above, using $(if_changed{,_dep}). As an
433# optimization, we don't need to read them if the target does not
434# exist, we will rebuild anyway in that case.
435
436targets := $(wildcard $(sort $(targets)))
437cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd))
438
439ifneq ($(cmd_files),)
440  include $(cmd_files)
441endif
442
443# Declare the contents of the .PHONY variable as phony.  We keep that
444# information in a variable se we can use it in if_changed and friends.
445
446.PHONY: $(PHONY)
447