1# ========================================================================== 2# Building 3# ========================================================================== 4 5# Modified for U-Boot 6ifeq ($(CONFIG_TPL_BUILD),y) 7 src := $(patsubst tpl/%,%,$(obj)) 8else 9 ifeq ($(CONFIG_SPL_BUILD),y) 10 src := $(patsubst spl/%,%,$(obj)) 11 else 12 src := $(obj) 13 endif 14endif 15 16PHONY := __build 17__build: 18 19# Init all relevant variables used in kbuild files so 20# 1) they have correct type 21# 2) they do not inherit any value from the environment 22obj-y := 23obj-m := 24lib-y := 25lib-m := 26always := 27targets := 28subdir-y := 29subdir-m := 30EXTRA_AFLAGS := 31EXTRA_CFLAGS := 32EXTRA_CPPFLAGS := 33EXTRA_LDFLAGS := 34asflags-y := 35ccflags-y := 36cppflags-y := 37ldflags-y := 38 39subdir-asflags-y := 40subdir-ccflags-y := 41 42# Read auto.conf if it exists, otherwise ignore 43-include include/config/auto.conf 44 45include scripts/Kbuild.include 46 47# Added for U-Boot 48# We must include config.mk after Kbuild.include 49# so that some config.mk can use cc-option. 50include config.mk 51 52# For backward compatibility check that these variables do not change 53save-cflags := $(CFLAGS) 54 55# The filename Kbuild has precedence over Makefile 56kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src)) 57kbuild-file := $(if $(wildcard $(kbuild-dir)/Kbuild),$(kbuild-dir)/Kbuild,$(kbuild-dir)/Makefile) 58include $(kbuild-file) 59 60# If the save-* variables changed error out 61ifeq ($(KBUILD_NOPEDANTIC),) 62 ifneq ("$(save-cflags)","$(CFLAGS)") 63 $(error CFLAGS was changed in "$(kbuild-file)". Fix it to use ccflags-y) 64 endif 65endif 66 67# 68# make W=... settings 69# 70# W=1 - warnings that may be relevant and does not occur too often 71# W=2 - warnings that occur quite often but may still be relevant 72# W=3 - the more obscure warnings, can most likely be ignored 73# 74# $(call cc-option, -W...) handles gcc -W.. options which 75# are not supported by all versions of the compiler 76ifdef KBUILD_ENABLE_EXTRA_GCC_CHECKS 77warning- := $(empty) 78 79warning-1 := -Wextra -Wunused -Wno-unused-parameter 80warning-1 += -Wmissing-declarations 81warning-1 += -Wmissing-format-attribute 82warning-1 += -Wmissing-prototypes 83warning-1 += -Wold-style-definition 84warning-1 += $(call cc-option, -Wmissing-include-dirs) 85warning-1 += $(call cc-option, -Wunused-but-set-variable) 86warning-1 += $(call cc-disable-warning, missing-field-initializers) 87 88warning-2 := -Waggregate-return 89warning-2 += -Wcast-align 90warning-2 += -Wdisabled-optimization 91warning-2 += -Wnested-externs 92warning-2 += -Wshadow 93warning-2 += $(call cc-option, -Wlogical-op) 94warning-2 += $(call cc-option, -Wmissing-field-initializers) 95 96warning-3 := -Wbad-function-cast 97warning-3 += -Wcast-qual 98warning-3 += -Wconversion 99warning-3 += -Wpacked 100warning-3 += -Wpadded 101warning-3 += -Wpointer-arith 102warning-3 += -Wredundant-decls 103warning-3 += -Wswitch-default 104warning-3 += $(call cc-option, -Wpacked-bitfield-compat) 105warning-3 += $(call cc-option, -Wvla) 106 107warning := $(warning-$(findstring 1, $(KBUILD_ENABLE_EXTRA_GCC_CHECKS))) 108warning += $(warning-$(findstring 2, $(KBUILD_ENABLE_EXTRA_GCC_CHECKS))) 109warning += $(warning-$(findstring 3, $(KBUILD_ENABLE_EXTRA_GCC_CHECKS))) 110 111ifeq ("$(strip $(warning))","") 112 $(error W=$(KBUILD_ENABLE_EXTRA_GCC_CHECKS) is unknown) 113endif 114 115KBUILD_CFLAGS += $(warning) 116endif 117 118include scripts/Makefile.lib 119 120ifdef host-progs 121ifneq ($(hostprogs-y),$(host-progs)) 122$(warning kbuild: $(obj)/Makefile - Usage of host-progs is deprecated. Please replace with hostprogs-y!) 123hostprogs-y += $(host-progs) 124endif 125endif 126 127# Do not include host rules unless needed 128ifneq ($(hostprogs-y)$(hostprogs-m),) 129include scripts/Makefile.host 130endif 131 132# Uncommented for U-Boot 133# We need to create output dicrectory for SPL and TPL even for in-tree build 134#ifneq ($(KBUILD_SRC),) 135# Create output directory if not already present 136_dummy := $(shell [ -d $(obj) ] || mkdir -p $(obj)) 137 138# Create directories for object files if directory does not exist 139# Needed when obj-y := dir/file.o syntax is used 140_dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] || mkdir -p $(d))) 141#endif 142 143ifndef obj 144$(warning kbuild: Makefile.build is included improperly) 145endif 146 147# =========================================================================== 148 149ifneq ($(strip $(lib-y) $(lib-m) $(lib-n) $(lib-)),) 150lib-target := $(obj)/lib.a 151endif 152 153ifneq ($(strip $(obj-y) $(obj-m) $(obj-n) $(obj-) $(subdir-m) $(lib-target)),) 154builtin-target := $(obj)/built-in.o 155endif 156 157modorder-target := $(obj)/modules.order 158 159# We keep a list of all modules in $(MODVERDIR) 160 161__build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \ 162 $(if $(KBUILD_MODULES),$(obj-m) $(modorder-target)) \ 163 $(subdir-ym) $(always) 164 @: 165 166# Linus' kernel sanity checking tool 167ifneq ($(KBUILD_CHECKSRC),0) 168 ifeq ($(KBUILD_CHECKSRC),2) 169 quiet_cmd_force_checksrc = CHECK $< 170 cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ; 171 else 172 quiet_cmd_checksrc = CHECK $< 173 cmd_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ; 174 endif 175endif 176 177# Do section mismatch analysis for each module/built-in.o 178ifdef CONFIG_DEBUG_SECTION_MISMATCH 179 cmd_secanalysis = ; scripts/mod/modpost $@ 180endif 181 182# Compile C sources (.c) 183# --------------------------------------------------------------------------- 184 185# Default is built-in, unless we know otherwise 186modkern_cflags = \ 187 $(if $(part-of-module), \ 188 $(KBUILD_CFLAGS_MODULE) $(CFLAGS_MODULE), \ 189 $(KBUILD_CFLAGS_KERNEL) $(CFLAGS_KERNEL)) 190quiet_modtag := $(empty) $(empty) 191 192$(real-objs-m) : part-of-module := y 193$(real-objs-m:.o=.i) : part-of-module := y 194$(real-objs-m:.o=.s) : part-of-module := y 195$(real-objs-m:.o=.lst): part-of-module := y 196 197$(real-objs-m) : quiet_modtag := [M] 198$(real-objs-m:.o=.i) : quiet_modtag := [M] 199$(real-objs-m:.o=.s) : quiet_modtag := [M] 200$(real-objs-m:.o=.lst): quiet_modtag := [M] 201 202$(obj-m) : quiet_modtag := [M] 203 204# Default for not multi-part modules 205modname = $(basetarget) 206 207$(multi-objs-m) : modname = $(modname-multi) 208$(multi-objs-m:.o=.i) : modname = $(modname-multi) 209$(multi-objs-m:.o=.s) : modname = $(modname-multi) 210$(multi-objs-m:.o=.lst) : modname = $(modname-multi) 211$(multi-objs-y) : modname = $(modname-multi) 212$(multi-objs-y:.o=.i) : modname = $(modname-multi) 213$(multi-objs-y:.o=.s) : modname = $(modname-multi) 214$(multi-objs-y:.o=.lst) : modname = $(modname-multi) 215 216quiet_cmd_cc_s_c = CC $(quiet_modtag) $@ 217cmd_cc_s_c = $(CC) $(c_flags) -fverbose-asm -S -o $@ $< 218 219$(obj)/%.s: $(src)/%.c FORCE 220 $(call if_changed_dep,cc_s_c) 221 222quiet_cmd_cc_i_c = CPP $(quiet_modtag) $@ 223cmd_cc_i_c = $(CPP) $(c_flags) -o $@ $< 224 225$(obj)/%.i: $(src)/%.c FORCE 226 $(call if_changed_dep,cc_i_c) 227 228cmd_gensymtypes = \ 229 $(CPP) -D__GENKSYMS__ $(c_flags) $< | \ 230 $(GENKSYMS) $(if $(1), -T $(2)) \ 231 $(patsubst y,-s _,$(CONFIG_HAVE_UNDERSCORE_SYMBOL_PREFIX)) \ 232 $(if $(KBUILD_PRESERVE),-p) \ 233 -r $(firstword $(wildcard $(2:.symtypes=.symref) /dev/null)) 234 235quiet_cmd_cc_symtypes_c = SYM $(quiet_modtag) $@ 236cmd_cc_symtypes_c = \ 237 set -e; \ 238 $(call cmd_gensymtypes,true,$@) >/dev/null; \ 239 test -s $@ || rm -f $@ 240 241$(obj)/%.symtypes : $(src)/%.c FORCE 242 $(call cmd,cc_symtypes_c) 243 244# C (.c) files 245# The C file is compiled and updated dependency information is generated. 246# (See cmd_cc_o_c + relevant part of rule_cc_o_c) 247 248quiet_cmd_cc_o_c = CC $(quiet_modtag) $@ 249 250ifndef CONFIG_MODVERSIONS 251cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $< 252 253else 254# When module versioning is enabled the following steps are executed: 255# o compile a .tmp_<file>.o from <file>.c 256# o if .tmp_<file>.o doesn't contain a __ksymtab version, i.e. does 257# not export symbols, we just rename .tmp_<file>.o to <file>.o and 258# are done. 259# o otherwise, we calculate symbol versions using the good old 260# genksyms on the preprocessed source and postprocess them in a way 261# that they are usable as a linker script 262# o generate <file>.o from .tmp_<file>.o using the linker to 263# replace the unresolved symbols __crc_exported_symbol with 264# the actual value of the checksum generated by genksyms 265 266cmd_cc_o_c = $(CC) $(c_flags) -c -o $(@D)/.tmp_$(@F) $< 267cmd_modversions = \ 268 if $(OBJDUMP) -h $(@D)/.tmp_$(@F) | grep -q __ksymtab; then \ 269 $(call cmd_gensymtypes,$(KBUILD_SYMTYPES),$(@:.o=.symtypes)) \ 270 > $(@D)/.tmp_$(@F:.o=.ver); \ 271 \ 272 $(LD) $(LDFLAGS) -r -o $@ $(@D)/.tmp_$(@F) \ 273 -T $(@D)/.tmp_$(@F:.o=.ver); \ 274 rm -f $(@D)/.tmp_$(@F) $(@D)/.tmp_$(@F:.o=.ver); \ 275 else \ 276 mv -f $(@D)/.tmp_$(@F) $@; \ 277 fi; 278endif 279 280ifdef CONFIG_FTRACE_MCOUNT_RECORD 281ifdef BUILD_C_RECORDMCOUNT 282ifeq ("$(origin RECORDMCOUNT_WARN)", "command line") 283 RECORDMCOUNT_FLAGS = -w 284endif 285# Due to recursion, we must skip empty.o. 286# The empty.o file is created in the make process in order to determine 287# the target endianness and word size. It is made before all other C 288# files, including recordmcount. 289sub_cmd_record_mcount = \ 290 if [ $(@) != "scripts/mod/empty.o" ]; then \ 291 $(objtree)/scripts/recordmcount $(RECORDMCOUNT_FLAGS) "$(@)"; \ 292 fi; 293recordmcount_source := $(srctree)/scripts/recordmcount.c \ 294 $(srctree)/scripts/recordmcount.h 295else 296sub_cmd_record_mcount = set -e ; perl $(srctree)/scripts/recordmcount.pl "$(ARCH)" \ 297 "$(if $(CONFIG_CPU_BIG_ENDIAN),big,little)" \ 298 "$(if $(CONFIG_64BIT),64,32)" \ 299 "$(OBJDUMP)" "$(OBJCOPY)" "$(CC) $(KBUILD_CFLAGS)" \ 300 "$(LD)" "$(NM)" "$(RM)" "$(MV)" \ 301 "$(if $(part-of-module),1,0)" "$(@)"; 302recordmcount_source := $(srctree)/scripts/recordmcount.pl 303endif 304cmd_record_mcount = \ 305 if [ "$(findstring -pg,$(_c_flags))" = "-pg" ]; then \ 306 $(sub_cmd_record_mcount) \ 307 fi; 308endif 309 310define rule_cc_o_c 311 $(call echo-cmd,checksrc) $(cmd_checksrc) \ 312 $(call echo-cmd,cc_o_c) $(cmd_cc_o_c); \ 313 $(cmd_modversions) \ 314 $(call echo-cmd,record_mcount) \ 315 $(cmd_record_mcount) \ 316 scripts/basic/fixdep $(depfile) $@ '$(call make-cmd,cc_o_c)' > \ 317 $(dot-target).tmp; \ 318 rm -f $(depfile); \ 319 mv -f $(dot-target).tmp $(dot-target).cmd 320endef 321 322# Built-in and composite module parts 323$(obj)/%.o: $(src)/%.c $(recordmcount_source) FORCE 324 $(call cmd,force_checksrc) 325 $(call if_changed_rule,cc_o_c) 326 327# Single-part modules are special since we need to mark them in $(MODVERDIR) 328 329$(single-used-m): $(obj)/%.o: $(src)/%.c $(recordmcount_source) FORCE 330 $(call cmd,force_checksrc) 331 $(call if_changed_rule,cc_o_c) 332 @{ echo $(@:.o=.ko); echo $@; } > $(MODVERDIR)/$(@F:.o=.mod) 333 334quiet_cmd_cc_lst_c = MKLST $@ 335 cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \ 336 $(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \ 337 System.map $(OBJDUMP) > $@ 338 339$(obj)/%.lst: $(src)/%.c FORCE 340 $(call if_changed_dep,cc_lst_c) 341 342# Compile assembler sources (.S) 343# --------------------------------------------------------------------------- 344 345modkern_aflags := $(KBUILD_AFLAGS_KERNEL) $(AFLAGS_KERNEL) 346 347$(real-objs-m) : modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE) 348$(real-objs-m:.o=.s): modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE) 349 350quiet_cmd_as_s_S = CPP $(quiet_modtag) $@ 351cmd_as_s_S = $(CPP) $(a_flags) -o $@ $< 352 353$(obj)/%.s: $(src)/%.S FORCE 354 $(call if_changed_dep,as_s_S) 355 356quiet_cmd_as_o_S = AS $(quiet_modtag) $@ 357cmd_as_o_S = $(CC) $(a_flags) -c -o $@ $< 358 359$(obj)/%.o: $(src)/%.S FORCE 360 $(call if_changed_dep,as_o_S) 361 362targets += $(real-objs-y) $(real-objs-m) $(lib-y) 363targets += $(extra-y) $(MAKECMDGOALS) $(always) 364 365# Linker scripts preprocessor (.lds.S -> .lds) 366# --------------------------------------------------------------------------- 367quiet_cmd_cpp_lds_S = LDS $@ 368 cmd_cpp_lds_S = $(CPP) $(cpp_flags) -P -C -U$(ARCH) \ 369 -D__ASSEMBLY__ -DLINKER_SCRIPT -o $@ $< 370 371$(obj)/%.lds: $(src)/%.lds.S FORCE 372 $(call if_changed_dep,cpp_lds_S) 373 374# ASN.1 grammar 375# --------------------------------------------------------------------------- 376quiet_cmd_asn1_compiler = ASN.1 $@ 377 cmd_asn1_compiler = $(objtree)/scripts/asn1_compiler $< \ 378 $(subst .h,.c,$@) $(subst .c,.h,$@) 379 380.PRECIOUS: $(objtree)/$(obj)/%-asn1.c $(objtree)/$(obj)/%-asn1.h 381 382$(obj)/%-asn1.c $(obj)/%-asn1.h: $(src)/%.asn1 $(objtree)/scripts/asn1_compiler 383 $(call cmd,asn1_compiler) 384 385# Build the compiled-in targets 386# --------------------------------------------------------------------------- 387 388# To build objects in subdirs, we need to descend into the directories 389$(sort $(subdir-obj-y)): $(subdir-ym) ; 390 391# 392# Rule to compile a set of .o files into one .o file 393# 394ifdef builtin-target 395quiet_cmd_link_o_target = LD $@ 396# If the list of objects to link is empty, just create an empty built-in.o 397cmd_link_o_target = $(if $(strip $(obj-y)),\ 398 $(LD) $(ld_flags) -r -o $@ $(filter $(obj-y), $^) \ 399 $(cmd_secanalysis),\ 400 rm -f $@; $(AR) rcs$(KBUILD_ARFLAGS) $@) 401 402$(builtin-target): $(obj-y) FORCE 403 $(call if_changed,link_o_target) 404 405targets += $(builtin-target) 406endif # builtin-target 407 408# 409# Rule to create modules.order file 410# 411# Create commands to either record .ko file or cat modules.order from 412# a subdirectory 413modorder-cmds = \ 414 $(foreach m, $(modorder), \ 415 $(if $(filter %/modules.order, $m), \ 416 cat $m;, echo kernel/$m;)) 417 418$(modorder-target): $(subdir-ym) FORCE 419 $(Q)(cat /dev/null; $(modorder-cmds)) > $@ 420 421# 422# Rule to compile a set of .o files into one .a file 423# 424ifdef lib-target 425quiet_cmd_link_l_target = AR $@ 426cmd_link_l_target = rm -f $@; $(AR) rcs$(KBUILD_ARFLAGS) $@ $(lib-y) 427 428$(lib-target): $(lib-y) FORCE 429 $(call if_changed,link_l_target) 430 431targets += $(lib-target) 432endif 433 434# 435# Rule to link composite objects 436# 437# Composite objects are specified in kbuild makefile as follows: 438# <composite-object>-objs := <list of .o files> 439# or 440# <composite-object>-y := <list of .o files> 441link_multi_deps = \ 442$(filter $(addprefix $(obj)/, \ 443$($(subst $(obj)/,,$(@:.o=-objs))) \ 444$($(subst $(obj)/,,$(@:.o=-y)))), $^) 445 446quiet_cmd_link_multi-y = LD $@ 447cmd_link_multi-y = $(LD) $(ld_flags) -r -o $@ $(link_multi_deps) $(cmd_secanalysis) 448 449quiet_cmd_link_multi-m = LD [M] $@ 450cmd_link_multi-m = $(cmd_link_multi-y) 451 452# We would rather have a list of rules like 453# foo.o: $(foo-objs) 454# but that's not so easy, so we rather make all composite objects depend 455# on the set of all their parts 456$(multi-used-y) : %.o: $(multi-objs-y) FORCE 457 $(call if_changed,link_multi-y) 458 459$(multi-used-m) : %.o: $(multi-objs-m) FORCE 460 $(call if_changed,link_multi-m) 461 @{ echo $(@:.o=.ko); echo $(link_multi_deps); } > $(MODVERDIR)/$(@F:.o=.mod) 462 463targets += $(multi-used-y) $(multi-used-m) 464 465 466# Descending 467# --------------------------------------------------------------------------- 468 469PHONY += $(subdir-ym) 470$(subdir-ym): 471 $(Q)$(MAKE) $(build)=$@ 472 473# Add FORCE to the prequisites of a target to force it to be always rebuilt. 474# --------------------------------------------------------------------------- 475 476PHONY += FORCE 477 478FORCE: 479 480# Read all saved command lines and dependencies for the $(targets) we 481# may be building above, using $(if_changed{,_dep}). As an 482# optimization, we don't need to read them if the target does not 483# exist, we will rebuild anyway in that case. 484 485targets := $(wildcard $(sort $(targets))) 486cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd)) 487 488ifneq ($(cmd_files),) 489 include $(cmd_files) 490endif 491 492# Declare the contents of the .PHONY variable as phony. We keep that 493# information in a variable se we can use it in if_changed and friends. 494 495.PHONY: $(PHONY) 496