xref: /openbmc/u-boot/scripts/Makefile.build (revision 12308b12) 
1# SPDX-License-Identifier: GPL-2.0
2# ==========================================================================
3# Building
4# ==========================================================================
5
6# Modified for U-Boot
7prefix := tpl
8src := $(patsubst $(prefix)/%,%,$(obj))
9ifeq ($(obj),$(src))
10prefix := spl
11src := $(patsubst $(prefix)/%,%,$(obj))
12ifeq ($(obj),$(src))
13prefix := .
14endif
15endif
16
17PHONY := __build
18__build:
19
20# Init all relevant variables used in kbuild files so
21# 1) they have correct type
22# 2) they do not inherit any value from the environment
23obj-y :=
24obj-m :=
25lib-y :=
26lib-m :=
27always :=
28targets :=
29subdir-y :=
30subdir-m :=
31EXTRA_AFLAGS   :=
32EXTRA_CFLAGS   :=
33EXTRA_CPPFLAGS :=
34EXTRA_LDFLAGS  :=
35asflags-y  :=
36ccflags-y  :=
37cppflags-y :=
38ldflags-y  :=
39
40subdir-asflags-y :=
41subdir-ccflags-y :=
42
43# Read auto.conf if it exists, otherwise ignore
44# Modified for U-Boot
45-include include/config/auto.conf
46-include $(prefix)/include/autoconf.mk
47include scripts/Makefile.uncmd_spl
48
49include scripts/Kbuild.include
50
51# For backward compatibility check that these variables do not change
52save-cflags := $(CFLAGS)
53
54# The filename Kbuild has precedence over Makefile
55kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
56kbuild-file := $(if $(wildcard $(kbuild-dir)/Kbuild),$(kbuild-dir)/Kbuild,$(kbuild-dir)/Makefile)
57include $(kbuild-file)
58
59# Added for U-Boot
60asflags-y  += $(PLATFORM_CPPFLAGS)
61ccflags-y  += $(PLATFORM_CPPFLAGS)
62cppflags-y += $(PLATFORM_CPPFLAGS)
63
64# If the save-* variables changed error out
65ifeq ($(KBUILD_NOPEDANTIC),)
66        ifneq ("$(save-cflags)","$(CFLAGS)")
67                $(error CFLAGS was changed in "$(kbuild-file)". Fix it to use ccflags-y)
68        endif
69endif
70
71include scripts/Makefile.lib
72
73ifdef host-progs
74ifneq ($(hostprogs-y),$(host-progs))
75$(warning kbuild: $(obj)/Makefile - Usage of host-progs is deprecated. Please replace with hostprogs-y!)
76hostprogs-y += $(host-progs)
77endif
78endif
79
80# Do not include host rules unless needed
81ifneq ($(hostprogs-y)$(hostprogs-m),)
82include scripts/Makefile.host
83endif
84
85# Uncommented for U-Boot
86#  We need to create output dicrectory for SPL and TPL even for in-tree build
87#ifneq ($(KBUILD_SRC),)
88# Create output directory if not already present
89_dummy := $(shell [ -d $(obj) ] || mkdir -p $(obj))
90
91# Create directories for object files if directory does not exist
92# Needed when obj-y := dir/file.o syntax is used
93_dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] || mkdir -p $(d)))
94#endif
95
96ifndef obj
97$(warning kbuild: Makefile.build is included improperly)
98endif
99
100# ===========================================================================
101
102ifneq ($(strip $(lib-y) $(lib-m) $(lib-)),)
103lib-target := $(obj)/lib.a
104endif
105
106ifneq ($(strip $(obj-y) $(obj-m) $(obj-) $(subdir-m) $(lib-target)),)
107builtin-target := $(obj)/built-in.o
108endif
109
110modorder-target := $(obj)/modules.order
111
112# We keep a list of all modules in $(MODVERDIR)
113
114__build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \
115	 $(if $(KBUILD_MODULES),$(obj-m) $(modorder-target)) \
116	 $(subdir-ym) $(always)
117	@:
118
119# Linus' kernel sanity checking tool
120ifneq ($(KBUILD_CHECKSRC),0)
121  ifeq ($(KBUILD_CHECKSRC),2)
122    quiet_cmd_force_checksrc = CHECK   $<
123          cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
124  else
125      quiet_cmd_checksrc     = CHECK   $<
126            cmd_checksrc     = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
127  endif
128endif
129
130# Do section mismatch analysis for each module/built-in.o
131ifdef CONFIG_DEBUG_SECTION_MISMATCH
132  cmd_secanalysis = ; scripts/mod/modpost $@
133endif
134
135# Compile C sources (.c)
136# ---------------------------------------------------------------------------
137
138# Default is built-in, unless we know otherwise
139modkern_cflags =                                          \
140	$(if $(part-of-module),                           \
141		$(KBUILD_CFLAGS_MODULE) $(CFLAGS_MODULE), \
142		$(KBUILD_CFLAGS_KERNEL) $(CFLAGS_KERNEL))
143quiet_modtag := $(empty)   $(empty)
144
145$(real-objs-m)        : part-of-module := y
146$(real-objs-m:.o=.i)  : part-of-module := y
147$(real-objs-m:.o=.s)  : part-of-module := y
148$(real-objs-m:.o=.lst): part-of-module := y
149
150$(real-objs-m)        : quiet_modtag := [M]
151$(real-objs-m:.o=.i)  : quiet_modtag := [M]
152$(real-objs-m:.o=.s)  : quiet_modtag := [M]
153$(real-objs-m:.o=.lst): quiet_modtag := [M]
154
155$(obj-m)              : quiet_modtag := [M]
156
157# Default for not multi-part modules
158modname = $(basetarget)
159
160$(multi-objs-m)         : modname = $(modname-multi)
161$(multi-objs-m:.o=.i)   : modname = $(modname-multi)
162$(multi-objs-m:.o=.s)   : modname = $(modname-multi)
163$(multi-objs-m:.o=.lst) : modname = $(modname-multi)
164$(multi-objs-y)         : modname = $(modname-multi)
165$(multi-objs-y:.o=.i)   : modname = $(modname-multi)
166$(multi-objs-y:.o=.s)   : modname = $(modname-multi)
167$(multi-objs-y:.o=.lst) : modname = $(modname-multi)
168
169quiet_cmd_cc_s_c = CC $(quiet_modtag)  $@
170cmd_cc_s_c       = $(CC) $(c_flags) $(DISABLE_LTO) -fverbose-asm -S -o $@ $<
171
172$(obj)/%.s: $(src)/%.c FORCE
173	$(call if_changed_dep,cc_s_c)
174
175quiet_cmd_cc_i_c = CPP $(quiet_modtag) $@
176cmd_cc_i_c       = $(CPP) $(c_flags)   -o $@ $<
177
178$(obj)/%.i: $(src)/%.c FORCE
179	$(call if_changed_dep,cc_i_c)
180
181cmd_gensymtypes =                                                           \
182    $(CPP) -D__GENKSYMS__ $(c_flags) $< |                                   \
183    $(GENKSYMS) $(if $(1), -T $(2))                                         \
184     $(patsubst y,-s _,$(CONFIG_HAVE_UNDERSCORE_SYMBOL_PREFIX))             \
185     $(if $(KBUILD_PRESERVE),-p)                                            \
186     -r $(firstword $(wildcard $(2:.symtypes=.symref) /dev/null))
187
188quiet_cmd_cc_symtypes_c = SYM $(quiet_modtag) $@
189cmd_cc_symtypes_c =                                                         \
190    set -e;                                                                 \
191    $(call cmd_gensymtypes,true,$@) >/dev/null;                             \
192    test -s $@ || rm -f $@
193
194$(obj)/%.symtypes : $(src)/%.c FORCE
195	$(call cmd,cc_symtypes_c)
196
197# C (.c) files
198# The C file is compiled and updated dependency information is generated.
199# (See cmd_cc_o_c + relevant part of rule_cc_o_c)
200
201quiet_cmd_cc_o_c = CC $(quiet_modtag)  $@
202
203ifndef CONFIG_MODVERSIONS
204cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<
205
206else
207# When module versioning is enabled the following steps are executed:
208# o compile a .tmp_<file>.o from <file>.c
209# o if .tmp_<file>.o doesn't contain a __ksymtab version, i.e. does
210#   not export symbols, we just rename .tmp_<file>.o to <file>.o and
211#   are done.
212# o otherwise, we calculate symbol versions using the good old
213#   genksyms on the preprocessed source and postprocess them in a way
214#   that they are usable as a linker script
215# o generate <file>.o from .tmp_<file>.o using the linker to
216#   replace the unresolved symbols __crc_exported_symbol with
217#   the actual value of the checksum generated by genksyms
218
219cmd_cc_o_c = $(CC) $(c_flags) -c -o $(@D)/.tmp_$(@F) $<
220cmd_modversions =								\
221	if $(OBJDUMP) -h $(@D)/.tmp_$(@F) | grep -q __ksymtab; then		\
222		$(call cmd_gensymtypes,$(KBUILD_SYMTYPES),$(@:.o=.symtypes))	\
223		    > $(@D)/.tmp_$(@F:.o=.ver);					\
224										\
225		$(LD) $(LDFLAGS) -r -o $@ $(@D)/.tmp_$(@F) 			\
226			-T $(@D)/.tmp_$(@F:.o=.ver);				\
227		rm -f $(@D)/.tmp_$(@F) $(@D)/.tmp_$(@F:.o=.ver);		\
228	else									\
229		mv -f $(@D)/.tmp_$(@F) $@;					\
230	fi;
231endif
232
233ifdef CONFIG_FTRACE_MCOUNT_RECORD
234ifdef BUILD_C_RECORDMCOUNT
235ifeq ("$(origin RECORDMCOUNT_WARN)", "command line")
236  RECORDMCOUNT_FLAGS = -w
237endif
238# Due to recursion, we must skip empty.o.
239# The empty.o file is created in the make process in order to determine
240#  the target endianness and word size. It is made before all other C
241#  files, including recordmcount.
242sub_cmd_record_mcount =					\
243	if [ $(@) != "scripts/mod/empty.o" ]; then	\
244		$(objtree)/scripts/recordmcount $(RECORDMCOUNT_FLAGS) "$(@)";	\
245	fi;
246recordmcount_source := $(srctree)/scripts/recordmcount.c \
247		    $(srctree)/scripts/recordmcount.h
248else
249sub_cmd_record_mcount = set -e ; perl $(srctree)/scripts/recordmcount.pl "$(ARCH)" \
250	"$(if $(CONFIG_CPU_BIG_ENDIAN),big,little)" \
251	"$(if $(CONFIG_64BIT),64,32)" \
252	"$(OBJDUMP)" "$(OBJCOPY)" "$(CC) $(KBUILD_CFLAGS)" \
253	"$(LD)" "$(NM)" "$(RM)" "$(MV)" \
254	"$(if $(part-of-module),1,0)" "$(@)";
255recordmcount_source := $(srctree)/scripts/recordmcount.pl
256endif
257cmd_record_mcount =						\
258	if [ "$(findstring $(CC_FLAGS_FTRACE),$(_c_flags))" =	\
259	     "$(CC_FLAGS_FTRACE)" ]; then			\
260		$(sub_cmd_record_mcount)			\
261	fi;
262endif
263
264define rule_cc_o_c
265	$(call echo-cmd,checksrc) $(cmd_checksrc)			  \
266	$(call echo-cmd,cc_o_c) $(cmd_cc_o_c);				  \
267	$(cmd_modversions)						  \
268	$(call echo-cmd,record_mcount)					  \
269	$(cmd_record_mcount)						  \
270	scripts/basic/fixdep $(depfile) $@ '$(call make-cmd,cc_o_c)' >    \
271	                                              $(dot-target).tmp;  \
272	rm -f $(depfile);						  \
273	mv -f $(dot-target).tmp $(dot-target).cmd
274endef
275
276# Built-in and composite module parts
277$(obj)/%.o: $(src)/%.c $(recordmcount_source) FORCE
278	$(call cmd,force_checksrc)
279	$(call if_changed_rule,cc_o_c)
280
281# Single-part modules are special since we need to mark them in $(MODVERDIR)
282
283$(single-used-m): $(obj)/%.o: $(src)/%.c $(recordmcount_source) FORCE
284	$(call cmd,force_checksrc)
285	$(call if_changed_rule,cc_o_c)
286	@{ echo $(@:.o=.ko); echo $@; } > $(MODVERDIR)/$(@F:.o=.mod)
287
288quiet_cmd_cc_lst_c = MKLST   $@
289      cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \
290		     $(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \
291				     System.map $(OBJDUMP) > $@
292
293$(obj)/%.lst: $(src)/%.c FORCE
294	$(call if_changed_dep,cc_lst_c)
295
296# Compile assembler sources (.S)
297# ---------------------------------------------------------------------------
298
299modkern_aflags := $(KBUILD_AFLAGS_KERNEL) $(AFLAGS_KERNEL)
300
301$(real-objs-m)      : modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)
302$(real-objs-m:.o=.s): modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)
303
304quiet_cmd_as_s_S = CPP $(quiet_modtag) $@
305cmd_as_s_S       = $(CPP) $(a_flags)   -o $@ $<
306
307$(obj)/%.s: $(src)/%.S FORCE
308	$(call if_changed_dep,as_s_S)
309
310quiet_cmd_as_o_S = AS $(quiet_modtag)  $@
311cmd_as_o_S       = $(CC) $(a_flags) -c -o $@ $<
312
313$(obj)/%.o: $(src)/%.S FORCE
314	$(call if_changed_dep,as_o_S)
315
316targets += $(real-objs-y) $(real-objs-m) $(lib-y)
317targets += $(extra-y) $(MAKECMDGOALS) $(always)
318
319# Linker scripts preprocessor (.lds.S -> .lds)
320# ---------------------------------------------------------------------------
321quiet_cmd_cpp_lds_S = LDS     $@
322      cmd_cpp_lds_S = $(CPP) $(cpp_flags) -P -C -U$(ARCH) \
323	                     -D__ASSEMBLY__ -DLINKER_SCRIPT -o $@ $<
324
325$(obj)/%.lds: $(src)/%.lds.S FORCE
326	$(call if_changed_dep,cpp_lds_S)
327
328# ASN.1 grammar
329# ---------------------------------------------------------------------------
330quiet_cmd_asn1_compiler = ASN.1   $@
331      cmd_asn1_compiler = $(objtree)/scripts/asn1_compiler $< \
332				$(subst .h,.c,$@) $(subst .c,.h,$@)
333
334.PRECIOUS: $(objtree)/$(obj)/%-asn1.c $(objtree)/$(obj)/%-asn1.h
335
336$(obj)/%-asn1.c $(obj)/%-asn1.h: $(src)/%.asn1 $(objtree)/scripts/asn1_compiler
337	$(call cmd,asn1_compiler)
338
339# Build the compiled-in targets
340# ---------------------------------------------------------------------------
341
342# To build objects in subdirs, we need to descend into the directories
343$(sort $(subdir-obj-y)): $(subdir-ym) ;
344
345#
346# Rule to compile a set of .o files into one .o file
347#
348ifdef builtin-target
349quiet_cmd_link_o_target = LD      $@
350# If the list of objects to link is empty, just create an empty built-in.o
351cmd_link_o_target = $(if $(strip $(obj-y)),\
352		      $(LD) $(ld_flags) -r -o $@ $(filter $(obj-y), $^) \
353		      $(cmd_secanalysis),\
354		      rm -f $@; $(AR) rcs$(KBUILD_ARFLAGS) $@)
355
356$(builtin-target): $(obj-y) FORCE
357	$(call if_changed,link_o_target)
358
359targets += $(builtin-target)
360endif # builtin-target
361
362#
363# Rule to create modules.order file
364#
365# Create commands to either record .ko file or cat modules.order from
366# a subdirectory
367modorder-cmds =						\
368	$(foreach m, $(modorder),			\
369		$(if $(filter %/modules.order, $m),	\
370			cat $m;, echo kernel/$m;))
371
372$(modorder-target): $(subdir-ym) FORCE
373	$(Q)(cat /dev/null; $(modorder-cmds)) > $@
374
375#
376# Rule to compile a set of .o files into one .a file
377#
378ifdef lib-target
379quiet_cmd_link_l_target = AR      $@
380cmd_link_l_target = rm -f $@; $(AR) rcs$(KBUILD_ARFLAGS) $@ $(lib-y)
381
382$(lib-target): $(lib-y) FORCE
383	$(call if_changed,link_l_target)
384
385targets += $(lib-target)
386endif
387
388#
389# Rule to link composite objects
390#
391#  Composite objects are specified in kbuild makefile as follows:
392#    <composite-object>-objs := <list of .o files>
393#  or
394#    <composite-object>-y    := <list of .o files>
395link_multi_deps =                     \
396$(filter $(addprefix $(obj)/,         \
397$($(subst $(obj)/,,$(@:.o=-objs)))    \
398$($(subst $(obj)/,,$(@:.o=-y)))), $^)
399
400quiet_cmd_link_multi-y = LD      $@
401cmd_link_multi-y = $(LD) $(ld_flags) -r -o $@ $(link_multi_deps) $(cmd_secanalysis)
402
403quiet_cmd_link_multi-m = LD [M]  $@
404cmd_link_multi-m = $(cmd_link_multi-y)
405
406$(multi-used-y): FORCE
407	$(call if_changed,link_multi-y)
408$(call multi_depend, $(multi-used-y), .o, -objs -y)
409
410$(multi-used-m): FORCE
411	$(call if_changed,link_multi-m)
412	@{ echo $(@:.o=.ko); echo $(link_multi_deps); } > $(MODVERDIR)/$(@F:.o=.mod)
413$(call multi_depend, $(multi-used-m), .o, -objs -y)
414
415targets += $(multi-used-y) $(multi-used-m)
416
417
418# Add intermediate targets:
419# When building objects with specific suffix patterns, add intermediate
420# targets that the final targets are derived from.
421intermediate_targets = $(foreach sfx, $(2), \
422				$(patsubst %$(strip $(1)),%$(sfx), \
423					$(filter %$(strip $(1)), $(targets))))
424# %.lex.o <- %.lex.c <- %.l
425# %.tab.o <- %.tab.[ch] <- %.y
426targets += $(call intermediate_targets, .lex.o, .lex.c) \
427	   $(call intermediate_targets, .tab.o, .tab.c .tab.h)
428
429# Descending
430# ---------------------------------------------------------------------------
431
432PHONY += $(subdir-ym)
433$(subdir-ym):
434	$(Q)$(MAKE) $(build)=$@
435
436# Add FORCE to the prequisites of a target to force it to be always rebuilt.
437# ---------------------------------------------------------------------------
438
439PHONY += FORCE
440
441FORCE:
442
443# Read all saved command lines and dependencies for the $(targets) we
444# may be building above, using $(if_changed{,_dep}). As an
445# optimization, we don't need to read them if the target does not
446# exist, we will rebuild anyway in that case.
447
448targets := $(wildcard $(sort $(targets)))
449cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd))
450
451ifneq ($(cmd_files),)
452  include $(cmd_files)
453endif
454
455# Declare the contents of the .PHONY variable as phony.  We keep that
456# information in a variable se we can use it in if_changed and friends.
457
458.PHONY: $(PHONY)
459