xref: /openbmc/u-boot/scripts/Makefile.build (revision 0c331ebc) 
1# ==========================================================================
2# Building
3# ==========================================================================
4
5# Modified for U-Boot
6prefix := tpl
7src := $(patsubst $(prefix)/%,%,$(obj))
8ifeq ($(obj),$(src))
9prefix := spl
10src := $(patsubst $(prefix)/%,%,$(obj))
11ifeq ($(obj),$(src))
12prefix := .
13endif
14endif
15
16PHONY := __build
17__build:
18
19# Init all relevant variables used in kbuild files so
20# 1) they have correct type
21# 2) they do not inherit any value from the environment
22obj-y :=
23obj-m :=
24lib-y :=
25lib-m :=
26always :=
27targets :=
28subdir-y :=
29subdir-m :=
30EXTRA_AFLAGS   :=
31EXTRA_CFLAGS   :=
32EXTRA_CPPFLAGS :=
33EXTRA_LDFLAGS  :=
34asflags-y  :=
35ccflags-y  :=
36cppflags-y :=
37ldflags-y  :=
38
39subdir-asflags-y :=
40subdir-ccflags-y :=
41
42# Read auto.conf if it exists, otherwise ignore
43# Modified for U-Boot
44-include $(prefix)/include/config/auto.conf
45-include $(prefix)/include/autoconf.mk
46
47include scripts/Kbuild.include
48
49# For backward compatibility check that these variables do not change
50save-cflags := $(CFLAGS)
51
52# The filename Kbuild has precedence over Makefile
53kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
54kbuild-file := $(if $(wildcard $(kbuild-dir)/Kbuild),$(kbuild-dir)/Kbuild,$(kbuild-dir)/Makefile)
55include $(kbuild-file)
56
57# Added for U-Boot
58asflags-y  += $(PLATFORM_CPPFLAGS)
59ccflags-y  += $(PLATFORM_CPPFLAGS)
60cppflags-y += $(PLATFORM_CPPFLAGS)
61
62# If the save-* variables changed error out
63ifeq ($(KBUILD_NOPEDANTIC),)
64        ifneq ("$(save-cflags)","$(CFLAGS)")
65                $(error CFLAGS was changed in "$(kbuild-file)". Fix it to use ccflags-y)
66        endif
67endif
68
69include scripts/Makefile.lib
70
71ifdef host-progs
72ifneq ($(hostprogs-y),$(host-progs))
73$(warning kbuild: $(obj)/Makefile - Usage of host-progs is deprecated. Please replace with hostprogs-y!)
74hostprogs-y += $(host-progs)
75endif
76endif
77
78# Do not include host rules unless needed
79ifneq ($(hostprogs-y)$(hostprogs-m),)
80include scripts/Makefile.host
81endif
82
83# Uncommented for U-Boot
84#  We need to create output dicrectory for SPL and TPL even for in-tree build
85#ifneq ($(KBUILD_SRC),)
86# Create output directory if not already present
87_dummy := $(shell [ -d $(obj) ] || mkdir -p $(obj))
88
89# Create directories for object files if directory does not exist
90# Needed when obj-y := dir/file.o syntax is used
91_dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] || mkdir -p $(d)))
92#endif
93
94ifndef obj
95$(warning kbuild: Makefile.build is included improperly)
96endif
97
98# ===========================================================================
99
100ifneq ($(strip $(lib-y) $(lib-m) $(lib-)),)
101lib-target := $(obj)/lib.a
102endif
103
104ifneq ($(strip $(obj-y) $(obj-m) $(obj-) $(subdir-m) $(lib-target)),)
105builtin-target := $(obj)/built-in.o
106endif
107
108modorder-target := $(obj)/modules.order
109
110# We keep a list of all modules in $(MODVERDIR)
111
112__build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \
113	 $(if $(KBUILD_MODULES),$(obj-m) $(modorder-target)) \
114	 $(subdir-ym) $(always)
115	@:
116
117# Linus' kernel sanity checking tool
118ifneq ($(KBUILD_CHECKSRC),0)
119  ifeq ($(KBUILD_CHECKSRC),2)
120    quiet_cmd_force_checksrc = CHECK   $<
121          cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
122  else
123      quiet_cmd_checksrc     = CHECK   $<
124            cmd_checksrc     = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
125  endif
126endif
127
128# Do section mismatch analysis for each module/built-in.o
129ifdef CONFIG_DEBUG_SECTION_MISMATCH
130  cmd_secanalysis = ; scripts/mod/modpost $@
131endif
132
133# Compile C sources (.c)
134# ---------------------------------------------------------------------------
135
136# Default is built-in, unless we know otherwise
137modkern_cflags =                                          \
138	$(if $(part-of-module),                           \
139		$(KBUILD_CFLAGS_MODULE) $(CFLAGS_MODULE), \
140		$(KBUILD_CFLAGS_KERNEL) $(CFLAGS_KERNEL))
141quiet_modtag := $(empty)   $(empty)
142
143$(real-objs-m)        : part-of-module := y
144$(real-objs-m:.o=.i)  : part-of-module := y
145$(real-objs-m:.o=.s)  : part-of-module := y
146$(real-objs-m:.o=.lst): part-of-module := y
147
148$(real-objs-m)        : quiet_modtag := [M]
149$(real-objs-m:.o=.i)  : quiet_modtag := [M]
150$(real-objs-m:.o=.s)  : quiet_modtag := [M]
151$(real-objs-m:.o=.lst): quiet_modtag := [M]
152
153$(obj-m)              : quiet_modtag := [M]
154
155# Default for not multi-part modules
156modname = $(basetarget)
157
158$(multi-objs-m)         : modname = $(modname-multi)
159$(multi-objs-m:.o=.i)   : modname = $(modname-multi)
160$(multi-objs-m:.o=.s)   : modname = $(modname-multi)
161$(multi-objs-m:.o=.lst) : modname = $(modname-multi)
162$(multi-objs-y)         : modname = $(modname-multi)
163$(multi-objs-y:.o=.i)   : modname = $(modname-multi)
164$(multi-objs-y:.o=.s)   : modname = $(modname-multi)
165$(multi-objs-y:.o=.lst) : modname = $(modname-multi)
166
167quiet_cmd_cc_s_c = CC $(quiet_modtag)  $@
168cmd_cc_s_c       = $(CC) $(c_flags) $(DISABLE_LTO) -fverbose-asm -S -o $@ $<
169
170$(obj)/%.s: $(src)/%.c FORCE
171	$(call if_changed_dep,cc_s_c)
172
173quiet_cmd_cc_i_c = CPP $(quiet_modtag) $@
174cmd_cc_i_c       = $(CPP) $(c_flags)   -o $@ $<
175
176$(obj)/%.i: $(src)/%.c FORCE
177	$(call if_changed_dep,cc_i_c)
178
179cmd_gensymtypes =                                                           \
180    $(CPP) -D__GENKSYMS__ $(c_flags) $< |                                   \
181    $(GENKSYMS) $(if $(1), -T $(2))                                         \
182     $(patsubst y,-s _,$(CONFIG_HAVE_UNDERSCORE_SYMBOL_PREFIX))             \
183     $(if $(KBUILD_PRESERVE),-p)                                            \
184     -r $(firstword $(wildcard $(2:.symtypes=.symref) /dev/null))
185
186quiet_cmd_cc_symtypes_c = SYM $(quiet_modtag) $@
187cmd_cc_symtypes_c =                                                         \
188    set -e;                                                                 \
189    $(call cmd_gensymtypes,true,$@) >/dev/null;                             \
190    test -s $@ || rm -f $@
191
192$(obj)/%.symtypes : $(src)/%.c FORCE
193	$(call cmd,cc_symtypes_c)
194
195# C (.c) files
196# The C file is compiled and updated dependency information is generated.
197# (See cmd_cc_o_c + relevant part of rule_cc_o_c)
198
199quiet_cmd_cc_o_c = CC $(quiet_modtag)  $@
200
201ifndef CONFIG_MODVERSIONS
202cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<
203
204else
205# When module versioning is enabled the following steps are executed:
206# o compile a .tmp_<file>.o from <file>.c
207# o if .tmp_<file>.o doesn't contain a __ksymtab version, i.e. does
208#   not export symbols, we just rename .tmp_<file>.o to <file>.o and
209#   are done.
210# o otherwise, we calculate symbol versions using the good old
211#   genksyms on the preprocessed source and postprocess them in a way
212#   that they are usable as a linker script
213# o generate <file>.o from .tmp_<file>.o using the linker to
214#   replace the unresolved symbols __crc_exported_symbol with
215#   the actual value of the checksum generated by genksyms
216
217cmd_cc_o_c = $(CC) $(c_flags) -c -o $(@D)/.tmp_$(@F) $<
218cmd_modversions =								\
219	if $(OBJDUMP) -h $(@D)/.tmp_$(@F) | grep -q __ksymtab; then		\
220		$(call cmd_gensymtypes,$(KBUILD_SYMTYPES),$(@:.o=.symtypes))	\
221		    > $(@D)/.tmp_$(@F:.o=.ver);					\
222										\
223		$(LD) $(LDFLAGS) -r -o $@ $(@D)/.tmp_$(@F) 			\
224			-T $(@D)/.tmp_$(@F:.o=.ver);				\
225		rm -f $(@D)/.tmp_$(@F) $(@D)/.tmp_$(@F:.o=.ver);		\
226	else									\
227		mv -f $(@D)/.tmp_$(@F) $@;					\
228	fi;
229endif
230
231ifdef CONFIG_FTRACE_MCOUNT_RECORD
232ifdef BUILD_C_RECORDMCOUNT
233ifeq ("$(origin RECORDMCOUNT_WARN)", "command line")
234  RECORDMCOUNT_FLAGS = -w
235endif
236# Due to recursion, we must skip empty.o.
237# The empty.o file is created in the make process in order to determine
238#  the target endianness and word size. It is made before all other C
239#  files, including recordmcount.
240sub_cmd_record_mcount =					\
241	if [ $(@) != "scripts/mod/empty.o" ]; then	\
242		$(objtree)/scripts/recordmcount $(RECORDMCOUNT_FLAGS) "$(@)";	\
243	fi;
244recordmcount_source := $(srctree)/scripts/recordmcount.c \
245		    $(srctree)/scripts/recordmcount.h
246else
247sub_cmd_record_mcount = set -e ; perl $(srctree)/scripts/recordmcount.pl "$(ARCH)" \
248	"$(if $(CONFIG_CPU_BIG_ENDIAN),big,little)" \
249	"$(if $(CONFIG_64BIT),64,32)" \
250	"$(OBJDUMP)" "$(OBJCOPY)" "$(CC) $(KBUILD_CFLAGS)" \
251	"$(LD)" "$(NM)" "$(RM)" "$(MV)" \
252	"$(if $(part-of-module),1,0)" "$(@)";
253recordmcount_source := $(srctree)/scripts/recordmcount.pl
254endif
255cmd_record_mcount = 						\
256	if [ "$(findstring -pg,$(_c_flags))" = "-pg" ]; then	\
257		$(sub_cmd_record_mcount)			\
258	fi;
259endif
260
261define rule_cc_o_c
262	$(call echo-cmd,checksrc) $(cmd_checksrc)			  \
263	$(call echo-cmd,cc_o_c) $(cmd_cc_o_c);				  \
264	$(cmd_modversions)						  \
265	$(call echo-cmd,record_mcount)					  \
266	$(cmd_record_mcount)						  \
267	scripts/basic/fixdep $(depfile) $@ '$(call make-cmd,cc_o_c)' >    \
268	                                              $(dot-target).tmp;  \
269	rm -f $(depfile);						  \
270	mv -f $(dot-target).tmp $(dot-target).cmd
271endef
272
273# Built-in and composite module parts
274$(obj)/%.o: $(src)/%.c $(recordmcount_source) FORCE
275	$(call cmd,force_checksrc)
276	$(call if_changed_rule,cc_o_c)
277
278# Single-part modules are special since we need to mark them in $(MODVERDIR)
279
280$(single-used-m): $(obj)/%.o: $(src)/%.c $(recordmcount_source) FORCE
281	$(call cmd,force_checksrc)
282	$(call if_changed_rule,cc_o_c)
283	@{ echo $(@:.o=.ko); echo $@; } > $(MODVERDIR)/$(@F:.o=.mod)
284
285quiet_cmd_cc_lst_c = MKLST   $@
286      cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \
287		     $(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \
288				     System.map $(OBJDUMP) > $@
289
290$(obj)/%.lst: $(src)/%.c FORCE
291	$(call if_changed_dep,cc_lst_c)
292
293# Compile assembler sources (.S)
294# ---------------------------------------------------------------------------
295
296modkern_aflags := $(KBUILD_AFLAGS_KERNEL) $(AFLAGS_KERNEL)
297
298$(real-objs-m)      : modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)
299$(real-objs-m:.o=.s): modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)
300
301quiet_cmd_as_s_S = CPP $(quiet_modtag) $@
302cmd_as_s_S       = $(CPP) $(a_flags)   -o $@ $<
303
304$(obj)/%.s: $(src)/%.S FORCE
305	$(call if_changed_dep,as_s_S)
306
307quiet_cmd_as_o_S = AS $(quiet_modtag)  $@
308cmd_as_o_S       = $(CC) $(a_flags) -c -o $@ $<
309
310$(obj)/%.o: $(src)/%.S FORCE
311	$(call if_changed_dep,as_o_S)
312
313targets += $(real-objs-y) $(real-objs-m) $(lib-y)
314targets += $(extra-y) $(MAKECMDGOALS) $(always)
315
316# Linker scripts preprocessor (.lds.S -> .lds)
317# ---------------------------------------------------------------------------
318quiet_cmd_cpp_lds_S = LDS     $@
319      cmd_cpp_lds_S = $(CPP) $(cpp_flags) -P -C -U$(ARCH) \
320	                     -D__ASSEMBLY__ -DLINKER_SCRIPT -o $@ $<
321
322$(obj)/%.lds: $(src)/%.lds.S FORCE
323	$(call if_changed_dep,cpp_lds_S)
324
325# ASN.1 grammar
326# ---------------------------------------------------------------------------
327quiet_cmd_asn1_compiler = ASN.1   $@
328      cmd_asn1_compiler = $(objtree)/scripts/asn1_compiler $< \
329				$(subst .h,.c,$@) $(subst .c,.h,$@)
330
331.PRECIOUS: $(objtree)/$(obj)/%-asn1.c $(objtree)/$(obj)/%-asn1.h
332
333$(obj)/%-asn1.c $(obj)/%-asn1.h: $(src)/%.asn1 $(objtree)/scripts/asn1_compiler
334	$(call cmd,asn1_compiler)
335
336# Build the compiled-in targets
337# ---------------------------------------------------------------------------
338
339# To build objects in subdirs, we need to descend into the directories
340$(sort $(subdir-obj-y)): $(subdir-ym) ;
341
342#
343# Rule to compile a set of .o files into one .o file
344#
345ifdef builtin-target
346quiet_cmd_link_o_target = LD      $@
347# If the list of objects to link is empty, just create an empty built-in.o
348cmd_link_o_target = $(if $(strip $(obj-y)),\
349		      $(LD) $(ld_flags) -r -o $@ $(filter $(obj-y), $^) \
350		      $(cmd_secanalysis),\
351		      rm -f $@; $(AR) rcs$(KBUILD_ARFLAGS) $@)
352
353$(builtin-target): $(obj-y) FORCE
354	$(call if_changed,link_o_target)
355
356targets += $(builtin-target)
357endif # builtin-target
358
359#
360# Rule to create modules.order file
361#
362# Create commands to either record .ko file or cat modules.order from
363# a subdirectory
364modorder-cmds =						\
365	$(foreach m, $(modorder),			\
366		$(if $(filter %/modules.order, $m),	\
367			cat $m;, echo kernel/$m;))
368
369$(modorder-target): $(subdir-ym) FORCE
370	$(Q)(cat /dev/null; $(modorder-cmds)) > $@
371
372#
373# Rule to compile a set of .o files into one .a file
374#
375ifdef lib-target
376quiet_cmd_link_l_target = AR      $@
377cmd_link_l_target = rm -f $@; $(AR) rcs$(KBUILD_ARFLAGS) $@ $(lib-y)
378
379$(lib-target): $(lib-y) FORCE
380	$(call if_changed,link_l_target)
381
382targets += $(lib-target)
383endif
384
385#
386# Rule to link composite objects
387#
388#  Composite objects are specified in kbuild makefile as follows:
389#    <composite-object>-objs := <list of .o files>
390#  or
391#    <composite-object>-y    := <list of .o files>
392link_multi_deps =                     \
393$(filter $(addprefix $(obj)/,         \
394$($(subst $(obj)/,,$(@:.o=-objs)))    \
395$($(subst $(obj)/,,$(@:.o=-y)))), $^)
396
397quiet_cmd_link_multi-y = LD      $@
398cmd_link_multi-y = $(LD) $(ld_flags) -r -o $@ $(link_multi_deps) $(cmd_secanalysis)
399
400quiet_cmd_link_multi-m = LD [M]  $@
401cmd_link_multi-m = $(cmd_link_multi-y)
402
403$(multi-used-y): FORCE
404	$(call if_changed,link_multi-y)
405$(call multi_depend, $(multi-used-y), .o, -objs -y)
406
407$(multi-used-m): FORCE
408	$(call if_changed,link_multi-m)
409	@{ echo $(@:.o=.ko); echo $(link_multi_deps); } > $(MODVERDIR)/$(@F:.o=.mod)
410$(call multi_depend, $(multi-used-m), .o, -objs -y)
411
412targets += $(multi-used-y) $(multi-used-m)
413
414
415# Descending
416# ---------------------------------------------------------------------------
417
418PHONY += $(subdir-ym)
419$(subdir-ym):
420	$(Q)$(MAKE) $(build)=$@
421
422# Add FORCE to the prequisites of a target to force it to be always rebuilt.
423# ---------------------------------------------------------------------------
424
425PHONY += FORCE
426
427FORCE:
428
429# Read all saved command lines and dependencies for the $(targets) we
430# may be building above, using $(if_changed{,_dep}). As an
431# optimization, we don't need to read them if the target does not
432# exist, we will rebuild anyway in that case.
433
434targets := $(wildcard $(sort $(targets)))
435cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd))
436
437ifneq ($(cmd_files),)
438  include $(cmd_files)
439endif
440
441# Declare the contents of the .PHONY variable as phony.  We keep that
442# information in a variable se we can use it in if_changed and friends.
443
444.PHONY: $(PHONY)
445