1a47a12beSStefan Roese /* 2a47a12beSStefan Roese * (C) Copyright 2002 3a47a12beSStefan Roese * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 4a47a12beSStefan Roese * 5a47a12beSStefan Roese * See file CREDITS for list of people who contributed to this 6a47a12beSStefan Roese * project. 7a47a12beSStefan Roese * 8a47a12beSStefan Roese * This program is free software; you can redistribute it and/or 9a47a12beSStefan Roese * modify it under the terms of the GNU General Public License as 10a47a12beSStefan Roese * published by the Free Software Foundation; either version 2 of 11a47a12beSStefan Roese * the License, or (at your option) any later version. 12a47a12beSStefan Roese * 13a47a12beSStefan Roese * This program is distributed in the hope that it will be useful, 14a47a12beSStefan Roese * but WITHOUT ANY WARRANTY; without even the implied warranty of 15a47a12beSStefan Roese * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16a47a12beSStefan Roese * GNU General Public License for more details. 17a47a12beSStefan Roese * 18a47a12beSStefan Roese * You should have received a copy of the GNU General Public License 19a47a12beSStefan Roese * along with this program; if not, write to the Free Software 20a47a12beSStefan Roese * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 21a47a12beSStefan Roese * MA 02111-1307 USA 22a47a12beSStefan Roese */ 23a47a12beSStefan Roese 24a47a12beSStefan Roese #include <common.h> 25a47a12beSStefan Roese 26a47a12beSStefan Roese /* 27a47a12beSStefan Roese * CPU test 28a47a12beSStefan Roese * Load/store multiple word instructions: lmw, stmw 29a47a12beSStefan Roese * 30a47a12beSStefan Roese * 26 consecutive words are loaded from a source memory buffer 31a47a12beSStefan Roese * into GPRs r6 through r31. After that, 26 consecutive words are stored 32a47a12beSStefan Roese * from the GPRs r6 through r31 into a target memory buffer. The contents 33a47a12beSStefan Roese * of the source and target buffers are then compared. 34a47a12beSStefan Roese */ 35a47a12beSStefan Roese 36a47a12beSStefan Roese #include <post.h> 37a47a12beSStefan Roese #include "cpu_asm.h" 38a47a12beSStefan Roese 39a47a12beSStefan Roese #if CONFIG_POST & CONFIG_SYS_POST_CPU 40a47a12beSStefan Roese 41a47a12beSStefan Roese extern void cpu_post_exec_02(ulong *code, ulong op1, ulong op2); 42a47a12beSStefan Roese 43a47a12beSStefan Roese int cpu_post_test_multi(void) 44a47a12beSStefan Roese { 45a47a12beSStefan Roese int ret = 0; 46a47a12beSStefan Roese unsigned int i; 47a47a12beSStefan Roese int flag = disable_interrupts(); 48a47a12beSStefan Roese 49*a63aec54SWolfgang Denk if (ret == 0) { 50a47a12beSStefan Roese ulong src[26], dst[26]; 51a47a12beSStefan Roese 52*a63aec54SWolfgang Denk ulong code[] = { 53a47a12beSStefan Roese ASM_LMW(5, 3, 0), 54a47a12beSStefan Roese ASM_STMW(5, 4, 0), 55a47a12beSStefan Roese ASM_BLR, 56a47a12beSStefan Roese }; 57a47a12beSStefan Roese 58*a63aec54SWolfgang Denk for (i = 0; i < ARRAY_SIZE(src); ++i) { 59a47a12beSStefan Roese src[i] = i; 60a47a12beSStefan Roese dst[i] = 0; 61a47a12beSStefan Roese } 62a47a12beSStefan Roese 63a47a12beSStefan Roese cpu_post_exec_02(code, (ulong) src, (ulong) dst); 64a47a12beSStefan Roese 65a47a12beSStefan Roese ret = memcmp(src, dst, sizeof(dst)) == 0 ? 0 : -1; 66a47a12beSStefan Roese } 67a47a12beSStefan Roese 68a47a12beSStefan Roese if (ret != 0) 69a47a12beSStefan Roese post_log("Error at multi test !\n"); 70a47a12beSStefan Roese 71a47a12beSStefan Roese if (flag) 72a47a12beSStefan Roese enable_interrupts(); 73a47a12beSStefan Roese 74a47a12beSStefan Roese return ret; 75a47a12beSStefan Roese } 76a47a12beSStefan Roese 77a47a12beSStefan Roese #endif 78