1*83d290c5STom Rini // SPDX-License-Identifier: GPL-2.0+ 2a47a12beSStefan Roese /* 3a47a12beSStefan Roese * (C) Copyright 2002 4a47a12beSStefan Roese * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 5a47a12beSStefan Roese */ 6a47a12beSStefan Roese 7a47a12beSStefan Roese #include <common.h> 8a47a12beSStefan Roese 9a47a12beSStefan Roese /* 10a47a12beSStefan Roese * CPU test 11a47a12beSStefan Roese * Integer compare instructions: cmpwi, cmplwi 12a47a12beSStefan Roese * 13a47a12beSStefan Roese * To verify these instructions the test runs them with 14a47a12beSStefan Roese * different combinations of operands, reads the condition 15a47a12beSStefan Roese * register value and compares it with the expected one. 16a47a12beSStefan Roese * The test contains a pre-built table 17a47a12beSStefan Roese * containing the description of each test case: the instruction, 18a47a12beSStefan Roese * the values of the operands, the condition field to save 19a47a12beSStefan Roese * the result in and the expected result. 20a47a12beSStefan Roese */ 21a47a12beSStefan Roese 22a47a12beSStefan Roese #include <post.h> 23a47a12beSStefan Roese #include "cpu_asm.h" 24a47a12beSStefan Roese 25a47a12beSStefan Roese #if CONFIG_POST & CONFIG_SYS_POST_CPU 26a47a12beSStefan Roese 27a47a12beSStefan Roese extern void cpu_post_exec_11 (ulong *code, ulong *res, ulong op1); 28a47a12beSStefan Roese 29a47a12beSStefan Roese static struct cpu_post_cmpi_s 30a47a12beSStefan Roese { 31a47a12beSStefan Roese ulong cmd; 32a47a12beSStefan Roese ulong op1; 33a47a12beSStefan Roese ushort op2; 34a47a12beSStefan Roese ulong cr; 35a47a12beSStefan Roese ulong res; 36a47a12beSStefan Roese } cpu_post_cmpi_table[] = 37a47a12beSStefan Roese { 38a47a12beSStefan Roese { 39a47a12beSStefan Roese OP_CMPWI, 40a47a12beSStefan Roese 123, 41a47a12beSStefan Roese 123, 42a47a12beSStefan Roese 2, 43a47a12beSStefan Roese 0x02 44a47a12beSStefan Roese }, 45a47a12beSStefan Roese { 46a47a12beSStefan Roese OP_CMPWI, 47a47a12beSStefan Roese 123, 48a47a12beSStefan Roese 133, 49a47a12beSStefan Roese 3, 50a47a12beSStefan Roese 0x08 51a47a12beSStefan Roese }, 52a47a12beSStefan Roese { 53a47a12beSStefan Roese OP_CMPWI, 54a47a12beSStefan Roese 123, 55a47a12beSStefan Roese -133, 56a47a12beSStefan Roese 4, 57a47a12beSStefan Roese 0x04 58a47a12beSStefan Roese }, 59a47a12beSStefan Roese { 60a47a12beSStefan Roese OP_CMPLWI, 61a47a12beSStefan Roese 123, 62a47a12beSStefan Roese 123, 63a47a12beSStefan Roese 2, 64a47a12beSStefan Roese 0x02 65a47a12beSStefan Roese }, 66a47a12beSStefan Roese { 67a47a12beSStefan Roese OP_CMPLWI, 68a47a12beSStefan Roese 123, 69a47a12beSStefan Roese -133, 70a47a12beSStefan Roese 3, 71a47a12beSStefan Roese 0x08 72a47a12beSStefan Roese }, 73a47a12beSStefan Roese { 74a47a12beSStefan Roese OP_CMPLWI, 75a47a12beSStefan Roese 123, 76a47a12beSStefan Roese 113, 77a47a12beSStefan Roese 4, 78a47a12beSStefan Roese 0x04 79a47a12beSStefan Roese }, 80a47a12beSStefan Roese }; 81d2397817SMike Frysinger static unsigned int cpu_post_cmpi_size = ARRAY_SIZE(cpu_post_cmpi_table); 82a47a12beSStefan Roese 83a47a12beSStefan Roese int cpu_post_test_cmpi (void) 84a47a12beSStefan Roese { 85a47a12beSStefan Roese int ret = 0; 86a47a12beSStefan Roese unsigned int i; 87a47a12beSStefan Roese int flag = disable_interrupts(); 88a47a12beSStefan Roese 89a47a12beSStefan Roese for (i = 0; i < cpu_post_cmpi_size && ret == 0; i++) 90a47a12beSStefan Roese { 91a47a12beSStefan Roese struct cpu_post_cmpi_s *test = cpu_post_cmpi_table + i; 92a47a12beSStefan Roese unsigned long code[] = 93a47a12beSStefan Roese { 94a47a12beSStefan Roese ASM_1IC(test->cmd, test->cr, 3, test->op2), 95a47a12beSStefan Roese ASM_MFCR(3), 96a47a12beSStefan Roese ASM_BLR 97a47a12beSStefan Roese }; 98a47a12beSStefan Roese ulong res; 99a47a12beSStefan Roese 100a47a12beSStefan Roese cpu_post_exec_11 (code, & res, test->op1); 101a47a12beSStefan Roese 102a47a12beSStefan Roese ret = ((res >> (28 - 4 * test->cr)) & 0xe) == test->res ? 0 : -1; 103a47a12beSStefan Roese 104a47a12beSStefan Roese if (ret != 0) 105a47a12beSStefan Roese { 106a47a12beSStefan Roese post_log ("Error at cmpi test %d !\n", i); 107a47a12beSStefan Roese } 108a47a12beSStefan Roese } 109a47a12beSStefan Roese 110a47a12beSStefan Roese if (flag) 111a47a12beSStefan Roese enable_interrupts(); 112a47a12beSStefan Roese 113a47a12beSStefan Roese return ret; 114a47a12beSStefan Roese } 115a47a12beSStefan Roese 116a47a12beSStefan Roese #endif 117