1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright (c) 2011 The Chromium OS Authors. 4 */ 5 6 #ifndef USE_HOSTCC 7 #include <common.h> 8 #include <boot_fit.h> 9 #include <dm.h> 10 #include <dm/of_extra.h> 11 #include <errno.h> 12 #include <fdtdec.h> 13 #include <fdt_support.h> 14 #include <mapmem.h> 15 #include <linux/libfdt.h> 16 #include <serial.h> 17 #include <asm/sections.h> 18 #include <linux/ctype.h> 19 #include <linux/lzo.h> 20 21 DECLARE_GLOBAL_DATA_PTR; 22 23 /* 24 * Here are the type we know about. One day we might allow drivers to 25 * register. For now we just put them here. The COMPAT macro allows us to 26 * turn this into a sparse list later, and keeps the ID with the name. 27 * 28 * NOTE: This list is basically a TODO list for things that need to be 29 * converted to driver model. So don't add new things here unless there is a 30 * good reason why driver-model conversion is infeasible. Examples include 31 * things which are used before driver model is available. 32 */ 33 #define COMPAT(id, name) name 34 static const char * const compat_names[COMPAT_COUNT] = { 35 COMPAT(UNKNOWN, "<none>"), 36 COMPAT(NVIDIA_TEGRA20_EMC, "nvidia,tegra20-emc"), 37 COMPAT(NVIDIA_TEGRA20_EMC_TABLE, "nvidia,tegra20-emc-table"), 38 COMPAT(NVIDIA_TEGRA20_NAND, "nvidia,tegra20-nand"), 39 COMPAT(NVIDIA_TEGRA124_XUSB_PADCTL, "nvidia,tegra124-xusb-padctl"), 40 COMPAT(NVIDIA_TEGRA210_XUSB_PADCTL, "nvidia,tegra210-xusb-padctl"), 41 COMPAT(SMSC_LAN9215, "smsc,lan9215"), 42 COMPAT(SAMSUNG_EXYNOS5_SROMC, "samsung,exynos-sromc"), 43 COMPAT(SAMSUNG_EXYNOS_USB_PHY, "samsung,exynos-usb-phy"), 44 COMPAT(SAMSUNG_EXYNOS5_USB3_PHY, "samsung,exynos5250-usb3-phy"), 45 COMPAT(SAMSUNG_EXYNOS_TMU, "samsung,exynos-tmu"), 46 COMPAT(SAMSUNG_EXYNOS_MIPI_DSI, "samsung,exynos-mipi-dsi"), 47 COMPAT(SAMSUNG_EXYNOS_DWMMC, "samsung,exynos-dwmmc"), 48 COMPAT(GENERIC_SPI_FLASH, "spi-flash"), 49 COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"), 50 COMPAT(INTEL_MICROCODE, "intel,microcode"), 51 COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"), 52 COMPAT(ALTERA_SOCFPGA_DWMAC, "altr,socfpga-stmmac"), 53 COMPAT(ALTERA_SOCFPGA_DWMMC, "altr,socfpga-dw-mshc"), 54 COMPAT(ALTERA_SOCFPGA_DWC2USB, "snps,dwc2"), 55 COMPAT(INTEL_BAYTRAIL_FSP, "intel,baytrail-fsp"), 56 COMPAT(INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"), 57 COMPAT(INTEL_IVYBRIDGE_FSP, "intel,ivybridge-fsp"), 58 COMPAT(COMPAT_SUNXI_NAND, "allwinner,sun4i-a10-nand"), 59 COMPAT(ALTERA_SOCFPGA_CLK, "altr,clk-mgr"), 60 COMPAT(ALTERA_SOCFPGA_PINCTRL_SINGLE, "pinctrl-single"), 61 COMPAT(ALTERA_SOCFPGA_H2F_BRG, "altr,socfpga-hps2fpga-bridge"), 62 COMPAT(ALTERA_SOCFPGA_LWH2F_BRG, "altr,socfpga-lwhps2fpga-bridge"), 63 COMPAT(ALTERA_SOCFPGA_F2H_BRG, "altr,socfpga-fpga2hps-bridge"), 64 COMPAT(ALTERA_SOCFPGA_F2SDR0, "altr,socfpga-fpga2sdram0-bridge"), 65 COMPAT(ALTERA_SOCFPGA_F2SDR1, "altr,socfpga-fpga2sdram1-bridge"), 66 COMPAT(ALTERA_SOCFPGA_F2SDR2, "altr,socfpga-fpga2sdram2-bridge"), 67 COMPAT(ALTERA_SOCFPGA_FPGA0, "altr,socfpga-a10-fpga-mgr"), 68 COMPAT(ALTERA_SOCFPGA_NOC, "altr,socfpga-a10-noc"), 69 COMPAT(ALTERA_SOCFPGA_CLK_INIT, "altr,socfpga-a10-clk-init") 70 }; 71 72 const char *fdtdec_get_compatible(enum fdt_compat_id id) 73 { 74 /* We allow reading of the 'unknown' ID for testing purposes */ 75 assert(id >= 0 && id < COMPAT_COUNT); 76 return compat_names[id]; 77 } 78 79 fdt_addr_t fdtdec_get_addr_size_fixed(const void *blob, int node, 80 const char *prop_name, int index, int na, 81 int ns, fdt_size_t *sizep, 82 bool translate) 83 { 84 const fdt32_t *prop, *prop_end; 85 const fdt32_t *prop_addr, *prop_size, *prop_after_size; 86 int len; 87 fdt_addr_t addr; 88 89 debug("%s: %s: ", __func__, prop_name); 90 91 prop = fdt_getprop(blob, node, prop_name, &len); 92 if (!prop) { 93 debug("(not found)\n"); 94 return FDT_ADDR_T_NONE; 95 } 96 prop_end = prop + (len / sizeof(*prop)); 97 98 prop_addr = prop + (index * (na + ns)); 99 prop_size = prop_addr + na; 100 prop_after_size = prop_size + ns; 101 if (prop_after_size > prop_end) { 102 debug("(not enough data: expected >= %d cells, got %d cells)\n", 103 (u32)(prop_after_size - prop), ((u32)(prop_end - prop))); 104 return FDT_ADDR_T_NONE; 105 } 106 107 #if CONFIG_IS_ENABLED(OF_TRANSLATE) 108 if (translate) 109 addr = fdt_translate_address(blob, node, prop_addr); 110 else 111 #endif 112 addr = fdtdec_get_number(prop_addr, na); 113 114 if (sizep) { 115 *sizep = fdtdec_get_number(prop_size, ns); 116 debug("addr=%08llx, size=%llx\n", (unsigned long long)addr, 117 (unsigned long long)*sizep); 118 } else { 119 debug("addr=%08llx\n", (unsigned long long)addr); 120 } 121 122 return addr; 123 } 124 125 fdt_addr_t fdtdec_get_addr_size_auto_parent(const void *blob, int parent, 126 int node, const char *prop_name, 127 int index, fdt_size_t *sizep, 128 bool translate) 129 { 130 int na, ns; 131 132 debug("%s: ", __func__); 133 134 na = fdt_address_cells(blob, parent); 135 if (na < 1) { 136 debug("(bad #address-cells)\n"); 137 return FDT_ADDR_T_NONE; 138 } 139 140 ns = fdt_size_cells(blob, parent); 141 if (ns < 0) { 142 debug("(bad #size-cells)\n"); 143 return FDT_ADDR_T_NONE; 144 } 145 146 debug("na=%d, ns=%d, ", na, ns); 147 148 return fdtdec_get_addr_size_fixed(blob, node, prop_name, index, na, 149 ns, sizep, translate); 150 } 151 152 fdt_addr_t fdtdec_get_addr_size_auto_noparent(const void *blob, int node, 153 const char *prop_name, int index, 154 fdt_size_t *sizep, 155 bool translate) 156 { 157 int parent; 158 159 debug("%s: ", __func__); 160 161 parent = fdt_parent_offset(blob, node); 162 if (parent < 0) { 163 debug("(no parent found)\n"); 164 return FDT_ADDR_T_NONE; 165 } 166 167 return fdtdec_get_addr_size_auto_parent(blob, parent, node, prop_name, 168 index, sizep, translate); 169 } 170 171 fdt_addr_t fdtdec_get_addr_size(const void *blob, int node, 172 const char *prop_name, fdt_size_t *sizep) 173 { 174 int ns = sizep ? (sizeof(fdt_size_t) / sizeof(fdt32_t)) : 0; 175 176 return fdtdec_get_addr_size_fixed(blob, node, prop_name, 0, 177 sizeof(fdt_addr_t) / sizeof(fdt32_t), 178 ns, sizep, false); 179 } 180 181 fdt_addr_t fdtdec_get_addr(const void *blob, int node, const char *prop_name) 182 { 183 return fdtdec_get_addr_size(blob, node, prop_name, NULL); 184 } 185 186 #if CONFIG_IS_ENABLED(PCI) && defined(CONFIG_DM_PCI) 187 int fdtdec_get_pci_addr(const void *blob, int node, enum fdt_pci_space type, 188 const char *prop_name, struct fdt_pci_addr *addr) 189 { 190 const u32 *cell; 191 int len; 192 int ret = -ENOENT; 193 194 debug("%s: %s: ", __func__, prop_name); 195 196 /* 197 * If we follow the pci bus bindings strictly, we should check 198 * the value of the node's parent node's #address-cells and 199 * #size-cells. They need to be 3 and 2 accordingly. However, 200 * for simplicity we skip the check here. 201 */ 202 cell = fdt_getprop(blob, node, prop_name, &len); 203 if (!cell) 204 goto fail; 205 206 if ((len % FDT_PCI_REG_SIZE) == 0) { 207 int num = len / FDT_PCI_REG_SIZE; 208 int i; 209 210 for (i = 0; i < num; i++) { 211 debug("pci address #%d: %08lx %08lx %08lx\n", i, 212 (ulong)fdt32_to_cpu(cell[0]), 213 (ulong)fdt32_to_cpu(cell[1]), 214 (ulong)fdt32_to_cpu(cell[2])); 215 if ((fdt32_to_cpu(*cell) & type) == type) { 216 addr->phys_hi = fdt32_to_cpu(cell[0]); 217 addr->phys_mid = fdt32_to_cpu(cell[1]); 218 addr->phys_lo = fdt32_to_cpu(cell[1]); 219 break; 220 } 221 222 cell += (FDT_PCI_ADDR_CELLS + 223 FDT_PCI_SIZE_CELLS); 224 } 225 226 if (i == num) { 227 ret = -ENXIO; 228 goto fail; 229 } 230 231 return 0; 232 } 233 234 ret = -EINVAL; 235 236 fail: 237 debug("(not found)\n"); 238 return ret; 239 } 240 241 int fdtdec_get_pci_vendev(const void *blob, int node, u16 *vendor, u16 *device) 242 { 243 const char *list, *end; 244 int len; 245 246 list = fdt_getprop(blob, node, "compatible", &len); 247 if (!list) 248 return -ENOENT; 249 250 end = list + len; 251 while (list < end) { 252 len = strlen(list); 253 if (len >= strlen("pciVVVV,DDDD")) { 254 char *s = strstr(list, "pci"); 255 256 /* 257 * check if the string is something like pciVVVV,DDDD.RR 258 * or just pciVVVV,DDDD 259 */ 260 if (s && s[7] == ',' && 261 (s[12] == '.' || s[12] == 0)) { 262 s += 3; 263 *vendor = simple_strtol(s, NULL, 16); 264 265 s += 5; 266 *device = simple_strtol(s, NULL, 16); 267 268 return 0; 269 } 270 } 271 list += (len + 1); 272 } 273 274 return -ENOENT; 275 } 276 277 int fdtdec_get_pci_bar32(struct udevice *dev, struct fdt_pci_addr *addr, 278 u32 *bar) 279 { 280 int barnum; 281 282 /* extract the bar number from fdt_pci_addr */ 283 barnum = addr->phys_hi & 0xff; 284 if (barnum < PCI_BASE_ADDRESS_0 || barnum > PCI_CARDBUS_CIS) 285 return -EINVAL; 286 287 barnum = (barnum - PCI_BASE_ADDRESS_0) / 4; 288 *bar = dm_pci_read_bar32(dev, barnum); 289 290 return 0; 291 } 292 #endif 293 294 uint64_t fdtdec_get_uint64(const void *blob, int node, const char *prop_name, 295 uint64_t default_val) 296 { 297 const uint64_t *cell64; 298 int length; 299 300 cell64 = fdt_getprop(blob, node, prop_name, &length); 301 if (!cell64 || length < sizeof(*cell64)) 302 return default_val; 303 304 return fdt64_to_cpu(*cell64); 305 } 306 307 int fdtdec_get_is_enabled(const void *blob, int node) 308 { 309 const char *cell; 310 311 /* 312 * It should say "okay", so only allow that. Some fdts use "ok" but 313 * this is a bug. Please fix your device tree source file. See here 314 * for discussion: 315 * 316 * http://www.mail-archive.com/u-boot@lists.denx.de/msg71598.html 317 */ 318 cell = fdt_getprop(blob, node, "status", NULL); 319 if (cell) 320 return strcmp(cell, "okay") == 0; 321 return 1; 322 } 323 324 enum fdt_compat_id fdtdec_lookup(const void *blob, int node) 325 { 326 enum fdt_compat_id id; 327 328 /* Search our drivers */ 329 for (id = COMPAT_UNKNOWN; id < COMPAT_COUNT; id++) 330 if (fdt_node_check_compatible(blob, node, 331 compat_names[id]) == 0) 332 return id; 333 return COMPAT_UNKNOWN; 334 } 335 336 int fdtdec_next_compatible(const void *blob, int node, enum fdt_compat_id id) 337 { 338 return fdt_node_offset_by_compatible(blob, node, compat_names[id]); 339 } 340 341 int fdtdec_next_compatible_subnode(const void *blob, int node, 342 enum fdt_compat_id id, int *depthp) 343 { 344 do { 345 node = fdt_next_node(blob, node, depthp); 346 } while (*depthp > 1); 347 348 /* If this is a direct subnode, and compatible, return it */ 349 if (*depthp == 1 && 0 == fdt_node_check_compatible( 350 blob, node, compat_names[id])) 351 return node; 352 353 return -FDT_ERR_NOTFOUND; 354 } 355 356 int fdtdec_next_alias(const void *blob, const char *name, enum fdt_compat_id id, 357 int *upto) 358 { 359 #define MAX_STR_LEN 20 360 char str[MAX_STR_LEN + 20]; 361 int node, err; 362 363 /* snprintf() is not available */ 364 assert(strlen(name) < MAX_STR_LEN); 365 sprintf(str, "%.*s%d", MAX_STR_LEN, name, *upto); 366 node = fdt_path_offset(blob, str); 367 if (node < 0) 368 return node; 369 err = fdt_node_check_compatible(blob, node, compat_names[id]); 370 if (err < 0) 371 return err; 372 if (err) 373 return -FDT_ERR_NOTFOUND; 374 (*upto)++; 375 return node; 376 } 377 378 int fdtdec_find_aliases_for_id(const void *blob, const char *name, 379 enum fdt_compat_id id, int *node_list, 380 int maxcount) 381 { 382 memset(node_list, '\0', sizeof(*node_list) * maxcount); 383 384 return fdtdec_add_aliases_for_id(blob, name, id, node_list, maxcount); 385 } 386 387 /* TODO: Can we tighten this code up a little? */ 388 int fdtdec_add_aliases_for_id(const void *blob, const char *name, 389 enum fdt_compat_id id, int *node_list, 390 int maxcount) 391 { 392 int name_len = strlen(name); 393 int nodes[maxcount]; 394 int num_found = 0; 395 int offset, node; 396 int alias_node; 397 int count; 398 int i, j; 399 400 /* find the alias node if present */ 401 alias_node = fdt_path_offset(blob, "/aliases"); 402 403 /* 404 * start with nothing, and we can assume that the root node can't 405 * match 406 */ 407 memset(nodes, '\0', sizeof(nodes)); 408 409 /* First find all the compatible nodes */ 410 for (node = count = 0; node >= 0 && count < maxcount;) { 411 node = fdtdec_next_compatible(blob, node, id); 412 if (node >= 0) 413 nodes[count++] = node; 414 } 415 if (node >= 0) 416 debug("%s: warning: maxcount exceeded with alias '%s'\n", 417 __func__, name); 418 419 /* Now find all the aliases */ 420 for (offset = fdt_first_property_offset(blob, alias_node); 421 offset > 0; 422 offset = fdt_next_property_offset(blob, offset)) { 423 const struct fdt_property *prop; 424 const char *path; 425 int number; 426 int found; 427 428 node = 0; 429 prop = fdt_get_property_by_offset(blob, offset, NULL); 430 path = fdt_string(blob, fdt32_to_cpu(prop->nameoff)); 431 if (prop->len && 0 == strncmp(path, name, name_len)) 432 node = fdt_path_offset(blob, prop->data); 433 if (node <= 0) 434 continue; 435 436 /* Get the alias number */ 437 number = simple_strtoul(path + name_len, NULL, 10); 438 if (number < 0 || number >= maxcount) { 439 debug("%s: warning: alias '%s' is out of range\n", 440 __func__, path); 441 continue; 442 } 443 444 /* Make sure the node we found is actually in our list! */ 445 found = -1; 446 for (j = 0; j < count; j++) 447 if (nodes[j] == node) { 448 found = j; 449 break; 450 } 451 452 if (found == -1) { 453 debug("%s: warning: alias '%s' points to a node " 454 "'%s' that is missing or is not compatible " 455 " with '%s'\n", __func__, path, 456 fdt_get_name(blob, node, NULL), 457 compat_names[id]); 458 continue; 459 } 460 461 /* 462 * Add this node to our list in the right place, and mark 463 * it as done. 464 */ 465 if (fdtdec_get_is_enabled(blob, node)) { 466 if (node_list[number]) { 467 debug("%s: warning: alias '%s' requires that " 468 "a node be placed in the list in a " 469 "position which is already filled by " 470 "node '%s'\n", __func__, path, 471 fdt_get_name(blob, node, NULL)); 472 continue; 473 } 474 node_list[number] = node; 475 if (number >= num_found) 476 num_found = number + 1; 477 } 478 nodes[found] = 0; 479 } 480 481 /* Add any nodes not mentioned by an alias */ 482 for (i = j = 0; i < maxcount; i++) { 483 if (!node_list[i]) { 484 for (; j < maxcount; j++) 485 if (nodes[j] && 486 fdtdec_get_is_enabled(blob, nodes[j])) 487 break; 488 489 /* Have we run out of nodes to add? */ 490 if (j == maxcount) 491 break; 492 493 assert(!node_list[i]); 494 node_list[i] = nodes[j++]; 495 if (i >= num_found) 496 num_found = i + 1; 497 } 498 } 499 500 return num_found; 501 } 502 503 int fdtdec_get_alias_seq(const void *blob, const char *base, int offset, 504 int *seqp) 505 { 506 int base_len = strlen(base); 507 const char *find_name; 508 int find_namelen; 509 int prop_offset; 510 int aliases; 511 512 find_name = fdt_get_name(blob, offset, &find_namelen); 513 debug("Looking for '%s' at %d, name %s\n", base, offset, find_name); 514 515 aliases = fdt_path_offset(blob, "/aliases"); 516 for (prop_offset = fdt_first_property_offset(blob, aliases); 517 prop_offset > 0; 518 prop_offset = fdt_next_property_offset(blob, prop_offset)) { 519 const char *prop; 520 const char *name; 521 const char *slash; 522 int len, val; 523 524 prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len); 525 debug(" - %s, %s\n", name, prop); 526 if (len < find_namelen || *prop != '/' || prop[len - 1] || 527 strncmp(name, base, base_len)) 528 continue; 529 530 slash = strrchr(prop, '/'); 531 if (strcmp(slash + 1, find_name)) 532 continue; 533 val = trailing_strtol(name); 534 if (val != -1) { 535 *seqp = val; 536 debug("Found seq %d\n", *seqp); 537 return 0; 538 } 539 } 540 541 debug("Not found\n"); 542 return -ENOENT; 543 } 544 545 const char *fdtdec_get_chosen_prop(const void *blob, const char *name) 546 { 547 int chosen_node; 548 549 if (!blob) 550 return NULL; 551 chosen_node = fdt_path_offset(blob, "/chosen"); 552 return fdt_getprop(blob, chosen_node, name, NULL); 553 } 554 555 int fdtdec_get_chosen_node(const void *blob, const char *name) 556 { 557 const char *prop; 558 559 prop = fdtdec_get_chosen_prop(blob, name); 560 if (!prop) 561 return -FDT_ERR_NOTFOUND; 562 return fdt_path_offset(blob, prop); 563 } 564 565 int fdtdec_check_fdt(void) 566 { 567 /* 568 * We must have an FDT, but we cannot panic() yet since the console 569 * is not ready. So for now, just assert(). Boards which need an early 570 * FDT (prior to console ready) will need to make their own 571 * arrangements and do their own checks. 572 */ 573 assert(!fdtdec_prepare_fdt()); 574 return 0; 575 } 576 577 /* 578 * This function is a little odd in that it accesses global data. At some 579 * point if the architecture board.c files merge this will make more sense. 580 * Even now, it is common code. 581 */ 582 int fdtdec_prepare_fdt(void) 583 { 584 if (!gd->fdt_blob || ((uintptr_t)gd->fdt_blob & 3) || 585 fdt_check_header(gd->fdt_blob)) { 586 #ifdef CONFIG_SPL_BUILD 587 puts("Missing DTB\n"); 588 #else 589 puts("No valid device tree binary found - please append one to U-Boot binary, use u-boot-dtb.bin or define CONFIG_OF_EMBED. For sandbox, use -d <file.dtb>\n"); 590 # ifdef DEBUG 591 if (gd->fdt_blob) { 592 printf("fdt_blob=%p\n", gd->fdt_blob); 593 print_buffer((ulong)gd->fdt_blob, gd->fdt_blob, 4, 594 32, 0); 595 } 596 # endif 597 #endif 598 return -1; 599 } 600 return 0; 601 } 602 603 int fdtdec_lookup_phandle(const void *blob, int node, const char *prop_name) 604 { 605 const u32 *phandle; 606 int lookup; 607 608 debug("%s: %s\n", __func__, prop_name); 609 phandle = fdt_getprop(blob, node, prop_name, NULL); 610 if (!phandle) 611 return -FDT_ERR_NOTFOUND; 612 613 lookup = fdt_node_offset_by_phandle(blob, fdt32_to_cpu(*phandle)); 614 return lookup; 615 } 616 617 /** 618 * Look up a property in a node and check that it has a minimum length. 619 * 620 * @param blob FDT blob 621 * @param node node to examine 622 * @param prop_name name of property to find 623 * @param min_len minimum property length in bytes 624 * @param err 0 if ok, or -FDT_ERR_NOTFOUND if the property is not 625 found, or -FDT_ERR_BADLAYOUT if not enough data 626 * @return pointer to cell, which is only valid if err == 0 627 */ 628 static const void *get_prop_check_min_len(const void *blob, int node, 629 const char *prop_name, int min_len, 630 int *err) 631 { 632 const void *cell; 633 int len; 634 635 debug("%s: %s\n", __func__, prop_name); 636 cell = fdt_getprop(blob, node, prop_name, &len); 637 if (!cell) 638 *err = -FDT_ERR_NOTFOUND; 639 else if (len < min_len) 640 *err = -FDT_ERR_BADLAYOUT; 641 else 642 *err = 0; 643 return cell; 644 } 645 646 int fdtdec_get_int_array(const void *blob, int node, const char *prop_name, 647 u32 *array, int count) 648 { 649 const u32 *cell; 650 int err = 0; 651 652 debug("%s: %s\n", __func__, prop_name); 653 cell = get_prop_check_min_len(blob, node, prop_name, 654 sizeof(u32) * count, &err); 655 if (!err) { 656 int i; 657 658 for (i = 0; i < count; i++) 659 array[i] = fdt32_to_cpu(cell[i]); 660 } 661 return err; 662 } 663 664 int fdtdec_get_int_array_count(const void *blob, int node, 665 const char *prop_name, u32 *array, int count) 666 { 667 const u32 *cell; 668 int len, elems; 669 int i; 670 671 debug("%s: %s\n", __func__, prop_name); 672 cell = fdt_getprop(blob, node, prop_name, &len); 673 if (!cell) 674 return -FDT_ERR_NOTFOUND; 675 elems = len / sizeof(u32); 676 if (count > elems) 677 count = elems; 678 for (i = 0; i < count; i++) 679 array[i] = fdt32_to_cpu(cell[i]); 680 681 return count; 682 } 683 684 const u32 *fdtdec_locate_array(const void *blob, int node, 685 const char *prop_name, int count) 686 { 687 const u32 *cell; 688 int err; 689 690 cell = get_prop_check_min_len(blob, node, prop_name, 691 sizeof(u32) * count, &err); 692 return err ? NULL : cell; 693 } 694 695 int fdtdec_get_bool(const void *blob, int node, const char *prop_name) 696 { 697 const s32 *cell; 698 int len; 699 700 debug("%s: %s\n", __func__, prop_name); 701 cell = fdt_getprop(blob, node, prop_name, &len); 702 return cell != NULL; 703 } 704 705 int fdtdec_parse_phandle_with_args(const void *blob, int src_node, 706 const char *list_name, 707 const char *cells_name, 708 int cell_count, int index, 709 struct fdtdec_phandle_args *out_args) 710 { 711 const __be32 *list, *list_end; 712 int rc = 0, size, cur_index = 0; 713 uint32_t count = 0; 714 int node = -1; 715 int phandle; 716 717 /* Retrieve the phandle list property */ 718 list = fdt_getprop(blob, src_node, list_name, &size); 719 if (!list) 720 return -ENOENT; 721 list_end = list + size / sizeof(*list); 722 723 /* Loop over the phandles until all the requested entry is found */ 724 while (list < list_end) { 725 rc = -EINVAL; 726 count = 0; 727 728 /* 729 * If phandle is 0, then it is an empty entry with no 730 * arguments. Skip forward to the next entry. 731 */ 732 phandle = be32_to_cpup(list++); 733 if (phandle) { 734 /* 735 * Find the provider node and parse the #*-cells 736 * property to determine the argument length. 737 * 738 * This is not needed if the cell count is hard-coded 739 * (i.e. cells_name not set, but cell_count is set), 740 * except when we're going to return the found node 741 * below. 742 */ 743 if (cells_name || cur_index == index) { 744 node = fdt_node_offset_by_phandle(blob, 745 phandle); 746 if (!node) { 747 debug("%s: could not find phandle\n", 748 fdt_get_name(blob, src_node, 749 NULL)); 750 goto err; 751 } 752 } 753 754 if (cells_name) { 755 count = fdtdec_get_int(blob, node, cells_name, 756 -1); 757 if (count == -1) { 758 debug("%s: could not get %s for %s\n", 759 fdt_get_name(blob, src_node, 760 NULL), 761 cells_name, 762 fdt_get_name(blob, node, 763 NULL)); 764 goto err; 765 } 766 } else { 767 count = cell_count; 768 } 769 770 /* 771 * Make sure that the arguments actually fit in the 772 * remaining property data length 773 */ 774 if (list + count > list_end) { 775 debug("%s: arguments longer than property\n", 776 fdt_get_name(blob, src_node, NULL)); 777 goto err; 778 } 779 } 780 781 /* 782 * All of the error cases above bail out of the loop, so at 783 * this point, the parsing is successful. If the requested 784 * index matches, then fill the out_args structure and return, 785 * or return -ENOENT for an empty entry. 786 */ 787 rc = -ENOENT; 788 if (cur_index == index) { 789 if (!phandle) 790 goto err; 791 792 if (out_args) { 793 int i; 794 795 if (count > MAX_PHANDLE_ARGS) { 796 debug("%s: too many arguments %d\n", 797 fdt_get_name(blob, src_node, 798 NULL), count); 799 count = MAX_PHANDLE_ARGS; 800 } 801 out_args->node = node; 802 out_args->args_count = count; 803 for (i = 0; i < count; i++) { 804 out_args->args[i] = 805 be32_to_cpup(list++); 806 } 807 } 808 809 /* Found it! return success */ 810 return 0; 811 } 812 813 node = -1; 814 list += count; 815 cur_index++; 816 } 817 818 /* 819 * Result will be one of: 820 * -ENOENT : index is for empty phandle 821 * -EINVAL : parsing error on data 822 * [1..n] : Number of phandle (count mode; when index = -1) 823 */ 824 rc = index < 0 ? cur_index : -ENOENT; 825 err: 826 return rc; 827 } 828 829 int fdtdec_get_child_count(const void *blob, int node) 830 { 831 int subnode; 832 int num = 0; 833 834 fdt_for_each_subnode(subnode, blob, node) 835 num++; 836 837 return num; 838 } 839 840 int fdtdec_get_byte_array(const void *blob, int node, const char *prop_name, 841 u8 *array, int count) 842 { 843 const u8 *cell; 844 int err; 845 846 cell = get_prop_check_min_len(blob, node, prop_name, count, &err); 847 if (!err) 848 memcpy(array, cell, count); 849 return err; 850 } 851 852 const u8 *fdtdec_locate_byte_array(const void *blob, int node, 853 const char *prop_name, int count) 854 { 855 const u8 *cell; 856 int err; 857 858 cell = get_prop_check_min_len(blob, node, prop_name, count, &err); 859 if (err) 860 return NULL; 861 return cell; 862 } 863 864 int fdtdec_get_config_int(const void *blob, const char *prop_name, 865 int default_val) 866 { 867 int config_node; 868 869 debug("%s: %s\n", __func__, prop_name); 870 config_node = fdt_path_offset(blob, "/config"); 871 if (config_node < 0) 872 return default_val; 873 return fdtdec_get_int(blob, config_node, prop_name, default_val); 874 } 875 876 int fdtdec_get_config_bool(const void *blob, const char *prop_name) 877 { 878 int config_node; 879 const void *prop; 880 881 debug("%s: %s\n", __func__, prop_name); 882 config_node = fdt_path_offset(blob, "/config"); 883 if (config_node < 0) 884 return 0; 885 prop = fdt_get_property(blob, config_node, prop_name, NULL); 886 887 return prop != NULL; 888 } 889 890 char *fdtdec_get_config_string(const void *blob, const char *prop_name) 891 { 892 const char *nodep; 893 int nodeoffset; 894 int len; 895 896 debug("%s: %s\n", __func__, prop_name); 897 nodeoffset = fdt_path_offset(blob, "/config"); 898 if (nodeoffset < 0) 899 return NULL; 900 901 nodep = fdt_getprop(blob, nodeoffset, prop_name, &len); 902 if (!nodep) 903 return NULL; 904 905 return (char *)nodep; 906 } 907 908 u64 fdtdec_get_number(const fdt32_t *ptr, unsigned int cells) 909 { 910 u64 number = 0; 911 912 while (cells--) 913 number = (number << 32) | fdt32_to_cpu(*ptr++); 914 915 return number; 916 } 917 918 int fdt_get_resource(const void *fdt, int node, const char *property, 919 unsigned int index, struct fdt_resource *res) 920 { 921 const fdt32_t *ptr, *end; 922 int na, ns, len, parent; 923 unsigned int i = 0; 924 925 parent = fdt_parent_offset(fdt, node); 926 if (parent < 0) 927 return parent; 928 929 na = fdt_address_cells(fdt, parent); 930 ns = fdt_size_cells(fdt, parent); 931 932 ptr = fdt_getprop(fdt, node, property, &len); 933 if (!ptr) 934 return len; 935 936 end = ptr + len / sizeof(*ptr); 937 938 while (ptr + na + ns <= end) { 939 if (i == index) { 940 res->start = fdtdec_get_number(ptr, na); 941 res->end = res->start; 942 res->end += fdtdec_get_number(&ptr[na], ns) - 1; 943 return 0; 944 } 945 946 ptr += na + ns; 947 i++; 948 } 949 950 return -FDT_ERR_NOTFOUND; 951 } 952 953 int fdt_get_named_resource(const void *fdt, int node, const char *property, 954 const char *prop_names, const char *name, 955 struct fdt_resource *res) 956 { 957 int index; 958 959 index = fdt_stringlist_search(fdt, node, prop_names, name); 960 if (index < 0) 961 return index; 962 963 return fdt_get_resource(fdt, node, property, index, res); 964 } 965 966 static int decode_timing_property(const void *blob, int node, const char *name, 967 struct timing_entry *result) 968 { 969 int length, ret = 0; 970 const u32 *prop; 971 972 prop = fdt_getprop(blob, node, name, &length); 973 if (!prop) { 974 debug("%s: could not find property %s\n", 975 fdt_get_name(blob, node, NULL), name); 976 return length; 977 } 978 979 if (length == sizeof(u32)) { 980 result->typ = fdtdec_get_int(blob, node, name, 0); 981 result->min = result->typ; 982 result->max = result->typ; 983 } else { 984 ret = fdtdec_get_int_array(blob, node, name, &result->min, 3); 985 } 986 987 return ret; 988 } 989 990 int fdtdec_decode_display_timing(const void *blob, int parent, int index, 991 struct display_timing *dt) 992 { 993 int i, node, timings_node; 994 u32 val = 0; 995 int ret = 0; 996 997 timings_node = fdt_subnode_offset(blob, parent, "display-timings"); 998 if (timings_node < 0) 999 return timings_node; 1000 1001 for (i = 0, node = fdt_first_subnode(blob, timings_node); 1002 node > 0 && i != index; 1003 node = fdt_next_subnode(blob, node)) 1004 i++; 1005 1006 if (node < 0) 1007 return node; 1008 1009 memset(dt, 0, sizeof(*dt)); 1010 1011 ret |= decode_timing_property(blob, node, "hback-porch", 1012 &dt->hback_porch); 1013 ret |= decode_timing_property(blob, node, "hfront-porch", 1014 &dt->hfront_porch); 1015 ret |= decode_timing_property(blob, node, "hactive", &dt->hactive); 1016 ret |= decode_timing_property(blob, node, "hsync-len", &dt->hsync_len); 1017 ret |= decode_timing_property(blob, node, "vback-porch", 1018 &dt->vback_porch); 1019 ret |= decode_timing_property(blob, node, "vfront-porch", 1020 &dt->vfront_porch); 1021 ret |= decode_timing_property(blob, node, "vactive", &dt->vactive); 1022 ret |= decode_timing_property(blob, node, "vsync-len", &dt->vsync_len); 1023 ret |= decode_timing_property(blob, node, "clock-frequency", 1024 &dt->pixelclock); 1025 1026 dt->flags = 0; 1027 val = fdtdec_get_int(blob, node, "vsync-active", -1); 1028 if (val != -1) { 1029 dt->flags |= val ? DISPLAY_FLAGS_VSYNC_HIGH : 1030 DISPLAY_FLAGS_VSYNC_LOW; 1031 } 1032 val = fdtdec_get_int(blob, node, "hsync-active", -1); 1033 if (val != -1) { 1034 dt->flags |= val ? DISPLAY_FLAGS_HSYNC_HIGH : 1035 DISPLAY_FLAGS_HSYNC_LOW; 1036 } 1037 val = fdtdec_get_int(blob, node, "de-active", -1); 1038 if (val != -1) { 1039 dt->flags |= val ? DISPLAY_FLAGS_DE_HIGH : 1040 DISPLAY_FLAGS_DE_LOW; 1041 } 1042 val = fdtdec_get_int(blob, node, "pixelclk-active", -1); 1043 if (val != -1) { 1044 dt->flags |= val ? DISPLAY_FLAGS_PIXDATA_POSEDGE : 1045 DISPLAY_FLAGS_PIXDATA_NEGEDGE; 1046 } 1047 1048 if (fdtdec_get_bool(blob, node, "interlaced")) 1049 dt->flags |= DISPLAY_FLAGS_INTERLACED; 1050 if (fdtdec_get_bool(blob, node, "doublescan")) 1051 dt->flags |= DISPLAY_FLAGS_DOUBLESCAN; 1052 if (fdtdec_get_bool(blob, node, "doubleclk")) 1053 dt->flags |= DISPLAY_FLAGS_DOUBLECLK; 1054 1055 return ret; 1056 } 1057 1058 int fdtdec_setup_mem_size_base(void) 1059 { 1060 int ret, mem; 1061 struct fdt_resource res; 1062 1063 mem = fdt_path_offset(gd->fdt_blob, "/memory"); 1064 if (mem < 0) { 1065 debug("%s: Missing /memory node\n", __func__); 1066 return -EINVAL; 1067 } 1068 1069 ret = fdt_get_resource(gd->fdt_blob, mem, "reg", 0, &res); 1070 if (ret != 0) { 1071 debug("%s: Unable to decode first memory bank\n", __func__); 1072 return -EINVAL; 1073 } 1074 1075 gd->ram_size = (phys_size_t)(res.end - res.start + 1); 1076 gd->ram_base = (unsigned long)res.start; 1077 debug("%s: Initial DRAM size %llx\n", __func__, 1078 (unsigned long long)gd->ram_size); 1079 1080 return 0; 1081 } 1082 1083 #if defined(CONFIG_NR_DRAM_BANKS) 1084 1085 static int get_next_memory_node(const void *blob, int mem) 1086 { 1087 do { 1088 mem = fdt_node_offset_by_prop_value(gd->fdt_blob, mem, 1089 "device_type", "memory", 7); 1090 } while (!fdtdec_get_is_enabled(blob, mem)); 1091 1092 return mem; 1093 } 1094 1095 int fdtdec_setup_memory_banksize(void) 1096 { 1097 int bank, ret, mem, reg = 0; 1098 struct fdt_resource res; 1099 1100 mem = get_next_memory_node(gd->fdt_blob, -1); 1101 if (mem < 0) { 1102 debug("%s: Missing /memory node\n", __func__); 1103 return -EINVAL; 1104 } 1105 1106 for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) { 1107 ret = fdt_get_resource(gd->fdt_blob, mem, "reg", reg++, &res); 1108 if (ret == -FDT_ERR_NOTFOUND) { 1109 reg = 0; 1110 mem = get_next_memory_node(gd->fdt_blob, mem); 1111 if (mem == -FDT_ERR_NOTFOUND) 1112 break; 1113 1114 ret = fdt_get_resource(gd->fdt_blob, mem, "reg", reg++, &res); 1115 if (ret == -FDT_ERR_NOTFOUND) 1116 break; 1117 } 1118 if (ret != 0) { 1119 return -EINVAL; 1120 } 1121 1122 gd->bd->bi_dram[bank].start = (phys_addr_t)res.start; 1123 gd->bd->bi_dram[bank].size = 1124 (phys_size_t)(res.end - res.start + 1); 1125 1126 debug("%s: DRAM Bank #%d: start = 0x%llx, size = 0x%llx\n", 1127 __func__, bank, 1128 (unsigned long long)gd->bd->bi_dram[bank].start, 1129 (unsigned long long)gd->bd->bi_dram[bank].size); 1130 } 1131 1132 return 0; 1133 } 1134 #endif 1135 1136 #if CONFIG_IS_ENABLED(MULTI_DTB_FIT) 1137 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_GZIP) ||\ 1138 CONFIG_IS_ENABLED(MULTI_DTB_FIT_LZO) 1139 static int uncompress_blob(const void *src, ulong sz_src, void **dstp) 1140 { 1141 size_t sz_out = CONFIG_SPL_MULTI_DTB_FIT_UNCOMPRESS_SZ; 1142 ulong sz_in = sz_src; 1143 void *dst; 1144 int rc; 1145 1146 if (CONFIG_IS_ENABLED(GZIP)) 1147 if (gzip_parse_header(src, sz_in) < 0) 1148 return -1; 1149 if (CONFIG_IS_ENABLED(LZO)) 1150 if (!lzop_is_valid_header(src)) 1151 return -EBADMSG; 1152 1153 if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC)) { 1154 dst = malloc(sz_out); 1155 if (!dst) { 1156 puts("uncompress_blob: Unable to allocate memory\n"); 1157 return -ENOMEM; 1158 } 1159 } else { 1160 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_USER_DEFINED_AREA) 1161 dst = (void *)CONFIG_VAL(MULTI_DTB_FIT_USER_DEF_ADDR); 1162 # else 1163 return -ENOTSUPP; 1164 # endif 1165 } 1166 1167 if (CONFIG_IS_ENABLED(GZIP)) 1168 rc = gunzip(dst, sz_out, (u8 *)src, &sz_in); 1169 else if (CONFIG_IS_ENABLED(LZO)) 1170 rc = lzop_decompress(src, sz_in, dst, &sz_out); 1171 1172 if (rc < 0) { 1173 /* not a valid compressed blob */ 1174 puts("uncompress_blob: Unable to uncompress\n"); 1175 if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC)) 1176 free(dst); 1177 return -EBADMSG; 1178 } 1179 *dstp = dst; 1180 return 0; 1181 } 1182 # else 1183 static int uncompress_blob(const void *src, ulong sz_src, void **dstp) 1184 { 1185 *dstp = (void *)src; 1186 return 0; 1187 } 1188 # endif 1189 #endif 1190 1191 #if defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE) 1192 /* 1193 * For CONFIG_OF_SEPARATE, the board may optionally implement this to 1194 * provide and/or fixup the fdt. 1195 */ 1196 __weak void *board_fdt_blob_setup(void) 1197 { 1198 void *fdt_blob = NULL; 1199 #ifdef CONFIG_SPL_BUILD 1200 /* FDT is at end of BSS unless it is in a different memory region */ 1201 if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS)) 1202 fdt_blob = (ulong *)&_image_binary_end; 1203 else 1204 fdt_blob = (ulong *)&__bss_end; 1205 #else 1206 /* FDT is at end of image */ 1207 fdt_blob = (ulong *)&_end; 1208 #endif 1209 return fdt_blob; 1210 } 1211 #endif 1212 1213 int fdtdec_setup(void) 1214 { 1215 #if CONFIG_IS_ENABLED(OF_CONTROL) 1216 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT) 1217 void *fdt_blob; 1218 # endif 1219 # ifdef CONFIG_OF_EMBED 1220 /* Get a pointer to the FDT */ 1221 # ifdef CONFIG_SPL_BUILD 1222 gd->fdt_blob = __dtb_dt_spl_begin; 1223 # else 1224 gd->fdt_blob = __dtb_dt_begin; 1225 # endif 1226 # elif defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE) 1227 /* Allow the board to override the fdt address. */ 1228 gd->fdt_blob = board_fdt_blob_setup(); 1229 # elif defined(CONFIG_OF_HOSTFILE) 1230 if (sandbox_read_fdt_from_file()) { 1231 puts("Failed to read control FDT\n"); 1232 return -1; 1233 } 1234 # endif 1235 # ifndef CONFIG_SPL_BUILD 1236 /* Allow the early environment to override the fdt address */ 1237 # if CONFIG_IS_ENABLED(OF_PRIOR_STAGE) 1238 gd->fdt_blob = (void *)prior_stage_fdt_address; 1239 # else 1240 gd->fdt_blob = map_sysmem 1241 (env_get_ulong("fdtcontroladdr", 16, 1242 (unsigned long)map_to_sysmem(gd->fdt_blob)), 0); 1243 # endif 1244 # endif 1245 1246 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT) 1247 /* 1248 * Try and uncompress the blob. 1249 * Unfortunately there is no way to know how big the input blob really 1250 * is. So let us set the maximum input size arbitrarily high. 16MB 1251 * ought to be more than enough for packed DTBs. 1252 */ 1253 if (uncompress_blob(gd->fdt_blob, 0x1000000, &fdt_blob) == 0) 1254 gd->fdt_blob = fdt_blob; 1255 1256 /* 1257 * Check if blob is a FIT images containings DTBs. 1258 * If so, pick the most relevant 1259 */ 1260 fdt_blob = locate_dtb_in_fit(gd->fdt_blob); 1261 if (fdt_blob) { 1262 gd->multi_dtb_fit = gd->fdt_blob; 1263 gd->fdt_blob = fdt_blob; 1264 } 1265 1266 # endif 1267 #endif 1268 1269 return fdtdec_prepare_fdt(); 1270 } 1271 1272 #if CONFIG_IS_ENABLED(MULTI_DTB_FIT) 1273 int fdtdec_resetup(int *rescan) 1274 { 1275 void *fdt_blob; 1276 1277 /* 1278 * If the current DTB is part of a compressed FIT image, 1279 * try to locate the best match from the uncompressed 1280 * FIT image stillpresent there. Save the time and space 1281 * required to uncompress it again. 1282 */ 1283 if (gd->multi_dtb_fit) { 1284 fdt_blob = locate_dtb_in_fit(gd->multi_dtb_fit); 1285 1286 if (fdt_blob == gd->fdt_blob) { 1287 /* 1288 * The best match did not change. no need to tear down 1289 * the DM and rescan the fdt. 1290 */ 1291 *rescan = 0; 1292 return 0; 1293 } 1294 1295 *rescan = 1; 1296 gd->fdt_blob = fdt_blob; 1297 return fdtdec_prepare_fdt(); 1298 } 1299 1300 /* 1301 * If multi_dtb_fit is NULL, it means that blob appended to u-boot is 1302 * not a FIT image containings DTB, but a single DTB. There is no need 1303 * to teard down DM and rescan the DT in this case. 1304 */ 1305 *rescan = 0; 1306 return 0; 1307 } 1308 #endif 1309 1310 #ifdef CONFIG_NR_DRAM_BANKS 1311 int fdtdec_decode_ram_size(const void *blob, const char *area, int board_id, 1312 phys_addr_t *basep, phys_size_t *sizep, bd_t *bd) 1313 { 1314 int addr_cells, size_cells; 1315 const u32 *cell, *end; 1316 u64 total_size, size, addr; 1317 int node, child; 1318 bool auto_size; 1319 int bank; 1320 int len; 1321 1322 debug("%s: board_id=%d\n", __func__, board_id); 1323 if (!area) 1324 area = "/memory"; 1325 node = fdt_path_offset(blob, area); 1326 if (node < 0) { 1327 debug("No %s node found\n", area); 1328 return -ENOENT; 1329 } 1330 1331 cell = fdt_getprop(blob, node, "reg", &len); 1332 if (!cell) { 1333 debug("No reg property found\n"); 1334 return -ENOENT; 1335 } 1336 1337 addr_cells = fdt_address_cells(blob, node); 1338 size_cells = fdt_size_cells(blob, node); 1339 1340 /* Check the board id and mask */ 1341 for (child = fdt_first_subnode(blob, node); 1342 child >= 0; 1343 child = fdt_next_subnode(blob, child)) { 1344 int match_mask, match_value; 1345 1346 match_mask = fdtdec_get_int(blob, child, "match-mask", -1); 1347 match_value = fdtdec_get_int(blob, child, "match-value", -1); 1348 1349 if (match_value >= 0 && 1350 ((board_id & match_mask) == match_value)) { 1351 /* Found matching mask */ 1352 debug("Found matching mask %d\n", match_mask); 1353 node = child; 1354 cell = fdt_getprop(blob, node, "reg", &len); 1355 if (!cell) { 1356 debug("No memory-banks property found\n"); 1357 return -EINVAL; 1358 } 1359 break; 1360 } 1361 } 1362 /* Note: if no matching subnode was found we use the parent node */ 1363 1364 if (bd) { 1365 memset(bd->bi_dram, '\0', sizeof(bd->bi_dram[0]) * 1366 CONFIG_NR_DRAM_BANKS); 1367 } 1368 1369 auto_size = fdtdec_get_bool(blob, node, "auto-size"); 1370 1371 total_size = 0; 1372 end = cell + len / 4 - addr_cells - size_cells; 1373 debug("cell at %p, end %p\n", cell, end); 1374 for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) { 1375 if (cell > end) 1376 break; 1377 addr = 0; 1378 if (addr_cells == 2) 1379 addr += (u64)fdt32_to_cpu(*cell++) << 32UL; 1380 addr += fdt32_to_cpu(*cell++); 1381 if (bd) 1382 bd->bi_dram[bank].start = addr; 1383 if (basep && !bank) 1384 *basep = (phys_addr_t)addr; 1385 1386 size = 0; 1387 if (size_cells == 2) 1388 size += (u64)fdt32_to_cpu(*cell++) << 32UL; 1389 size += fdt32_to_cpu(*cell++); 1390 1391 if (auto_size) { 1392 u64 new_size; 1393 1394 debug("Auto-sizing %llx, size %llx: ", addr, size); 1395 new_size = get_ram_size((long *)(uintptr_t)addr, size); 1396 if (new_size == size) { 1397 debug("OK\n"); 1398 } else { 1399 debug("sized to %llx\n", new_size); 1400 size = new_size; 1401 } 1402 } 1403 1404 if (bd) 1405 bd->bi_dram[bank].size = size; 1406 total_size += size; 1407 } 1408 1409 debug("Memory size %llu\n", total_size); 1410 if (sizep) 1411 *sizep = (phys_size_t)total_size; 1412 1413 return 0; 1414 } 1415 #endif /* CONFIG_NR_DRAM_BANKS */ 1416 1417 #endif /* !USE_HOSTCC */ 1418