xref: /openbmc/u-boot/lib/fdtdec.c (revision caf2233b)
1 /*
2  * Copyright (c) 2011 The Chromium OS Authors.
3  * SPDX-License-Identifier:	GPL-2.0+
4  */
5 
6 #ifndef USE_HOSTCC
7 #include <common.h>
8 #include <boot_fit.h>
9 #include <dm.h>
10 #include <dm/of_extra.h>
11 #include <errno.h>
12 #include <fdtdec.h>
13 #include <fdt_support.h>
14 #include <libfdt.h>
15 #include <serial.h>
16 #include <asm/sections.h>
17 #include <linux/ctype.h>
18 #include <linux/lzo.h>
19 
20 DECLARE_GLOBAL_DATA_PTR;
21 
22 /*
23  * Here are the type we know about. One day we might allow drivers to
24  * register. For now we just put them here. The COMPAT macro allows us to
25  * turn this into a sparse list later, and keeps the ID with the name.
26  *
27  * NOTE: This list is basically a TODO list for things that need to be
28  * converted to driver model. So don't add new things here unless there is a
29  * good reason why driver-model conversion is infeasible. Examples include
30  * things which are used before driver model is available.
31  */
32 #define COMPAT(id, name) name
33 static const char * const compat_names[COMPAT_COUNT] = {
34 	COMPAT(UNKNOWN, "<none>"),
35 	COMPAT(NVIDIA_TEGRA20_EMC, "nvidia,tegra20-emc"),
36 	COMPAT(NVIDIA_TEGRA20_EMC_TABLE, "nvidia,tegra20-emc-table"),
37 	COMPAT(NVIDIA_TEGRA20_NAND, "nvidia,tegra20-nand"),
38 	COMPAT(NVIDIA_TEGRA124_XUSB_PADCTL, "nvidia,tegra124-xusb-padctl"),
39 	COMPAT(NVIDIA_TEGRA210_XUSB_PADCTL, "nvidia,tegra210-xusb-padctl"),
40 	COMPAT(SMSC_LAN9215, "smsc,lan9215"),
41 	COMPAT(SAMSUNG_EXYNOS5_SROMC, "samsung,exynos-sromc"),
42 	COMPAT(SAMSUNG_S3C2440_I2C, "samsung,s3c2440-i2c"),
43 	COMPAT(SAMSUNG_EXYNOS5_SOUND, "samsung,exynos-sound"),
44 	COMPAT(WOLFSON_WM8994_CODEC, "wolfson,wm8994-codec"),
45 	COMPAT(SAMSUNG_EXYNOS_USB_PHY, "samsung,exynos-usb-phy"),
46 	COMPAT(SAMSUNG_EXYNOS5_USB3_PHY, "samsung,exynos5250-usb3-phy"),
47 	COMPAT(SAMSUNG_EXYNOS_TMU, "samsung,exynos-tmu"),
48 	COMPAT(SAMSUNG_EXYNOS_MIPI_DSI, "samsung,exynos-mipi-dsi"),
49 	COMPAT(SAMSUNG_EXYNOS_DWMMC, "samsung,exynos-dwmmc"),
50 	COMPAT(SAMSUNG_EXYNOS_MMC, "samsung,exynos-mmc"),
51 	COMPAT(MAXIM_MAX77686_PMIC, "maxim,max77686"),
52 	COMPAT(GENERIC_SPI_FLASH, "spi-flash"),
53 	COMPAT(MAXIM_98095_CODEC, "maxim,max98095-codec"),
54 	COMPAT(SAMSUNG_EXYNOS5_I2C, "samsung,exynos5-hsi2c"),
55 	COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"),
56 	COMPAT(INTEL_MICROCODE, "intel,microcode"),
57 	COMPAT(AMS_AS3722, "ams,as3722"),
58 	COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"),
59 	COMPAT(ALTERA_SOCFPGA_DWMAC, "altr,socfpga-stmmac"),
60 	COMPAT(ALTERA_SOCFPGA_DWMMC, "altr,socfpga-dw-mshc"),
61 	COMPAT(ALTERA_SOCFPGA_DWC2USB, "snps,dwc2"),
62 	COMPAT(INTEL_BAYTRAIL_FSP, "intel,baytrail-fsp"),
63 	COMPAT(INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"),
64 	COMPAT(INTEL_IVYBRIDGE_FSP, "intel,ivybridge-fsp"),
65 	COMPAT(COMPAT_SUNXI_NAND, "allwinner,sun4i-a10-nand"),
66 	COMPAT(ALTERA_SOCFPGA_CLK, "altr,clk-mgr"),
67 	COMPAT(ALTERA_SOCFPGA_PINCTRL_SINGLE, "pinctrl-single"),
68 	COMPAT(ALTERA_SOCFPGA_H2F_BRG, "altr,socfpga-hps2fpga-bridge"),
69 	COMPAT(ALTERA_SOCFPGA_LWH2F_BRG, "altr,socfpga-lwhps2fpga-bridge"),
70 	COMPAT(ALTERA_SOCFPGA_F2H_BRG, "altr,socfpga-fpga2hps-bridge"),
71 	COMPAT(ALTERA_SOCFPGA_F2SDR0, "altr,socfpga-fpga2sdram0-bridge"),
72 	COMPAT(ALTERA_SOCFPGA_F2SDR1, "altr,socfpga-fpga2sdram1-bridge"),
73 	COMPAT(ALTERA_SOCFPGA_F2SDR2, "altr,socfpga-fpga2sdram2-bridge"),
74 	COMPAT(ALTERA_SOCFPGA_FPGA0, "altr,socfpga-a10-fpga-mgr"),
75 	COMPAT(ALTERA_SOCFPGA_NOC, "altr,socfpga-a10-noc"),
76 };
77 
78 const char *fdtdec_get_compatible(enum fdt_compat_id id)
79 {
80 	/* We allow reading of the 'unknown' ID for testing purposes */
81 	assert(id >= 0 && id < COMPAT_COUNT);
82 	return compat_names[id];
83 }
84 
85 fdt_addr_t fdtdec_get_addr_size_fixed(const void *blob, int node,
86 				      const char *prop_name, int index, int na,
87 				      int ns, fdt_size_t *sizep,
88 				      bool translate)
89 {
90 	const fdt32_t *prop, *prop_end;
91 	const fdt32_t *prop_addr, *prop_size, *prop_after_size;
92 	int len;
93 	fdt_addr_t addr;
94 
95 	debug("%s: %s: ", __func__, prop_name);
96 
97 	if (na > (sizeof(fdt_addr_t) / sizeof(fdt32_t))) {
98 		debug("(na too large for fdt_addr_t type)\n");
99 		return FDT_ADDR_T_NONE;
100 	}
101 
102 	if (ns > (sizeof(fdt_size_t) / sizeof(fdt32_t))) {
103 		debug("(ns too large for fdt_size_t type)\n");
104 		return FDT_ADDR_T_NONE;
105 	}
106 
107 	prop = fdt_getprop(blob, node, prop_name, &len);
108 	if (!prop) {
109 		debug("(not found)\n");
110 		return FDT_ADDR_T_NONE;
111 	}
112 	prop_end = prop + (len / sizeof(*prop));
113 
114 	prop_addr = prop + (index * (na + ns));
115 	prop_size = prop_addr + na;
116 	prop_after_size = prop_size + ns;
117 	if (prop_after_size > prop_end) {
118 		debug("(not enough data: expected >= %d cells, got %d cells)\n",
119 		      (u32)(prop_after_size - prop), ((u32)(prop_end - prop)));
120 		return FDT_ADDR_T_NONE;
121 	}
122 
123 #if CONFIG_IS_ENABLED(OF_TRANSLATE)
124 	if (translate)
125 		addr = fdt_translate_address(blob, node, prop_addr);
126 	else
127 #endif
128 		addr = fdtdec_get_number(prop_addr, na);
129 
130 	if (sizep) {
131 		*sizep = fdtdec_get_number(prop_size, ns);
132 		debug("addr=%08llx, size=%llx\n", (unsigned long long)addr,
133 		      (unsigned long long)*sizep);
134 	} else {
135 		debug("addr=%08llx\n", (unsigned long long)addr);
136 	}
137 
138 	return addr;
139 }
140 
141 fdt_addr_t fdtdec_get_addr_size_auto_parent(const void *blob, int parent,
142 					    int node, const char *prop_name,
143 					    int index, fdt_size_t *sizep,
144 					    bool translate)
145 {
146 	int na, ns;
147 
148 	debug("%s: ", __func__);
149 
150 	na = fdt_address_cells(blob, parent);
151 	if (na < 1) {
152 		debug("(bad #address-cells)\n");
153 		return FDT_ADDR_T_NONE;
154 	}
155 
156 	ns = fdt_size_cells(blob, parent);
157 	if (ns < 0) {
158 		debug("(bad #size-cells)\n");
159 		return FDT_ADDR_T_NONE;
160 	}
161 
162 	debug("na=%d, ns=%d, ", na, ns);
163 
164 	return fdtdec_get_addr_size_fixed(blob, node, prop_name, index, na,
165 					  ns, sizep, translate);
166 }
167 
168 fdt_addr_t fdtdec_get_addr_size_auto_noparent(const void *blob, int node,
169 					      const char *prop_name, int index,
170 					      fdt_size_t *sizep,
171 					      bool translate)
172 {
173 	int parent;
174 
175 	debug("%s: ", __func__);
176 
177 	parent = fdt_parent_offset(blob, node);
178 	if (parent < 0) {
179 		debug("(no parent found)\n");
180 		return FDT_ADDR_T_NONE;
181 	}
182 
183 	return fdtdec_get_addr_size_auto_parent(blob, parent, node, prop_name,
184 						index, sizep, translate);
185 }
186 
187 fdt_addr_t fdtdec_get_addr_size(const void *blob, int node,
188 				const char *prop_name, fdt_size_t *sizep)
189 {
190 	int ns = sizep ? (sizeof(fdt_size_t) / sizeof(fdt32_t)) : 0;
191 
192 	return fdtdec_get_addr_size_fixed(blob, node, prop_name, 0,
193 					  sizeof(fdt_addr_t) / sizeof(fdt32_t),
194 					  ns, sizep, false);
195 }
196 
197 fdt_addr_t fdtdec_get_addr(const void *blob, int node, const char *prop_name)
198 {
199 	return fdtdec_get_addr_size(blob, node, prop_name, NULL);
200 }
201 
202 #if defined(CONFIG_PCI) && defined(CONFIG_DM_PCI)
203 int fdtdec_get_pci_addr(const void *blob, int node, enum fdt_pci_space type,
204 			const char *prop_name, struct fdt_pci_addr *addr)
205 {
206 	const u32 *cell;
207 	int len;
208 	int ret = -ENOENT;
209 
210 	debug("%s: %s: ", __func__, prop_name);
211 
212 	/*
213 	 * If we follow the pci bus bindings strictly, we should check
214 	 * the value of the node's parent node's #address-cells and
215 	 * #size-cells. They need to be 3 and 2 accordingly. However,
216 	 * for simplicity we skip the check here.
217 	 */
218 	cell = fdt_getprop(blob, node, prop_name, &len);
219 	if (!cell)
220 		goto fail;
221 
222 	if ((len % FDT_PCI_REG_SIZE) == 0) {
223 		int num = len / FDT_PCI_REG_SIZE;
224 		int i;
225 
226 		for (i = 0; i < num; i++) {
227 			debug("pci address #%d: %08lx %08lx %08lx\n", i,
228 			      (ulong)fdt32_to_cpu(cell[0]),
229 			      (ulong)fdt32_to_cpu(cell[1]),
230 			      (ulong)fdt32_to_cpu(cell[2]));
231 			if ((fdt32_to_cpu(*cell) & type) == type) {
232 				addr->phys_hi = fdt32_to_cpu(cell[0]);
233 				addr->phys_mid = fdt32_to_cpu(cell[1]);
234 				addr->phys_lo = fdt32_to_cpu(cell[1]);
235 				break;
236 			}
237 
238 			cell += (FDT_PCI_ADDR_CELLS +
239 				 FDT_PCI_SIZE_CELLS);
240 		}
241 
242 		if (i == num) {
243 			ret = -ENXIO;
244 			goto fail;
245 		}
246 
247 		return 0;
248 	}
249 
250 	ret = -EINVAL;
251 
252 fail:
253 	debug("(not found)\n");
254 	return ret;
255 }
256 
257 int fdtdec_get_pci_vendev(const void *blob, int node, u16 *vendor, u16 *device)
258 {
259 	const char *list, *end;
260 	int len;
261 
262 	list = fdt_getprop(blob, node, "compatible", &len);
263 	if (!list)
264 		return -ENOENT;
265 
266 	end = list + len;
267 	while (list < end) {
268 		len = strlen(list);
269 		if (len >= strlen("pciVVVV,DDDD")) {
270 			char *s = strstr(list, "pci");
271 
272 			/*
273 			 * check if the string is something like pciVVVV,DDDD.RR
274 			 * or just pciVVVV,DDDD
275 			 */
276 			if (s && s[7] == ',' &&
277 			    (s[12] == '.' || s[12] == 0)) {
278 				s += 3;
279 				*vendor = simple_strtol(s, NULL, 16);
280 
281 				s += 5;
282 				*device = simple_strtol(s, NULL, 16);
283 
284 				return 0;
285 			}
286 		}
287 		list += (len + 1);
288 	}
289 
290 	return -ENOENT;
291 }
292 
293 int fdtdec_get_pci_bar32(struct udevice *dev, struct fdt_pci_addr *addr,
294 			 u32 *bar)
295 {
296 	int barnum;
297 
298 	/* extract the bar number from fdt_pci_addr */
299 	barnum = addr->phys_hi & 0xff;
300 	if (barnum < PCI_BASE_ADDRESS_0 || barnum > PCI_CARDBUS_CIS)
301 		return -EINVAL;
302 
303 	barnum = (barnum - PCI_BASE_ADDRESS_0) / 4;
304 	*bar = dm_pci_read_bar32(dev, barnum);
305 
306 	return 0;
307 }
308 #endif
309 
310 uint64_t fdtdec_get_uint64(const void *blob, int node, const char *prop_name,
311 			   uint64_t default_val)
312 {
313 	const uint64_t *cell64;
314 	int length;
315 
316 	cell64 = fdt_getprop(blob, node, prop_name, &length);
317 	if (!cell64 || length < sizeof(*cell64))
318 		return default_val;
319 
320 	return fdt64_to_cpu(*cell64);
321 }
322 
323 int fdtdec_get_is_enabled(const void *blob, int node)
324 {
325 	const char *cell;
326 
327 	/*
328 	 * It should say "okay", so only allow that. Some fdts use "ok" but
329 	 * this is a bug. Please fix your device tree source file. See here
330 	 * for discussion:
331 	 *
332 	 * http://www.mail-archive.com/u-boot@lists.denx.de/msg71598.html
333 	 */
334 	cell = fdt_getprop(blob, node, "status", NULL);
335 	if (cell)
336 		return strcmp(cell, "okay") == 0;
337 	return 1;
338 }
339 
340 enum fdt_compat_id fdtdec_lookup(const void *blob, int node)
341 {
342 	enum fdt_compat_id id;
343 
344 	/* Search our drivers */
345 	for (id = COMPAT_UNKNOWN; id < COMPAT_COUNT; id++)
346 		if (fdt_node_check_compatible(blob, node,
347 					      compat_names[id]) == 0)
348 			return id;
349 	return COMPAT_UNKNOWN;
350 }
351 
352 int fdtdec_next_compatible(const void *blob, int node, enum fdt_compat_id id)
353 {
354 	return fdt_node_offset_by_compatible(blob, node, compat_names[id]);
355 }
356 
357 int fdtdec_next_compatible_subnode(const void *blob, int node,
358 				   enum fdt_compat_id id, int *depthp)
359 {
360 	do {
361 		node = fdt_next_node(blob, node, depthp);
362 	} while (*depthp > 1);
363 
364 	/* If this is a direct subnode, and compatible, return it */
365 	if (*depthp == 1 && 0 == fdt_node_check_compatible(
366 						blob, node, compat_names[id]))
367 		return node;
368 
369 	return -FDT_ERR_NOTFOUND;
370 }
371 
372 int fdtdec_next_alias(const void *blob, const char *name, enum fdt_compat_id id,
373 		      int *upto)
374 {
375 #define MAX_STR_LEN 20
376 	char str[MAX_STR_LEN + 20];
377 	int node, err;
378 
379 	/* snprintf() is not available */
380 	assert(strlen(name) < MAX_STR_LEN);
381 	sprintf(str, "%.*s%d", MAX_STR_LEN, name, *upto);
382 	node = fdt_path_offset(blob, str);
383 	if (node < 0)
384 		return node;
385 	err = fdt_node_check_compatible(blob, node, compat_names[id]);
386 	if (err < 0)
387 		return err;
388 	if (err)
389 		return -FDT_ERR_NOTFOUND;
390 	(*upto)++;
391 	return node;
392 }
393 
394 int fdtdec_find_aliases_for_id(const void *blob, const char *name,
395 			       enum fdt_compat_id id, int *node_list,
396 			       int maxcount)
397 {
398 	memset(node_list, '\0', sizeof(*node_list) * maxcount);
399 
400 	return fdtdec_add_aliases_for_id(blob, name, id, node_list, maxcount);
401 }
402 
403 /* TODO: Can we tighten this code up a little? */
404 int fdtdec_add_aliases_for_id(const void *blob, const char *name,
405 			      enum fdt_compat_id id, int *node_list,
406 			      int maxcount)
407 {
408 	int name_len = strlen(name);
409 	int nodes[maxcount];
410 	int num_found = 0;
411 	int offset, node;
412 	int alias_node;
413 	int count;
414 	int i, j;
415 
416 	/* find the alias node if present */
417 	alias_node = fdt_path_offset(blob, "/aliases");
418 
419 	/*
420 	 * start with nothing, and we can assume that the root node can't
421 	 * match
422 	 */
423 	memset(nodes, '\0', sizeof(nodes));
424 
425 	/* First find all the compatible nodes */
426 	for (node = count = 0; node >= 0 && count < maxcount;) {
427 		node = fdtdec_next_compatible(blob, node, id);
428 		if (node >= 0)
429 			nodes[count++] = node;
430 	}
431 	if (node >= 0)
432 		debug("%s: warning: maxcount exceeded with alias '%s'\n",
433 		      __func__, name);
434 
435 	/* Now find all the aliases */
436 	for (offset = fdt_first_property_offset(blob, alias_node);
437 			offset > 0;
438 			offset = fdt_next_property_offset(blob, offset)) {
439 		const struct fdt_property *prop;
440 		const char *path;
441 		int number;
442 		int found;
443 
444 		node = 0;
445 		prop = fdt_get_property_by_offset(blob, offset, NULL);
446 		path = fdt_string(blob, fdt32_to_cpu(prop->nameoff));
447 		if (prop->len && 0 == strncmp(path, name, name_len))
448 			node = fdt_path_offset(blob, prop->data);
449 		if (node <= 0)
450 			continue;
451 
452 		/* Get the alias number */
453 		number = simple_strtoul(path + name_len, NULL, 10);
454 		if (number < 0 || number >= maxcount) {
455 			debug("%s: warning: alias '%s' is out of range\n",
456 			      __func__, path);
457 			continue;
458 		}
459 
460 		/* Make sure the node we found is actually in our list! */
461 		found = -1;
462 		for (j = 0; j < count; j++)
463 			if (nodes[j] == node) {
464 				found = j;
465 				break;
466 			}
467 
468 		if (found == -1) {
469 			debug("%s: warning: alias '%s' points to a node "
470 				"'%s' that is missing or is not compatible "
471 				" with '%s'\n", __func__, path,
472 				fdt_get_name(blob, node, NULL),
473 			       compat_names[id]);
474 			continue;
475 		}
476 
477 		/*
478 		 * Add this node to our list in the right place, and mark
479 		 * it as done.
480 		 */
481 		if (fdtdec_get_is_enabled(blob, node)) {
482 			if (node_list[number]) {
483 				debug("%s: warning: alias '%s' requires that "
484 				      "a node be placed in the list in a "
485 				      "position which is already filled by "
486 				      "node '%s'\n", __func__, path,
487 				      fdt_get_name(blob, node, NULL));
488 				continue;
489 			}
490 			node_list[number] = node;
491 			if (number >= num_found)
492 				num_found = number + 1;
493 		}
494 		nodes[found] = 0;
495 	}
496 
497 	/* Add any nodes not mentioned by an alias */
498 	for (i = j = 0; i < maxcount; i++) {
499 		if (!node_list[i]) {
500 			for (; j < maxcount; j++)
501 				if (nodes[j] &&
502 				    fdtdec_get_is_enabled(blob, nodes[j]))
503 					break;
504 
505 			/* Have we run out of nodes to add? */
506 			if (j == maxcount)
507 				break;
508 
509 			assert(!node_list[i]);
510 			node_list[i] = nodes[j++];
511 			if (i >= num_found)
512 				num_found = i + 1;
513 		}
514 	}
515 
516 	return num_found;
517 }
518 
519 int fdtdec_get_alias_seq(const void *blob, const char *base, int offset,
520 			 int *seqp)
521 {
522 	int base_len = strlen(base);
523 	const char *find_name;
524 	int find_namelen;
525 	int prop_offset;
526 	int aliases;
527 
528 	find_name = fdt_get_name(blob, offset, &find_namelen);
529 	debug("Looking for '%s' at %d, name %s\n", base, offset, find_name);
530 
531 	aliases = fdt_path_offset(blob, "/aliases");
532 	for (prop_offset = fdt_first_property_offset(blob, aliases);
533 	     prop_offset > 0;
534 	     prop_offset = fdt_next_property_offset(blob, prop_offset)) {
535 		const char *prop;
536 		const char *name;
537 		const char *slash;
538 		int len, val;
539 
540 		prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
541 		debug("   - %s, %s\n", name, prop);
542 		if (len < find_namelen || *prop != '/' || prop[len - 1] ||
543 		    strncmp(name, base, base_len))
544 			continue;
545 
546 		slash = strrchr(prop, '/');
547 		if (strcmp(slash + 1, find_name))
548 			continue;
549 		val = trailing_strtol(name);
550 		if (val != -1) {
551 			*seqp = val;
552 			debug("Found seq %d\n", *seqp);
553 			return 0;
554 		}
555 	}
556 
557 	debug("Not found\n");
558 	return -ENOENT;
559 }
560 
561 const char *fdtdec_get_chosen_prop(const void *blob, const char *name)
562 {
563 	int chosen_node;
564 
565 	if (!blob)
566 		return NULL;
567 	chosen_node = fdt_path_offset(blob, "/chosen");
568 	return fdt_getprop(blob, chosen_node, name, NULL);
569 }
570 
571 int fdtdec_get_chosen_node(const void *blob, const char *name)
572 {
573 	const char *prop;
574 
575 	prop = fdtdec_get_chosen_prop(blob, name);
576 	if (!prop)
577 		return -FDT_ERR_NOTFOUND;
578 	return fdt_path_offset(blob, prop);
579 }
580 
581 int fdtdec_check_fdt(void)
582 {
583 	/*
584 	 * We must have an FDT, but we cannot panic() yet since the console
585 	 * is not ready. So for now, just assert(). Boards which need an early
586 	 * FDT (prior to console ready) will need to make their own
587 	 * arrangements and do their own checks.
588 	 */
589 	assert(!fdtdec_prepare_fdt());
590 	return 0;
591 }
592 
593 /*
594  * This function is a little odd in that it accesses global data. At some
595  * point if the architecture board.c files merge this will make more sense.
596  * Even now, it is common code.
597  */
598 int fdtdec_prepare_fdt(void)
599 {
600 	if (!gd->fdt_blob || ((uintptr_t)gd->fdt_blob & 3) ||
601 	    fdt_check_header(gd->fdt_blob)) {
602 #ifdef CONFIG_SPL_BUILD
603 		puts("Missing DTB\n");
604 #else
605 		puts("No valid device tree binary found - please append one to U-Boot binary, use u-boot-dtb.bin or define CONFIG_OF_EMBED. For sandbox, use -d <file.dtb>\n");
606 # ifdef DEBUG
607 		if (gd->fdt_blob) {
608 			printf("fdt_blob=%p\n", gd->fdt_blob);
609 			print_buffer((ulong)gd->fdt_blob, gd->fdt_blob, 4,
610 				     32, 0);
611 		}
612 # endif
613 #endif
614 		return -1;
615 	}
616 	return 0;
617 }
618 
619 int fdtdec_lookup_phandle(const void *blob, int node, const char *prop_name)
620 {
621 	const u32 *phandle;
622 	int lookup;
623 
624 	debug("%s: %s\n", __func__, prop_name);
625 	phandle = fdt_getprop(blob, node, prop_name, NULL);
626 	if (!phandle)
627 		return -FDT_ERR_NOTFOUND;
628 
629 	lookup = fdt_node_offset_by_phandle(blob, fdt32_to_cpu(*phandle));
630 	return lookup;
631 }
632 
633 /**
634  * Look up a property in a node and check that it has a minimum length.
635  *
636  * @param blob		FDT blob
637  * @param node		node to examine
638  * @param prop_name	name of property to find
639  * @param min_len	minimum property length in bytes
640  * @param err		0 if ok, or -FDT_ERR_NOTFOUND if the property is not
641 			found, or -FDT_ERR_BADLAYOUT if not enough data
642  * @return pointer to cell, which is only valid if err == 0
643  */
644 static const void *get_prop_check_min_len(const void *blob, int node,
645 					  const char *prop_name, int min_len,
646 					  int *err)
647 {
648 	const void *cell;
649 	int len;
650 
651 	debug("%s: %s\n", __func__, prop_name);
652 	cell = fdt_getprop(blob, node, prop_name, &len);
653 	if (!cell)
654 		*err = -FDT_ERR_NOTFOUND;
655 	else if (len < min_len)
656 		*err = -FDT_ERR_BADLAYOUT;
657 	else
658 		*err = 0;
659 	return cell;
660 }
661 
662 int fdtdec_get_int_array(const void *blob, int node, const char *prop_name,
663 			 u32 *array, int count)
664 {
665 	const u32 *cell;
666 	int err = 0;
667 
668 	debug("%s: %s\n", __func__, prop_name);
669 	cell = get_prop_check_min_len(blob, node, prop_name,
670 				      sizeof(u32) * count, &err);
671 	if (!err) {
672 		int i;
673 
674 		for (i = 0; i < count; i++)
675 			array[i] = fdt32_to_cpu(cell[i]);
676 	}
677 	return err;
678 }
679 
680 int fdtdec_get_int_array_count(const void *blob, int node,
681 			       const char *prop_name, u32 *array, int count)
682 {
683 	const u32 *cell;
684 	int len, elems;
685 	int i;
686 
687 	debug("%s: %s\n", __func__, prop_name);
688 	cell = fdt_getprop(blob, node, prop_name, &len);
689 	if (!cell)
690 		return -FDT_ERR_NOTFOUND;
691 	elems = len / sizeof(u32);
692 	if (count > elems)
693 		count = elems;
694 	for (i = 0; i < count; i++)
695 		array[i] = fdt32_to_cpu(cell[i]);
696 
697 	return count;
698 }
699 
700 const u32 *fdtdec_locate_array(const void *blob, int node,
701 			       const char *prop_name, int count)
702 {
703 	const u32 *cell;
704 	int err;
705 
706 	cell = get_prop_check_min_len(blob, node, prop_name,
707 				      sizeof(u32) * count, &err);
708 	return err ? NULL : cell;
709 }
710 
711 int fdtdec_get_bool(const void *blob, int node, const char *prop_name)
712 {
713 	const s32 *cell;
714 	int len;
715 
716 	debug("%s: %s\n", __func__, prop_name);
717 	cell = fdt_getprop(blob, node, prop_name, &len);
718 	return cell != NULL;
719 }
720 
721 int fdtdec_parse_phandle_with_args(const void *blob, int src_node,
722 				   const char *list_name,
723 				   const char *cells_name,
724 				   int cell_count, int index,
725 				   struct fdtdec_phandle_args *out_args)
726 {
727 	const __be32 *list, *list_end;
728 	int rc = 0, size, cur_index = 0;
729 	uint32_t count = 0;
730 	int node = -1;
731 	int phandle;
732 
733 	/* Retrieve the phandle list property */
734 	list = fdt_getprop(blob, src_node, list_name, &size);
735 	if (!list)
736 		return -ENOENT;
737 	list_end = list + size / sizeof(*list);
738 
739 	/* Loop over the phandles until all the requested entry is found */
740 	while (list < list_end) {
741 		rc = -EINVAL;
742 		count = 0;
743 
744 		/*
745 		 * If phandle is 0, then it is an empty entry with no
746 		 * arguments.  Skip forward to the next entry.
747 		 */
748 		phandle = be32_to_cpup(list++);
749 		if (phandle) {
750 			/*
751 			 * Find the provider node and parse the #*-cells
752 			 * property to determine the argument length.
753 			 *
754 			 * This is not needed if the cell count is hard-coded
755 			 * (i.e. cells_name not set, but cell_count is set),
756 			 * except when we're going to return the found node
757 			 * below.
758 			 */
759 			if (cells_name || cur_index == index) {
760 				node = fdt_node_offset_by_phandle(blob,
761 								  phandle);
762 				if (!node) {
763 					debug("%s: could not find phandle\n",
764 					      fdt_get_name(blob, src_node,
765 							   NULL));
766 					goto err;
767 				}
768 			}
769 
770 			if (cells_name) {
771 				count = fdtdec_get_int(blob, node, cells_name,
772 						       -1);
773 				if (count == -1) {
774 					debug("%s: could not get %s for %s\n",
775 					      fdt_get_name(blob, src_node,
776 							   NULL),
777 					      cells_name,
778 					      fdt_get_name(blob, node,
779 							   NULL));
780 					goto err;
781 				}
782 			} else {
783 				count = cell_count;
784 			}
785 
786 			/*
787 			 * Make sure that the arguments actually fit in the
788 			 * remaining property data length
789 			 */
790 			if (list + count > list_end) {
791 				debug("%s: arguments longer than property\n",
792 				      fdt_get_name(blob, src_node, NULL));
793 				goto err;
794 			}
795 		}
796 
797 		/*
798 		 * All of the error cases above bail out of the loop, so at
799 		 * this point, the parsing is successful. If the requested
800 		 * index matches, then fill the out_args structure and return,
801 		 * or return -ENOENT for an empty entry.
802 		 */
803 		rc = -ENOENT;
804 		if (cur_index == index) {
805 			if (!phandle)
806 				goto err;
807 
808 			if (out_args) {
809 				int i;
810 
811 				if (count > MAX_PHANDLE_ARGS) {
812 					debug("%s: too many arguments %d\n",
813 					      fdt_get_name(blob, src_node,
814 							   NULL), count);
815 					count = MAX_PHANDLE_ARGS;
816 				}
817 				out_args->node = node;
818 				out_args->args_count = count;
819 				for (i = 0; i < count; i++) {
820 					out_args->args[i] =
821 							be32_to_cpup(list++);
822 				}
823 			}
824 
825 			/* Found it! return success */
826 			return 0;
827 		}
828 
829 		node = -1;
830 		list += count;
831 		cur_index++;
832 	}
833 
834 	/*
835 	 * Result will be one of:
836 	 * -ENOENT : index is for empty phandle
837 	 * -EINVAL : parsing error on data
838 	 * [1..n]  : Number of phandle (count mode; when index = -1)
839 	 */
840 	rc = index < 0 ? cur_index : -ENOENT;
841  err:
842 	return rc;
843 }
844 
845 int fdtdec_get_child_count(const void *blob, int node)
846 {
847 	int subnode;
848 	int num = 0;
849 
850 	fdt_for_each_subnode(subnode, blob, node)
851 		num++;
852 
853 	return num;
854 }
855 
856 int fdtdec_get_byte_array(const void *blob, int node, const char *prop_name,
857 			  u8 *array, int count)
858 {
859 	const u8 *cell;
860 	int err;
861 
862 	cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
863 	if (!err)
864 		memcpy(array, cell, count);
865 	return err;
866 }
867 
868 const u8 *fdtdec_locate_byte_array(const void *blob, int node,
869 				   const char *prop_name, int count)
870 {
871 	const u8 *cell;
872 	int err;
873 
874 	cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
875 	if (err)
876 		return NULL;
877 	return cell;
878 }
879 
880 int fdtdec_get_config_int(const void *blob, const char *prop_name,
881 			  int default_val)
882 {
883 	int config_node;
884 
885 	debug("%s: %s\n", __func__, prop_name);
886 	config_node = fdt_path_offset(blob, "/config");
887 	if (config_node < 0)
888 		return default_val;
889 	return fdtdec_get_int(blob, config_node, prop_name, default_val);
890 }
891 
892 int fdtdec_get_config_bool(const void *blob, const char *prop_name)
893 {
894 	int config_node;
895 	const void *prop;
896 
897 	debug("%s: %s\n", __func__, prop_name);
898 	config_node = fdt_path_offset(blob, "/config");
899 	if (config_node < 0)
900 		return 0;
901 	prop = fdt_get_property(blob, config_node, prop_name, NULL);
902 
903 	return prop != NULL;
904 }
905 
906 char *fdtdec_get_config_string(const void *blob, const char *prop_name)
907 {
908 	const char *nodep;
909 	int nodeoffset;
910 	int len;
911 
912 	debug("%s: %s\n", __func__, prop_name);
913 	nodeoffset = fdt_path_offset(blob, "/config");
914 	if (nodeoffset < 0)
915 		return NULL;
916 
917 	nodep = fdt_getprop(blob, nodeoffset, prop_name, &len);
918 	if (!nodep)
919 		return NULL;
920 
921 	return (char *)nodep;
922 }
923 
924 int fdtdec_decode_region(const void *blob, int node, const char *prop_name,
925 			 fdt_addr_t *basep, fdt_size_t *sizep)
926 {
927 	const fdt_addr_t *cell;
928 	int len;
929 
930 	debug("%s: %s: %s\n", __func__, fdt_get_name(blob, node, NULL),
931 	      prop_name);
932 	cell = fdt_getprop(blob, node, prop_name, &len);
933 	if (!cell || (len < sizeof(fdt_addr_t) * 2)) {
934 		debug("cell=%p, len=%d\n", cell, len);
935 		return -1;
936 	}
937 
938 	*basep = fdt_addr_to_cpu(*cell);
939 	*sizep = fdt_size_to_cpu(cell[1]);
940 	debug("%s: base=%08lx, size=%lx\n", __func__, (ulong)*basep,
941 	      (ulong)*sizep);
942 
943 	return 0;
944 }
945 
946 u64 fdtdec_get_number(const fdt32_t *ptr, unsigned int cells)
947 {
948 	u64 number = 0;
949 
950 	while (cells--)
951 		number = (number << 32) | fdt32_to_cpu(*ptr++);
952 
953 	return number;
954 }
955 
956 int fdt_get_resource(const void *fdt, int node, const char *property,
957 		     unsigned int index, struct fdt_resource *res)
958 {
959 	const fdt32_t *ptr, *end;
960 	int na, ns, len, parent;
961 	unsigned int i = 0;
962 
963 	parent = fdt_parent_offset(fdt, node);
964 	if (parent < 0)
965 		return parent;
966 
967 	na = fdt_address_cells(fdt, parent);
968 	ns = fdt_size_cells(fdt, parent);
969 
970 	ptr = fdt_getprop(fdt, node, property, &len);
971 	if (!ptr)
972 		return len;
973 
974 	end = ptr + len / sizeof(*ptr);
975 
976 	while (ptr + na + ns <= end) {
977 		if (i == index) {
978 			res->start = fdtdec_get_number(ptr, na);
979 			res->end = res->start;
980 			res->end += fdtdec_get_number(&ptr[na], ns) - 1;
981 			return 0;
982 		}
983 
984 		ptr += na + ns;
985 		i++;
986 	}
987 
988 	return -FDT_ERR_NOTFOUND;
989 }
990 
991 int fdt_get_named_resource(const void *fdt, int node, const char *property,
992 			   const char *prop_names, const char *name,
993 			   struct fdt_resource *res)
994 {
995 	int index;
996 
997 	index = fdt_stringlist_search(fdt, node, prop_names, name);
998 	if (index < 0)
999 		return index;
1000 
1001 	return fdt_get_resource(fdt, node, property, index, res);
1002 }
1003 
1004 int fdtdec_decode_memory_region(const void *blob, int config_node,
1005 				const char *mem_type, const char *suffix,
1006 				fdt_addr_t *basep, fdt_size_t *sizep)
1007 {
1008 	char prop_name[50];
1009 	const char *mem;
1010 	fdt_size_t size, offset_size;
1011 	fdt_addr_t base, offset;
1012 	int node;
1013 
1014 	if (config_node == -1) {
1015 		config_node = fdt_path_offset(blob, "/config");
1016 		if (config_node < 0) {
1017 			debug("%s: Cannot find /config node\n", __func__);
1018 			return -ENOENT;
1019 		}
1020 	}
1021 	if (!suffix)
1022 		suffix = "";
1023 
1024 	snprintf(prop_name, sizeof(prop_name), "%s-memory%s", mem_type,
1025 		 suffix);
1026 	mem = fdt_getprop(blob, config_node, prop_name, NULL);
1027 	if (!mem) {
1028 		debug("%s: No memory type for '%s', using /memory\n", __func__,
1029 		      prop_name);
1030 		mem = "/memory";
1031 	}
1032 
1033 	node = fdt_path_offset(blob, mem);
1034 	if (node < 0) {
1035 		debug("%s: Failed to find node '%s': %s\n", __func__, mem,
1036 		      fdt_strerror(node));
1037 		return -ENOENT;
1038 	}
1039 
1040 	/*
1041 	 * Not strictly correct - the memory may have multiple banks. We just
1042 	 * use the first
1043 	 */
1044 	if (fdtdec_decode_region(blob, node, "reg", &base, &size)) {
1045 		debug("%s: Failed to decode memory region %s\n", __func__,
1046 		      mem);
1047 		return -EINVAL;
1048 	}
1049 
1050 	snprintf(prop_name, sizeof(prop_name), "%s-offset%s", mem_type,
1051 		 suffix);
1052 	if (fdtdec_decode_region(blob, config_node, prop_name, &offset,
1053 				 &offset_size)) {
1054 		debug("%s: Failed to decode memory region '%s'\n", __func__,
1055 		      prop_name);
1056 		return -EINVAL;
1057 	}
1058 
1059 	*basep = base + offset;
1060 	*sizep = offset_size;
1061 
1062 	return 0;
1063 }
1064 
1065 static int decode_timing_property(const void *blob, int node, const char *name,
1066 				  struct timing_entry *result)
1067 {
1068 	int length, ret = 0;
1069 	const u32 *prop;
1070 
1071 	prop = fdt_getprop(blob, node, name, &length);
1072 	if (!prop) {
1073 		debug("%s: could not find property %s\n",
1074 		      fdt_get_name(blob, node, NULL), name);
1075 		return length;
1076 	}
1077 
1078 	if (length == sizeof(u32)) {
1079 		result->typ = fdtdec_get_int(blob, node, name, 0);
1080 		result->min = result->typ;
1081 		result->max = result->typ;
1082 	} else {
1083 		ret = fdtdec_get_int_array(blob, node, name, &result->min, 3);
1084 	}
1085 
1086 	return ret;
1087 }
1088 
1089 int fdtdec_decode_display_timing(const void *blob, int parent, int index,
1090 				 struct display_timing *dt)
1091 {
1092 	int i, node, timings_node;
1093 	u32 val = 0;
1094 	int ret = 0;
1095 
1096 	timings_node = fdt_subnode_offset(blob, parent, "display-timings");
1097 	if (timings_node < 0)
1098 		return timings_node;
1099 
1100 	for (i = 0, node = fdt_first_subnode(blob, timings_node);
1101 	     node > 0 && i != index;
1102 	     node = fdt_next_subnode(blob, node))
1103 		i++;
1104 
1105 	if (node < 0)
1106 		return node;
1107 
1108 	memset(dt, 0, sizeof(*dt));
1109 
1110 	ret |= decode_timing_property(blob, node, "hback-porch",
1111 				      &dt->hback_porch);
1112 	ret |= decode_timing_property(blob, node, "hfront-porch",
1113 				      &dt->hfront_porch);
1114 	ret |= decode_timing_property(blob, node, "hactive", &dt->hactive);
1115 	ret |= decode_timing_property(blob, node, "hsync-len", &dt->hsync_len);
1116 	ret |= decode_timing_property(blob, node, "vback-porch",
1117 				      &dt->vback_porch);
1118 	ret |= decode_timing_property(blob, node, "vfront-porch",
1119 				      &dt->vfront_porch);
1120 	ret |= decode_timing_property(blob, node, "vactive", &dt->vactive);
1121 	ret |= decode_timing_property(blob, node, "vsync-len", &dt->vsync_len);
1122 	ret |= decode_timing_property(blob, node, "clock-frequency",
1123 				      &dt->pixelclock);
1124 
1125 	dt->flags = 0;
1126 	val = fdtdec_get_int(blob, node, "vsync-active", -1);
1127 	if (val != -1) {
1128 		dt->flags |= val ? DISPLAY_FLAGS_VSYNC_HIGH :
1129 				DISPLAY_FLAGS_VSYNC_LOW;
1130 	}
1131 	val = fdtdec_get_int(blob, node, "hsync-active", -1);
1132 	if (val != -1) {
1133 		dt->flags |= val ? DISPLAY_FLAGS_HSYNC_HIGH :
1134 				DISPLAY_FLAGS_HSYNC_LOW;
1135 	}
1136 	val = fdtdec_get_int(blob, node, "de-active", -1);
1137 	if (val != -1) {
1138 		dt->flags |= val ? DISPLAY_FLAGS_DE_HIGH :
1139 				DISPLAY_FLAGS_DE_LOW;
1140 	}
1141 	val = fdtdec_get_int(blob, node, "pixelclk-active", -1);
1142 	if (val != -1) {
1143 		dt->flags |= val ? DISPLAY_FLAGS_PIXDATA_POSEDGE :
1144 				DISPLAY_FLAGS_PIXDATA_NEGEDGE;
1145 	}
1146 
1147 	if (fdtdec_get_bool(blob, node, "interlaced"))
1148 		dt->flags |= DISPLAY_FLAGS_INTERLACED;
1149 	if (fdtdec_get_bool(blob, node, "doublescan"))
1150 		dt->flags |= DISPLAY_FLAGS_DOUBLESCAN;
1151 	if (fdtdec_get_bool(blob, node, "doubleclk"))
1152 		dt->flags |= DISPLAY_FLAGS_DOUBLECLK;
1153 
1154 	return ret;
1155 }
1156 
1157 int fdtdec_setup_memory_size(void)
1158 {
1159 	int ret, mem;
1160 	struct fdt_resource res;
1161 
1162 	mem = fdt_path_offset(gd->fdt_blob, "/memory");
1163 	if (mem < 0) {
1164 		debug("%s: Missing /memory node\n", __func__);
1165 		return -EINVAL;
1166 	}
1167 
1168 	ret = fdt_get_resource(gd->fdt_blob, mem, "reg", 0, &res);
1169 	if (ret != 0) {
1170 		debug("%s: Unable to decode first memory bank\n", __func__);
1171 		return -EINVAL;
1172 	}
1173 
1174 	gd->ram_size = (phys_size_t)(res.end - res.start + 1);
1175 	debug("%s: Initial DRAM size %llx\n", __func__,
1176 	      (unsigned long long)gd->ram_size);
1177 
1178 	return 0;
1179 }
1180 
1181 #if defined(CONFIG_NR_DRAM_BANKS)
1182 int fdtdec_setup_memory_banksize(void)
1183 {
1184 	int bank, ret, mem, reg = 0;
1185 	struct fdt_resource res;
1186 
1187 	mem = fdt_node_offset_by_prop_value(gd->fdt_blob, -1, "device_type",
1188 					    "memory", 7);
1189 	if (mem < 0) {
1190 		debug("%s: Missing /memory node\n", __func__);
1191 		return -EINVAL;
1192 	}
1193 
1194 	for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
1195 		ret = fdt_get_resource(gd->fdt_blob, mem, "reg", reg++, &res);
1196 		if (ret == -FDT_ERR_NOTFOUND) {
1197 			reg = 0;
1198 			mem = fdt_node_offset_by_prop_value(gd->fdt_blob, mem,
1199 							    "device_type",
1200 							    "memory", 7);
1201 			if (mem == -FDT_ERR_NOTFOUND)
1202 				break;
1203 
1204 			ret = fdt_get_resource(gd->fdt_blob, mem, "reg", reg++, &res);
1205 			if (ret == -FDT_ERR_NOTFOUND)
1206 				break;
1207 		}
1208 		if (ret != 0) {
1209 			return -EINVAL;
1210 		}
1211 
1212 		gd->bd->bi_dram[bank].start = (phys_addr_t)res.start;
1213 		gd->bd->bi_dram[bank].size =
1214 			(phys_size_t)(res.end - res.start + 1);
1215 
1216 		debug("%s: DRAM Bank #%d: start = 0x%llx, size = 0x%llx\n",
1217 		      __func__, bank,
1218 		      (unsigned long long)gd->bd->bi_dram[bank].start,
1219 		      (unsigned long long)gd->bd->bi_dram[bank].size);
1220 	}
1221 
1222 	return 0;
1223 }
1224 #endif
1225 
1226 #if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
1227 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_GZIP) ||\
1228 	CONFIG_IS_ENABLED(MULTI_DTB_FIT_LZO)
1229 static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
1230 {
1231 	size_t sz_out = CONFIG_SPL_MULTI_DTB_FIT_UNCOMPRESS_SZ;
1232 	ulong sz_in = sz_src;
1233 	void *dst;
1234 	int rc;
1235 
1236 	if (CONFIG_IS_ENABLED(GZIP))
1237 		if (gzip_parse_header(src, sz_in) < 0)
1238 			return -1;
1239 	if (CONFIG_IS_ENABLED(LZO))
1240 		if (!lzop_is_valid_header(src))
1241 			return -EBADMSG;
1242 
1243 	if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC)) {
1244 		dst = malloc(sz_out);
1245 		if (!dst) {
1246 			puts("uncompress_blob: Unable to allocate memory\n");
1247 			return -ENOMEM;
1248 		}
1249 	} else  {
1250 #  if CONFIG_IS_ENABLED(MULTI_DTB_FIT_USER_DEFINED_AREA)
1251 		dst = (void *)CONFIG_VAL(MULTI_DTB_FIT_USER_DEF_ADDR);
1252 #  else
1253 		return -ENOTSUPP;
1254 #  endif
1255 	}
1256 
1257 	if (CONFIG_IS_ENABLED(GZIP))
1258 		rc = gunzip(dst, sz_out, (u8 *)src, &sz_in);
1259 	else if (CONFIG_IS_ENABLED(LZO))
1260 		rc = lzop_decompress(src, sz_in, dst, &sz_out);
1261 
1262 	if (rc < 0) {
1263 		/* not a valid compressed blob */
1264 		puts("uncompress_blob: Unable to uncompress\n");
1265 		if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC))
1266 			free(dst);
1267 		return -EBADMSG;
1268 	}
1269 	*dstp = dst;
1270 	return 0;
1271 }
1272 # else
1273 static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
1274 {
1275 	return -ENOTSUPP;
1276 }
1277 # endif
1278 #endif
1279 
1280 #if defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
1281 /*
1282  * For CONFIG_OF_SEPARATE, the board may optionally implement this to
1283  * provide and/or fixup the fdt.
1284  */
1285 __weak void *board_fdt_blob_setup(void)
1286 {
1287 	void *fdt_blob = NULL;
1288 #ifdef CONFIG_SPL_BUILD
1289 	/* FDT is at end of BSS unless it is in a different memory region */
1290 	if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS))
1291 		fdt_blob = (ulong *)&_image_binary_end;
1292 	else
1293 		fdt_blob = (ulong *)&__bss_end;
1294 #else
1295 	/* FDT is at end of image */
1296 	fdt_blob = (ulong *)&_end;
1297 #endif
1298 	return fdt_blob;
1299 }
1300 #endif
1301 
1302 int fdtdec_setup(void)
1303 {
1304 #if CONFIG_IS_ENABLED(OF_CONTROL)
1305 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
1306 	void *fdt_blob;
1307 # endif
1308 # ifdef CONFIG_OF_EMBED
1309 	/* Get a pointer to the FDT */
1310 #  ifdef CONFIG_SPL_BUILD
1311 	gd->fdt_blob = __dtb_dt_spl_begin;
1312 #  else
1313 	gd->fdt_blob = __dtb_dt_begin;
1314 #  endif
1315 # elif defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
1316 	/* Allow the board to override the fdt address. */
1317 	gd->fdt_blob = board_fdt_blob_setup();
1318 # elif defined(CONFIG_OF_HOSTFILE)
1319 	if (sandbox_read_fdt_from_file()) {
1320 		puts("Failed to read control FDT\n");
1321 		return -1;
1322 	}
1323 # endif
1324 # ifndef CONFIG_SPL_BUILD
1325 	/* Allow the early environment to override the fdt address */
1326 	gd->fdt_blob = (void *)env_get_ulong("fdtcontroladdr", 16,
1327 						(uintptr_t)gd->fdt_blob);
1328 # endif
1329 
1330 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
1331 	/*
1332 	 * Try and uncompress the blob.
1333 	 * Unfortunately there is no way to know how big the input blob really
1334 	 * is. So let us set the maximum input size arbitrarily high. 16MB
1335 	 * ought to be more than enough for packed DTBs.
1336 	 */
1337 	if (uncompress_blob(gd->fdt_blob, 0x1000000, &fdt_blob) == 0)
1338 		gd->fdt_blob = fdt_blob;
1339 
1340 	/*
1341 	 * Check if blob is a FIT images containings DTBs.
1342 	 * If so, pick the most relevant
1343 	 */
1344 	fdt_blob = locate_dtb_in_fit(gd->fdt_blob);
1345 	if (fdt_blob)
1346 		gd->fdt_blob = fdt_blob;
1347 # endif
1348 #endif
1349 
1350 	return fdtdec_prepare_fdt();
1351 }
1352 
1353 #endif /* !USE_HOSTCC */
1354