xref: /openbmc/u-boot/lib/fdtdec.c (revision 96c2961ba68e0baf463998301a09eddf76f462e6)
1  // SPDX-License-Identifier: GPL-2.0+
2  /*
3   * Copyright (c) 2011 The Chromium OS Authors.
4   */
5  
6  #ifndef USE_HOSTCC
7  #include <common.h>
8  #include <boot_fit.h>
9  #include <dm.h>
10  #include <dm/of_extra.h>
11  #include <errno.h>
12  #include <fdtdec.h>
13  #include <fdt_support.h>
14  #include <linux/libfdt.h>
15  #include <serial.h>
16  #include <asm/sections.h>
17  #include <linux/ctype.h>
18  #include <linux/lzo.h>
19  
20  DECLARE_GLOBAL_DATA_PTR;
21  
22  /*
23   * Here are the type we know about. One day we might allow drivers to
24   * register. For now we just put them here. The COMPAT macro allows us to
25   * turn this into a sparse list later, and keeps the ID with the name.
26   *
27   * NOTE: This list is basically a TODO list for things that need to be
28   * converted to driver model. So don't add new things here unless there is a
29   * good reason why driver-model conversion is infeasible. Examples include
30   * things which are used before driver model is available.
31   */
32  #define COMPAT(id, name) name
33  static const char * const compat_names[COMPAT_COUNT] = {
34  	COMPAT(UNKNOWN, "<none>"),
35  	COMPAT(NVIDIA_TEGRA20_EMC, "nvidia,tegra20-emc"),
36  	COMPAT(NVIDIA_TEGRA20_EMC_TABLE, "nvidia,tegra20-emc-table"),
37  	COMPAT(NVIDIA_TEGRA20_NAND, "nvidia,tegra20-nand"),
38  	COMPAT(NVIDIA_TEGRA124_XUSB_PADCTL, "nvidia,tegra124-xusb-padctl"),
39  	COMPAT(NVIDIA_TEGRA210_XUSB_PADCTL, "nvidia,tegra210-xusb-padctl"),
40  	COMPAT(SMSC_LAN9215, "smsc,lan9215"),
41  	COMPAT(SAMSUNG_EXYNOS5_SROMC, "samsung,exynos-sromc"),
42  	COMPAT(SAMSUNG_S3C2440_I2C, "samsung,s3c2440-i2c"),
43  	COMPAT(SAMSUNG_EXYNOS5_SOUND, "samsung,exynos-sound"),
44  	COMPAT(WOLFSON_WM8994_CODEC, "wolfson,wm8994-codec"),
45  	COMPAT(SAMSUNG_EXYNOS_USB_PHY, "samsung,exynos-usb-phy"),
46  	COMPAT(SAMSUNG_EXYNOS5_USB3_PHY, "samsung,exynos5250-usb3-phy"),
47  	COMPAT(SAMSUNG_EXYNOS_TMU, "samsung,exynos-tmu"),
48  	COMPAT(SAMSUNG_EXYNOS_MIPI_DSI, "samsung,exynos-mipi-dsi"),
49  	COMPAT(SAMSUNG_EXYNOS_DWMMC, "samsung,exynos-dwmmc"),
50  	COMPAT(SAMSUNG_EXYNOS_MMC, "samsung,exynos-mmc"),
51  	COMPAT(GENERIC_SPI_FLASH, "spi-flash"),
52  	COMPAT(MAXIM_98095_CODEC, "maxim,max98095-codec"),
53  	COMPAT(SAMSUNG_EXYNOS5_I2C, "samsung,exynos5-hsi2c"),
54  	COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"),
55  	COMPAT(INTEL_MICROCODE, "intel,microcode"),
56  	COMPAT(AMS_AS3722, "ams,as3722"),
57  	COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"),
58  	COMPAT(ALTERA_SOCFPGA_DWMAC, "altr,socfpga-stmmac"),
59  	COMPAT(ALTERA_SOCFPGA_DWMMC, "altr,socfpga-dw-mshc"),
60  	COMPAT(ALTERA_SOCFPGA_DWC2USB, "snps,dwc2"),
61  	COMPAT(INTEL_BAYTRAIL_FSP, "intel,baytrail-fsp"),
62  	COMPAT(INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"),
63  	COMPAT(INTEL_IVYBRIDGE_FSP, "intel,ivybridge-fsp"),
64  	COMPAT(COMPAT_SUNXI_NAND, "allwinner,sun4i-a10-nand"),
65  	COMPAT(ALTERA_SOCFPGA_CLK, "altr,clk-mgr"),
66  	COMPAT(ALTERA_SOCFPGA_PINCTRL_SINGLE, "pinctrl-single"),
67  	COMPAT(ALTERA_SOCFPGA_H2F_BRG, "altr,socfpga-hps2fpga-bridge"),
68  	COMPAT(ALTERA_SOCFPGA_LWH2F_BRG, "altr,socfpga-lwhps2fpga-bridge"),
69  	COMPAT(ALTERA_SOCFPGA_F2H_BRG, "altr,socfpga-fpga2hps-bridge"),
70  	COMPAT(ALTERA_SOCFPGA_F2SDR0, "altr,socfpga-fpga2sdram0-bridge"),
71  	COMPAT(ALTERA_SOCFPGA_F2SDR1, "altr,socfpga-fpga2sdram1-bridge"),
72  	COMPAT(ALTERA_SOCFPGA_F2SDR2, "altr,socfpga-fpga2sdram2-bridge"),
73  	COMPAT(ALTERA_SOCFPGA_FPGA0, "altr,socfpga-a10-fpga-mgr"),
74  	COMPAT(ALTERA_SOCFPGA_NOC, "altr,socfpga-a10-noc"),
75  	COMPAT(ALTERA_SOCFPGA_CLK_INIT, "altr,socfpga-a10-clk-init")
76  };
77  
78  const char *fdtdec_get_compatible(enum fdt_compat_id id)
79  {
80  	/* We allow reading of the 'unknown' ID for testing purposes */
81  	assert(id >= 0 && id < COMPAT_COUNT);
82  	return compat_names[id];
83  }
84  
85  fdt_addr_t fdtdec_get_addr_size_fixed(const void *blob, int node,
86  				      const char *prop_name, int index, int na,
87  				      int ns, fdt_size_t *sizep,
88  				      bool translate)
89  {
90  	const fdt32_t *prop, *prop_end;
91  	const fdt32_t *prop_addr, *prop_size, *prop_after_size;
92  	int len;
93  	fdt_addr_t addr;
94  
95  	debug("%s: %s: ", __func__, prop_name);
96  
97  	if (na > (sizeof(fdt_addr_t) / sizeof(fdt32_t))) {
98  		debug("(na too large for fdt_addr_t type)\n");
99  		return FDT_ADDR_T_NONE;
100  	}
101  
102  	if (ns > (sizeof(fdt_size_t) / sizeof(fdt32_t))) {
103  		debug("(ns too large for fdt_size_t type)\n");
104  		return FDT_ADDR_T_NONE;
105  	}
106  
107  	prop = fdt_getprop(blob, node, prop_name, &len);
108  	if (!prop) {
109  		debug("(not found)\n");
110  		return FDT_ADDR_T_NONE;
111  	}
112  	prop_end = prop + (len / sizeof(*prop));
113  
114  	prop_addr = prop + (index * (na + ns));
115  	prop_size = prop_addr + na;
116  	prop_after_size = prop_size + ns;
117  	if (prop_after_size > prop_end) {
118  		debug("(not enough data: expected >= %d cells, got %d cells)\n",
119  		      (u32)(prop_after_size - prop), ((u32)(prop_end - prop)));
120  		return FDT_ADDR_T_NONE;
121  	}
122  
123  #if CONFIG_IS_ENABLED(OF_TRANSLATE)
124  	if (translate)
125  		addr = fdt_translate_address(blob, node, prop_addr);
126  	else
127  #endif
128  		addr = fdtdec_get_number(prop_addr, na);
129  
130  	if (sizep) {
131  		*sizep = fdtdec_get_number(prop_size, ns);
132  		debug("addr=%08llx, size=%llx\n", (unsigned long long)addr,
133  		      (unsigned long long)*sizep);
134  	} else {
135  		debug("addr=%08llx\n", (unsigned long long)addr);
136  	}
137  
138  	return addr;
139  }
140  
141  fdt_addr_t fdtdec_get_addr_size_auto_parent(const void *blob, int parent,
142  					    int node, const char *prop_name,
143  					    int index, fdt_size_t *sizep,
144  					    bool translate)
145  {
146  	int na, ns;
147  
148  	debug("%s: ", __func__);
149  
150  	na = fdt_address_cells(blob, parent);
151  	if (na < 1) {
152  		debug("(bad #address-cells)\n");
153  		return FDT_ADDR_T_NONE;
154  	}
155  
156  	ns = fdt_size_cells(blob, parent);
157  	if (ns < 0) {
158  		debug("(bad #size-cells)\n");
159  		return FDT_ADDR_T_NONE;
160  	}
161  
162  	debug("na=%d, ns=%d, ", na, ns);
163  
164  	return fdtdec_get_addr_size_fixed(blob, node, prop_name, index, na,
165  					  ns, sizep, translate);
166  }
167  
168  fdt_addr_t fdtdec_get_addr_size_auto_noparent(const void *blob, int node,
169  					      const char *prop_name, int index,
170  					      fdt_size_t *sizep,
171  					      bool translate)
172  {
173  	int parent;
174  
175  	debug("%s: ", __func__);
176  
177  	parent = fdt_parent_offset(blob, node);
178  	if (parent < 0) {
179  		debug("(no parent found)\n");
180  		return FDT_ADDR_T_NONE;
181  	}
182  
183  	return fdtdec_get_addr_size_auto_parent(blob, parent, node, prop_name,
184  						index, sizep, translate);
185  }
186  
187  fdt_addr_t fdtdec_get_addr_size(const void *blob, int node,
188  				const char *prop_name, fdt_size_t *sizep)
189  {
190  	int ns = sizep ? (sizeof(fdt_size_t) / sizeof(fdt32_t)) : 0;
191  
192  	return fdtdec_get_addr_size_fixed(blob, node, prop_name, 0,
193  					  sizeof(fdt_addr_t) / sizeof(fdt32_t),
194  					  ns, sizep, false);
195  }
196  
197  fdt_addr_t fdtdec_get_addr(const void *blob, int node, const char *prop_name)
198  {
199  	return fdtdec_get_addr_size(blob, node, prop_name, NULL);
200  }
201  
202  #if defined(CONFIG_PCI) && defined(CONFIG_DM_PCI)
203  int fdtdec_get_pci_addr(const void *blob, int node, enum fdt_pci_space type,
204  			const char *prop_name, struct fdt_pci_addr *addr)
205  {
206  	const u32 *cell;
207  	int len;
208  	int ret = -ENOENT;
209  
210  	debug("%s: %s: ", __func__, prop_name);
211  
212  	/*
213  	 * If we follow the pci bus bindings strictly, we should check
214  	 * the value of the node's parent node's #address-cells and
215  	 * #size-cells. They need to be 3 and 2 accordingly. However,
216  	 * for simplicity we skip the check here.
217  	 */
218  	cell = fdt_getprop(blob, node, prop_name, &len);
219  	if (!cell)
220  		goto fail;
221  
222  	if ((len % FDT_PCI_REG_SIZE) == 0) {
223  		int num = len / FDT_PCI_REG_SIZE;
224  		int i;
225  
226  		for (i = 0; i < num; i++) {
227  			debug("pci address #%d: %08lx %08lx %08lx\n", i,
228  			      (ulong)fdt32_to_cpu(cell[0]),
229  			      (ulong)fdt32_to_cpu(cell[1]),
230  			      (ulong)fdt32_to_cpu(cell[2]));
231  			if ((fdt32_to_cpu(*cell) & type) == type) {
232  				addr->phys_hi = fdt32_to_cpu(cell[0]);
233  				addr->phys_mid = fdt32_to_cpu(cell[1]);
234  				addr->phys_lo = fdt32_to_cpu(cell[1]);
235  				break;
236  			}
237  
238  			cell += (FDT_PCI_ADDR_CELLS +
239  				 FDT_PCI_SIZE_CELLS);
240  		}
241  
242  		if (i == num) {
243  			ret = -ENXIO;
244  			goto fail;
245  		}
246  
247  		return 0;
248  	}
249  
250  	ret = -EINVAL;
251  
252  fail:
253  	debug("(not found)\n");
254  	return ret;
255  }
256  
257  int fdtdec_get_pci_vendev(const void *blob, int node, u16 *vendor, u16 *device)
258  {
259  	const char *list, *end;
260  	int len;
261  
262  	list = fdt_getprop(blob, node, "compatible", &len);
263  	if (!list)
264  		return -ENOENT;
265  
266  	end = list + len;
267  	while (list < end) {
268  		len = strlen(list);
269  		if (len >= strlen("pciVVVV,DDDD")) {
270  			char *s = strstr(list, "pci");
271  
272  			/*
273  			 * check if the string is something like pciVVVV,DDDD.RR
274  			 * or just pciVVVV,DDDD
275  			 */
276  			if (s && s[7] == ',' &&
277  			    (s[12] == '.' || s[12] == 0)) {
278  				s += 3;
279  				*vendor = simple_strtol(s, NULL, 16);
280  
281  				s += 5;
282  				*device = simple_strtol(s, NULL, 16);
283  
284  				return 0;
285  			}
286  		}
287  		list += (len + 1);
288  	}
289  
290  	return -ENOENT;
291  }
292  
293  int fdtdec_get_pci_bar32(struct udevice *dev, struct fdt_pci_addr *addr,
294  			 u32 *bar)
295  {
296  	int barnum;
297  
298  	/* extract the bar number from fdt_pci_addr */
299  	barnum = addr->phys_hi & 0xff;
300  	if (barnum < PCI_BASE_ADDRESS_0 || barnum > PCI_CARDBUS_CIS)
301  		return -EINVAL;
302  
303  	barnum = (barnum - PCI_BASE_ADDRESS_0) / 4;
304  	*bar = dm_pci_read_bar32(dev, barnum);
305  
306  	return 0;
307  }
308  #endif
309  
310  uint64_t fdtdec_get_uint64(const void *blob, int node, const char *prop_name,
311  			   uint64_t default_val)
312  {
313  	const uint64_t *cell64;
314  	int length;
315  
316  	cell64 = fdt_getprop(blob, node, prop_name, &length);
317  	if (!cell64 || length < sizeof(*cell64))
318  		return default_val;
319  
320  	return fdt64_to_cpu(*cell64);
321  }
322  
323  int fdtdec_get_is_enabled(const void *blob, int node)
324  {
325  	const char *cell;
326  
327  	/*
328  	 * It should say "okay", so only allow that. Some fdts use "ok" but
329  	 * this is a bug. Please fix your device tree source file. See here
330  	 * for discussion:
331  	 *
332  	 * http://www.mail-archive.com/u-boot@lists.denx.de/msg71598.html
333  	 */
334  	cell = fdt_getprop(blob, node, "status", NULL);
335  	if (cell)
336  		return strcmp(cell, "okay") == 0;
337  	return 1;
338  }
339  
340  enum fdt_compat_id fdtdec_lookup(const void *blob, int node)
341  {
342  	enum fdt_compat_id id;
343  
344  	/* Search our drivers */
345  	for (id = COMPAT_UNKNOWN; id < COMPAT_COUNT; id++)
346  		if (fdt_node_check_compatible(blob, node,
347  					      compat_names[id]) == 0)
348  			return id;
349  	return COMPAT_UNKNOWN;
350  }
351  
352  int fdtdec_next_compatible(const void *blob, int node, enum fdt_compat_id id)
353  {
354  	return fdt_node_offset_by_compatible(blob, node, compat_names[id]);
355  }
356  
357  int fdtdec_next_compatible_subnode(const void *blob, int node,
358  				   enum fdt_compat_id id, int *depthp)
359  {
360  	do {
361  		node = fdt_next_node(blob, node, depthp);
362  	} while (*depthp > 1);
363  
364  	/* If this is a direct subnode, and compatible, return it */
365  	if (*depthp == 1 && 0 == fdt_node_check_compatible(
366  						blob, node, compat_names[id]))
367  		return node;
368  
369  	return -FDT_ERR_NOTFOUND;
370  }
371  
372  int fdtdec_next_alias(const void *blob, const char *name, enum fdt_compat_id id,
373  		      int *upto)
374  {
375  #define MAX_STR_LEN 20
376  	char str[MAX_STR_LEN + 20];
377  	int node, err;
378  
379  	/* snprintf() is not available */
380  	assert(strlen(name) < MAX_STR_LEN);
381  	sprintf(str, "%.*s%d", MAX_STR_LEN, name, *upto);
382  	node = fdt_path_offset(blob, str);
383  	if (node < 0)
384  		return node;
385  	err = fdt_node_check_compatible(blob, node, compat_names[id]);
386  	if (err < 0)
387  		return err;
388  	if (err)
389  		return -FDT_ERR_NOTFOUND;
390  	(*upto)++;
391  	return node;
392  }
393  
394  int fdtdec_find_aliases_for_id(const void *blob, const char *name,
395  			       enum fdt_compat_id id, int *node_list,
396  			       int maxcount)
397  {
398  	memset(node_list, '\0', sizeof(*node_list) * maxcount);
399  
400  	return fdtdec_add_aliases_for_id(blob, name, id, node_list, maxcount);
401  }
402  
403  /* TODO: Can we tighten this code up a little? */
404  int fdtdec_add_aliases_for_id(const void *blob, const char *name,
405  			      enum fdt_compat_id id, int *node_list,
406  			      int maxcount)
407  {
408  	int name_len = strlen(name);
409  	int nodes[maxcount];
410  	int num_found = 0;
411  	int offset, node;
412  	int alias_node;
413  	int count;
414  	int i, j;
415  
416  	/* find the alias node if present */
417  	alias_node = fdt_path_offset(blob, "/aliases");
418  
419  	/*
420  	 * start with nothing, and we can assume that the root node can't
421  	 * match
422  	 */
423  	memset(nodes, '\0', sizeof(nodes));
424  
425  	/* First find all the compatible nodes */
426  	for (node = count = 0; node >= 0 && count < maxcount;) {
427  		node = fdtdec_next_compatible(blob, node, id);
428  		if (node >= 0)
429  			nodes[count++] = node;
430  	}
431  	if (node >= 0)
432  		debug("%s: warning: maxcount exceeded with alias '%s'\n",
433  		      __func__, name);
434  
435  	/* Now find all the aliases */
436  	for (offset = fdt_first_property_offset(blob, alias_node);
437  			offset > 0;
438  			offset = fdt_next_property_offset(blob, offset)) {
439  		const struct fdt_property *prop;
440  		const char *path;
441  		int number;
442  		int found;
443  
444  		node = 0;
445  		prop = fdt_get_property_by_offset(blob, offset, NULL);
446  		path = fdt_string(blob, fdt32_to_cpu(prop->nameoff));
447  		if (prop->len && 0 == strncmp(path, name, name_len))
448  			node = fdt_path_offset(blob, prop->data);
449  		if (node <= 0)
450  			continue;
451  
452  		/* Get the alias number */
453  		number = simple_strtoul(path + name_len, NULL, 10);
454  		if (number < 0 || number >= maxcount) {
455  			debug("%s: warning: alias '%s' is out of range\n",
456  			      __func__, path);
457  			continue;
458  		}
459  
460  		/* Make sure the node we found is actually in our list! */
461  		found = -1;
462  		for (j = 0; j < count; j++)
463  			if (nodes[j] == node) {
464  				found = j;
465  				break;
466  			}
467  
468  		if (found == -1) {
469  			debug("%s: warning: alias '%s' points to a node "
470  				"'%s' that is missing or is not compatible "
471  				" with '%s'\n", __func__, path,
472  				fdt_get_name(blob, node, NULL),
473  			       compat_names[id]);
474  			continue;
475  		}
476  
477  		/*
478  		 * Add this node to our list in the right place, and mark
479  		 * it as done.
480  		 */
481  		if (fdtdec_get_is_enabled(blob, node)) {
482  			if (node_list[number]) {
483  				debug("%s: warning: alias '%s' requires that "
484  				      "a node be placed in the list in a "
485  				      "position which is already filled by "
486  				      "node '%s'\n", __func__, path,
487  				      fdt_get_name(blob, node, NULL));
488  				continue;
489  			}
490  			node_list[number] = node;
491  			if (number >= num_found)
492  				num_found = number + 1;
493  		}
494  		nodes[found] = 0;
495  	}
496  
497  	/* Add any nodes not mentioned by an alias */
498  	for (i = j = 0; i < maxcount; i++) {
499  		if (!node_list[i]) {
500  			for (; j < maxcount; j++)
501  				if (nodes[j] &&
502  				    fdtdec_get_is_enabled(blob, nodes[j]))
503  					break;
504  
505  			/* Have we run out of nodes to add? */
506  			if (j == maxcount)
507  				break;
508  
509  			assert(!node_list[i]);
510  			node_list[i] = nodes[j++];
511  			if (i >= num_found)
512  				num_found = i + 1;
513  		}
514  	}
515  
516  	return num_found;
517  }
518  
519  int fdtdec_get_alias_seq(const void *blob, const char *base, int offset,
520  			 int *seqp)
521  {
522  	int base_len = strlen(base);
523  	const char *find_name;
524  	int find_namelen;
525  	int prop_offset;
526  	int aliases;
527  
528  	find_name = fdt_get_name(blob, offset, &find_namelen);
529  	debug("Looking for '%s' at %d, name %s\n", base, offset, find_name);
530  
531  	aliases = fdt_path_offset(blob, "/aliases");
532  	for (prop_offset = fdt_first_property_offset(blob, aliases);
533  	     prop_offset > 0;
534  	     prop_offset = fdt_next_property_offset(blob, prop_offset)) {
535  		const char *prop;
536  		const char *name;
537  		const char *slash;
538  		int len, val;
539  
540  		prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
541  		debug("   - %s, %s\n", name, prop);
542  		if (len < find_namelen || *prop != '/' || prop[len - 1] ||
543  		    strncmp(name, base, base_len))
544  			continue;
545  
546  		slash = strrchr(prop, '/');
547  		if (strcmp(slash + 1, find_name))
548  			continue;
549  		val = trailing_strtol(name);
550  		if (val != -1) {
551  			*seqp = val;
552  			debug("Found seq %d\n", *seqp);
553  			return 0;
554  		}
555  	}
556  
557  	debug("Not found\n");
558  	return -ENOENT;
559  }
560  
561  const char *fdtdec_get_chosen_prop(const void *blob, const char *name)
562  {
563  	int chosen_node;
564  
565  	if (!blob)
566  		return NULL;
567  	chosen_node = fdt_path_offset(blob, "/chosen");
568  	return fdt_getprop(blob, chosen_node, name, NULL);
569  }
570  
571  int fdtdec_get_chosen_node(const void *blob, const char *name)
572  {
573  	const char *prop;
574  
575  	prop = fdtdec_get_chosen_prop(blob, name);
576  	if (!prop)
577  		return -FDT_ERR_NOTFOUND;
578  	return fdt_path_offset(blob, prop);
579  }
580  
581  int fdtdec_check_fdt(void)
582  {
583  	/*
584  	 * We must have an FDT, but we cannot panic() yet since the console
585  	 * is not ready. So for now, just assert(). Boards which need an early
586  	 * FDT (prior to console ready) will need to make their own
587  	 * arrangements and do their own checks.
588  	 */
589  	assert(!fdtdec_prepare_fdt());
590  	return 0;
591  }
592  
593  /*
594   * This function is a little odd in that it accesses global data. At some
595   * point if the architecture board.c files merge this will make more sense.
596   * Even now, it is common code.
597   */
598  int fdtdec_prepare_fdt(void)
599  {
600  	if (!gd->fdt_blob || ((uintptr_t)gd->fdt_blob & 3) ||
601  	    fdt_check_header(gd->fdt_blob)) {
602  #ifdef CONFIG_SPL_BUILD
603  		puts("Missing DTB\n");
604  #else
605  		puts("No valid device tree binary found - please append one to U-Boot binary, use u-boot-dtb.bin or define CONFIG_OF_EMBED. For sandbox, use -d <file.dtb>\n");
606  # ifdef DEBUG
607  		if (gd->fdt_blob) {
608  			printf("fdt_blob=%p\n", gd->fdt_blob);
609  			print_buffer((ulong)gd->fdt_blob, gd->fdt_blob, 4,
610  				     32, 0);
611  		}
612  # endif
613  #endif
614  		return -1;
615  	}
616  	return 0;
617  }
618  
619  int fdtdec_lookup_phandle(const void *blob, int node, const char *prop_name)
620  {
621  	const u32 *phandle;
622  	int lookup;
623  
624  	debug("%s: %s\n", __func__, prop_name);
625  	phandle = fdt_getprop(blob, node, prop_name, NULL);
626  	if (!phandle)
627  		return -FDT_ERR_NOTFOUND;
628  
629  	lookup = fdt_node_offset_by_phandle(blob, fdt32_to_cpu(*phandle));
630  	return lookup;
631  }
632  
633  /**
634   * Look up a property in a node and check that it has a minimum length.
635   *
636   * @param blob		FDT blob
637   * @param node		node to examine
638   * @param prop_name	name of property to find
639   * @param min_len	minimum property length in bytes
640   * @param err		0 if ok, or -FDT_ERR_NOTFOUND if the property is not
641  			found, or -FDT_ERR_BADLAYOUT if not enough data
642   * @return pointer to cell, which is only valid if err == 0
643   */
644  static const void *get_prop_check_min_len(const void *blob, int node,
645  					  const char *prop_name, int min_len,
646  					  int *err)
647  {
648  	const void *cell;
649  	int len;
650  
651  	debug("%s: %s\n", __func__, prop_name);
652  	cell = fdt_getprop(blob, node, prop_name, &len);
653  	if (!cell)
654  		*err = -FDT_ERR_NOTFOUND;
655  	else if (len < min_len)
656  		*err = -FDT_ERR_BADLAYOUT;
657  	else
658  		*err = 0;
659  	return cell;
660  }
661  
662  int fdtdec_get_int_array(const void *blob, int node, const char *prop_name,
663  			 u32 *array, int count)
664  {
665  	const u32 *cell;
666  	int err = 0;
667  
668  	debug("%s: %s\n", __func__, prop_name);
669  	cell = get_prop_check_min_len(blob, node, prop_name,
670  				      sizeof(u32) * count, &err);
671  	if (!err) {
672  		int i;
673  
674  		for (i = 0; i < count; i++)
675  			array[i] = fdt32_to_cpu(cell[i]);
676  	}
677  	return err;
678  }
679  
680  int fdtdec_get_int_array_count(const void *blob, int node,
681  			       const char *prop_name, u32 *array, int count)
682  {
683  	const u32 *cell;
684  	int len, elems;
685  	int i;
686  
687  	debug("%s: %s\n", __func__, prop_name);
688  	cell = fdt_getprop(blob, node, prop_name, &len);
689  	if (!cell)
690  		return -FDT_ERR_NOTFOUND;
691  	elems = len / sizeof(u32);
692  	if (count > elems)
693  		count = elems;
694  	for (i = 0; i < count; i++)
695  		array[i] = fdt32_to_cpu(cell[i]);
696  
697  	return count;
698  }
699  
700  const u32 *fdtdec_locate_array(const void *blob, int node,
701  			       const char *prop_name, int count)
702  {
703  	const u32 *cell;
704  	int err;
705  
706  	cell = get_prop_check_min_len(blob, node, prop_name,
707  				      sizeof(u32) * count, &err);
708  	return err ? NULL : cell;
709  }
710  
711  int fdtdec_get_bool(const void *blob, int node, const char *prop_name)
712  {
713  	const s32 *cell;
714  	int len;
715  
716  	debug("%s: %s\n", __func__, prop_name);
717  	cell = fdt_getprop(blob, node, prop_name, &len);
718  	return cell != NULL;
719  }
720  
721  int fdtdec_parse_phandle_with_args(const void *blob, int src_node,
722  				   const char *list_name,
723  				   const char *cells_name,
724  				   int cell_count, int index,
725  				   struct fdtdec_phandle_args *out_args)
726  {
727  	const __be32 *list, *list_end;
728  	int rc = 0, size, cur_index = 0;
729  	uint32_t count = 0;
730  	int node = -1;
731  	int phandle;
732  
733  	/* Retrieve the phandle list property */
734  	list = fdt_getprop(blob, src_node, list_name, &size);
735  	if (!list)
736  		return -ENOENT;
737  	list_end = list + size / sizeof(*list);
738  
739  	/* Loop over the phandles until all the requested entry is found */
740  	while (list < list_end) {
741  		rc = -EINVAL;
742  		count = 0;
743  
744  		/*
745  		 * If phandle is 0, then it is an empty entry with no
746  		 * arguments.  Skip forward to the next entry.
747  		 */
748  		phandle = be32_to_cpup(list++);
749  		if (phandle) {
750  			/*
751  			 * Find the provider node and parse the #*-cells
752  			 * property to determine the argument length.
753  			 *
754  			 * This is not needed if the cell count is hard-coded
755  			 * (i.e. cells_name not set, but cell_count is set),
756  			 * except when we're going to return the found node
757  			 * below.
758  			 */
759  			if (cells_name || cur_index == index) {
760  				node = fdt_node_offset_by_phandle(blob,
761  								  phandle);
762  				if (!node) {
763  					debug("%s: could not find phandle\n",
764  					      fdt_get_name(blob, src_node,
765  							   NULL));
766  					goto err;
767  				}
768  			}
769  
770  			if (cells_name) {
771  				count = fdtdec_get_int(blob, node, cells_name,
772  						       -1);
773  				if (count == -1) {
774  					debug("%s: could not get %s for %s\n",
775  					      fdt_get_name(blob, src_node,
776  							   NULL),
777  					      cells_name,
778  					      fdt_get_name(blob, node,
779  							   NULL));
780  					goto err;
781  				}
782  			} else {
783  				count = cell_count;
784  			}
785  
786  			/*
787  			 * Make sure that the arguments actually fit in the
788  			 * remaining property data length
789  			 */
790  			if (list + count > list_end) {
791  				debug("%s: arguments longer than property\n",
792  				      fdt_get_name(blob, src_node, NULL));
793  				goto err;
794  			}
795  		}
796  
797  		/*
798  		 * All of the error cases above bail out of the loop, so at
799  		 * this point, the parsing is successful. If the requested
800  		 * index matches, then fill the out_args structure and return,
801  		 * or return -ENOENT for an empty entry.
802  		 */
803  		rc = -ENOENT;
804  		if (cur_index == index) {
805  			if (!phandle)
806  				goto err;
807  
808  			if (out_args) {
809  				int i;
810  
811  				if (count > MAX_PHANDLE_ARGS) {
812  					debug("%s: too many arguments %d\n",
813  					      fdt_get_name(blob, src_node,
814  							   NULL), count);
815  					count = MAX_PHANDLE_ARGS;
816  				}
817  				out_args->node = node;
818  				out_args->args_count = count;
819  				for (i = 0; i < count; i++) {
820  					out_args->args[i] =
821  							be32_to_cpup(list++);
822  				}
823  			}
824  
825  			/* Found it! return success */
826  			return 0;
827  		}
828  
829  		node = -1;
830  		list += count;
831  		cur_index++;
832  	}
833  
834  	/*
835  	 * Result will be one of:
836  	 * -ENOENT : index is for empty phandle
837  	 * -EINVAL : parsing error on data
838  	 * [1..n]  : Number of phandle (count mode; when index = -1)
839  	 */
840  	rc = index < 0 ? cur_index : -ENOENT;
841   err:
842  	return rc;
843  }
844  
845  int fdtdec_get_child_count(const void *blob, int node)
846  {
847  	int subnode;
848  	int num = 0;
849  
850  	fdt_for_each_subnode(subnode, blob, node)
851  		num++;
852  
853  	return num;
854  }
855  
856  int fdtdec_get_byte_array(const void *blob, int node, const char *prop_name,
857  			  u8 *array, int count)
858  {
859  	const u8 *cell;
860  	int err;
861  
862  	cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
863  	if (!err)
864  		memcpy(array, cell, count);
865  	return err;
866  }
867  
868  const u8 *fdtdec_locate_byte_array(const void *blob, int node,
869  				   const char *prop_name, int count)
870  {
871  	const u8 *cell;
872  	int err;
873  
874  	cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
875  	if (err)
876  		return NULL;
877  	return cell;
878  }
879  
880  int fdtdec_get_config_int(const void *blob, const char *prop_name,
881  			  int default_val)
882  {
883  	int config_node;
884  
885  	debug("%s: %s\n", __func__, prop_name);
886  	config_node = fdt_path_offset(blob, "/config");
887  	if (config_node < 0)
888  		return default_val;
889  	return fdtdec_get_int(blob, config_node, prop_name, default_val);
890  }
891  
892  int fdtdec_get_config_bool(const void *blob, const char *prop_name)
893  {
894  	int config_node;
895  	const void *prop;
896  
897  	debug("%s: %s\n", __func__, prop_name);
898  	config_node = fdt_path_offset(blob, "/config");
899  	if (config_node < 0)
900  		return 0;
901  	prop = fdt_get_property(blob, config_node, prop_name, NULL);
902  
903  	return prop != NULL;
904  }
905  
906  char *fdtdec_get_config_string(const void *blob, const char *prop_name)
907  {
908  	const char *nodep;
909  	int nodeoffset;
910  	int len;
911  
912  	debug("%s: %s\n", __func__, prop_name);
913  	nodeoffset = fdt_path_offset(blob, "/config");
914  	if (nodeoffset < 0)
915  		return NULL;
916  
917  	nodep = fdt_getprop(blob, nodeoffset, prop_name, &len);
918  	if (!nodep)
919  		return NULL;
920  
921  	return (char *)nodep;
922  }
923  
924  u64 fdtdec_get_number(const fdt32_t *ptr, unsigned int cells)
925  {
926  	u64 number = 0;
927  
928  	while (cells--)
929  		number = (number << 32) | fdt32_to_cpu(*ptr++);
930  
931  	return number;
932  }
933  
934  int fdt_get_resource(const void *fdt, int node, const char *property,
935  		     unsigned int index, struct fdt_resource *res)
936  {
937  	const fdt32_t *ptr, *end;
938  	int na, ns, len, parent;
939  	unsigned int i = 0;
940  
941  	parent = fdt_parent_offset(fdt, node);
942  	if (parent < 0)
943  		return parent;
944  
945  	na = fdt_address_cells(fdt, parent);
946  	ns = fdt_size_cells(fdt, parent);
947  
948  	ptr = fdt_getprop(fdt, node, property, &len);
949  	if (!ptr)
950  		return len;
951  
952  	end = ptr + len / sizeof(*ptr);
953  
954  	while (ptr + na + ns <= end) {
955  		if (i == index) {
956  			res->start = fdtdec_get_number(ptr, na);
957  			res->end = res->start;
958  			res->end += fdtdec_get_number(&ptr[na], ns) - 1;
959  			return 0;
960  		}
961  
962  		ptr += na + ns;
963  		i++;
964  	}
965  
966  	return -FDT_ERR_NOTFOUND;
967  }
968  
969  int fdt_get_named_resource(const void *fdt, int node, const char *property,
970  			   const char *prop_names, const char *name,
971  			   struct fdt_resource *res)
972  {
973  	int index;
974  
975  	index = fdt_stringlist_search(fdt, node, prop_names, name);
976  	if (index < 0)
977  		return index;
978  
979  	return fdt_get_resource(fdt, node, property, index, res);
980  }
981  
982  static int decode_timing_property(const void *blob, int node, const char *name,
983  				  struct timing_entry *result)
984  {
985  	int length, ret = 0;
986  	const u32 *prop;
987  
988  	prop = fdt_getprop(blob, node, name, &length);
989  	if (!prop) {
990  		debug("%s: could not find property %s\n",
991  		      fdt_get_name(blob, node, NULL), name);
992  		return length;
993  	}
994  
995  	if (length == sizeof(u32)) {
996  		result->typ = fdtdec_get_int(blob, node, name, 0);
997  		result->min = result->typ;
998  		result->max = result->typ;
999  	} else {
1000  		ret = fdtdec_get_int_array(blob, node, name, &result->min, 3);
1001  	}
1002  
1003  	return ret;
1004  }
1005  
1006  int fdtdec_decode_display_timing(const void *blob, int parent, int index,
1007  				 struct display_timing *dt)
1008  {
1009  	int i, node, timings_node;
1010  	u32 val = 0;
1011  	int ret = 0;
1012  
1013  	timings_node = fdt_subnode_offset(blob, parent, "display-timings");
1014  	if (timings_node < 0)
1015  		return timings_node;
1016  
1017  	for (i = 0, node = fdt_first_subnode(blob, timings_node);
1018  	     node > 0 && i != index;
1019  	     node = fdt_next_subnode(blob, node))
1020  		i++;
1021  
1022  	if (node < 0)
1023  		return node;
1024  
1025  	memset(dt, 0, sizeof(*dt));
1026  
1027  	ret |= decode_timing_property(blob, node, "hback-porch",
1028  				      &dt->hback_porch);
1029  	ret |= decode_timing_property(blob, node, "hfront-porch",
1030  				      &dt->hfront_porch);
1031  	ret |= decode_timing_property(blob, node, "hactive", &dt->hactive);
1032  	ret |= decode_timing_property(blob, node, "hsync-len", &dt->hsync_len);
1033  	ret |= decode_timing_property(blob, node, "vback-porch",
1034  				      &dt->vback_porch);
1035  	ret |= decode_timing_property(blob, node, "vfront-porch",
1036  				      &dt->vfront_porch);
1037  	ret |= decode_timing_property(blob, node, "vactive", &dt->vactive);
1038  	ret |= decode_timing_property(blob, node, "vsync-len", &dt->vsync_len);
1039  	ret |= decode_timing_property(blob, node, "clock-frequency",
1040  				      &dt->pixelclock);
1041  
1042  	dt->flags = 0;
1043  	val = fdtdec_get_int(blob, node, "vsync-active", -1);
1044  	if (val != -1) {
1045  		dt->flags |= val ? DISPLAY_FLAGS_VSYNC_HIGH :
1046  				DISPLAY_FLAGS_VSYNC_LOW;
1047  	}
1048  	val = fdtdec_get_int(blob, node, "hsync-active", -1);
1049  	if (val != -1) {
1050  		dt->flags |= val ? DISPLAY_FLAGS_HSYNC_HIGH :
1051  				DISPLAY_FLAGS_HSYNC_LOW;
1052  	}
1053  	val = fdtdec_get_int(blob, node, "de-active", -1);
1054  	if (val != -1) {
1055  		dt->flags |= val ? DISPLAY_FLAGS_DE_HIGH :
1056  				DISPLAY_FLAGS_DE_LOW;
1057  	}
1058  	val = fdtdec_get_int(blob, node, "pixelclk-active", -1);
1059  	if (val != -1) {
1060  		dt->flags |= val ? DISPLAY_FLAGS_PIXDATA_POSEDGE :
1061  				DISPLAY_FLAGS_PIXDATA_NEGEDGE;
1062  	}
1063  
1064  	if (fdtdec_get_bool(blob, node, "interlaced"))
1065  		dt->flags |= DISPLAY_FLAGS_INTERLACED;
1066  	if (fdtdec_get_bool(blob, node, "doublescan"))
1067  		dt->flags |= DISPLAY_FLAGS_DOUBLESCAN;
1068  	if (fdtdec_get_bool(blob, node, "doubleclk"))
1069  		dt->flags |= DISPLAY_FLAGS_DOUBLECLK;
1070  
1071  	return ret;
1072  }
1073  
1074  int fdtdec_setup_mem_size_base(void)
1075  {
1076  	int ret, mem;
1077  	struct fdt_resource res;
1078  
1079  	mem = fdt_path_offset(gd->fdt_blob, "/memory");
1080  	if (mem < 0) {
1081  		debug("%s: Missing /memory node\n", __func__);
1082  		return -EINVAL;
1083  	}
1084  
1085  	ret = fdt_get_resource(gd->fdt_blob, mem, "reg", 0, &res);
1086  	if (ret != 0) {
1087  		debug("%s: Unable to decode first memory bank\n", __func__);
1088  		return -EINVAL;
1089  	}
1090  
1091  	gd->ram_size = (phys_size_t)(res.end - res.start + 1);
1092  	gd->ram_base = (unsigned long)res.start;
1093  	debug("%s: Initial DRAM size %llx\n", __func__,
1094  	      (unsigned long long)gd->ram_size);
1095  
1096  	return 0;
1097  }
1098  
1099  #if defined(CONFIG_NR_DRAM_BANKS)
1100  
1101  static int get_next_memory_node(const void *blob, int mem)
1102  {
1103  	do {
1104  		mem = fdt_node_offset_by_prop_value(gd->fdt_blob, mem,
1105  						    "device_type", "memory", 7);
1106  	} while (!fdtdec_get_is_enabled(blob, mem));
1107  
1108  	return mem;
1109  }
1110  
1111  int fdtdec_setup_memory_banksize(void)
1112  {
1113  	int bank, ret, mem, reg = 0;
1114  	struct fdt_resource res;
1115  
1116  	mem = get_next_memory_node(gd->fdt_blob, -1);
1117  	if (mem < 0) {
1118  		debug("%s: Missing /memory node\n", __func__);
1119  		return -EINVAL;
1120  	}
1121  
1122  	for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
1123  		ret = fdt_get_resource(gd->fdt_blob, mem, "reg", reg++, &res);
1124  		if (ret == -FDT_ERR_NOTFOUND) {
1125  			reg = 0;
1126  			mem = get_next_memory_node(gd->fdt_blob, mem);
1127  			if (mem == -FDT_ERR_NOTFOUND)
1128  				break;
1129  
1130  			ret = fdt_get_resource(gd->fdt_blob, mem, "reg", reg++, &res);
1131  			if (ret == -FDT_ERR_NOTFOUND)
1132  				break;
1133  		}
1134  		if (ret != 0) {
1135  			return -EINVAL;
1136  		}
1137  
1138  		gd->bd->bi_dram[bank].start = (phys_addr_t)res.start;
1139  		gd->bd->bi_dram[bank].size =
1140  			(phys_size_t)(res.end - res.start + 1);
1141  
1142  		debug("%s: DRAM Bank #%d: start = 0x%llx, size = 0x%llx\n",
1143  		      __func__, bank,
1144  		      (unsigned long long)gd->bd->bi_dram[bank].start,
1145  		      (unsigned long long)gd->bd->bi_dram[bank].size);
1146  	}
1147  
1148  	return 0;
1149  }
1150  #endif
1151  
1152  #if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
1153  # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_GZIP) ||\
1154  	CONFIG_IS_ENABLED(MULTI_DTB_FIT_LZO)
1155  static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
1156  {
1157  	size_t sz_out = CONFIG_SPL_MULTI_DTB_FIT_UNCOMPRESS_SZ;
1158  	ulong sz_in = sz_src;
1159  	void *dst;
1160  	int rc;
1161  
1162  	if (CONFIG_IS_ENABLED(GZIP))
1163  		if (gzip_parse_header(src, sz_in) < 0)
1164  			return -1;
1165  	if (CONFIG_IS_ENABLED(LZO))
1166  		if (!lzop_is_valid_header(src))
1167  			return -EBADMSG;
1168  
1169  	if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC)) {
1170  		dst = malloc(sz_out);
1171  		if (!dst) {
1172  			puts("uncompress_blob: Unable to allocate memory\n");
1173  			return -ENOMEM;
1174  		}
1175  	} else  {
1176  #  if CONFIG_IS_ENABLED(MULTI_DTB_FIT_USER_DEFINED_AREA)
1177  		dst = (void *)CONFIG_VAL(MULTI_DTB_FIT_USER_DEF_ADDR);
1178  #  else
1179  		return -ENOTSUPP;
1180  #  endif
1181  	}
1182  
1183  	if (CONFIG_IS_ENABLED(GZIP))
1184  		rc = gunzip(dst, sz_out, (u8 *)src, &sz_in);
1185  	else if (CONFIG_IS_ENABLED(LZO))
1186  		rc = lzop_decompress(src, sz_in, dst, &sz_out);
1187  
1188  	if (rc < 0) {
1189  		/* not a valid compressed blob */
1190  		puts("uncompress_blob: Unable to uncompress\n");
1191  		if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC))
1192  			free(dst);
1193  		return -EBADMSG;
1194  	}
1195  	*dstp = dst;
1196  	return 0;
1197  }
1198  # else
1199  static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
1200  {
1201  	return -ENOTSUPP;
1202  }
1203  # endif
1204  #endif
1205  
1206  #if defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
1207  /*
1208   * For CONFIG_OF_SEPARATE, the board may optionally implement this to
1209   * provide and/or fixup the fdt.
1210   */
1211  __weak void *board_fdt_blob_setup(void)
1212  {
1213  	void *fdt_blob = NULL;
1214  #ifdef CONFIG_SPL_BUILD
1215  	/* FDT is at end of BSS unless it is in a different memory region */
1216  	if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS))
1217  		fdt_blob = (ulong *)&_image_binary_end;
1218  	else
1219  		fdt_blob = (ulong *)&__bss_end;
1220  #else
1221  	/* FDT is at end of image */
1222  	fdt_blob = (ulong *)&_end;
1223  #endif
1224  	return fdt_blob;
1225  }
1226  #endif
1227  
1228  int fdtdec_setup(void)
1229  {
1230  #if CONFIG_IS_ENABLED(OF_CONTROL)
1231  # if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
1232  	void *fdt_blob;
1233  # endif
1234  # ifdef CONFIG_OF_EMBED
1235  	/* Get a pointer to the FDT */
1236  #  ifdef CONFIG_SPL_BUILD
1237  	gd->fdt_blob = __dtb_dt_spl_begin;
1238  #  else
1239  	gd->fdt_blob = __dtb_dt_begin;
1240  #  endif
1241  # elif defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
1242  	/* Allow the board to override the fdt address. */
1243  	gd->fdt_blob = board_fdt_blob_setup();
1244  # elif defined(CONFIG_OF_HOSTFILE)
1245  	if (sandbox_read_fdt_from_file()) {
1246  		puts("Failed to read control FDT\n");
1247  		return -1;
1248  	}
1249  # endif
1250  # ifndef CONFIG_SPL_BUILD
1251  	/* Allow the early environment to override the fdt address */
1252  #  if CONFIG_IS_ENABLED(OF_PRIOR_STAGE)
1253  	gd->fdt_blob = (void *)prior_stage_fdt_address;
1254  #  else
1255  	gd->fdt_blob = (void *)env_get_ulong("fdtcontroladdr", 16,
1256  						(uintptr_t)gd->fdt_blob);
1257  #  endif
1258  # endif
1259  
1260  # if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
1261  	/*
1262  	 * Try and uncompress the blob.
1263  	 * Unfortunately there is no way to know how big the input blob really
1264  	 * is. So let us set the maximum input size arbitrarily high. 16MB
1265  	 * ought to be more than enough for packed DTBs.
1266  	 */
1267  	if (uncompress_blob(gd->fdt_blob, 0x1000000, &fdt_blob) == 0)
1268  		gd->fdt_blob = fdt_blob;
1269  
1270  	/*
1271  	 * Check if blob is a FIT images containings DTBs.
1272  	 * If so, pick the most relevant
1273  	 */
1274  	fdt_blob = locate_dtb_in_fit(gd->fdt_blob);
1275  	if (fdt_blob)
1276  		gd->fdt_blob = fdt_blob;
1277  # endif
1278  #endif
1279  
1280  	return fdtdec_prepare_fdt();
1281  }
1282  
1283  #ifdef CONFIG_NR_DRAM_BANKS
1284  int fdtdec_decode_ram_size(const void *blob, const char *area, int board_id,
1285  			   phys_addr_t *basep, phys_size_t *sizep, bd_t *bd)
1286  {
1287  	int addr_cells, size_cells;
1288  	const u32 *cell, *end;
1289  	u64 total_size, size, addr;
1290  	int node, child;
1291  	bool auto_size;
1292  	int bank;
1293  	int len;
1294  
1295  	debug("%s: board_id=%d\n", __func__, board_id);
1296  	if (!area)
1297  		area = "/memory";
1298  	node = fdt_path_offset(blob, area);
1299  	if (node < 0) {
1300  		debug("No %s node found\n", area);
1301  		return -ENOENT;
1302  	}
1303  
1304  	cell = fdt_getprop(blob, node, "reg", &len);
1305  	if (!cell) {
1306  		debug("No reg property found\n");
1307  		return -ENOENT;
1308  	}
1309  
1310  	addr_cells = fdt_address_cells(blob, node);
1311  	size_cells = fdt_size_cells(blob, node);
1312  
1313  	/* Check the board id and mask */
1314  	for (child = fdt_first_subnode(blob, node);
1315  	     child >= 0;
1316  	     child = fdt_next_subnode(blob, child)) {
1317  		int match_mask, match_value;
1318  
1319  		match_mask = fdtdec_get_int(blob, child, "match-mask", -1);
1320  		match_value = fdtdec_get_int(blob, child, "match-value", -1);
1321  
1322  		if (match_value >= 0 &&
1323  		    ((board_id & match_mask) == match_value)) {
1324  			/* Found matching mask */
1325  			debug("Found matching mask %d\n", match_mask);
1326  			node = child;
1327  			cell = fdt_getprop(blob, node, "reg", &len);
1328  			if (!cell) {
1329  				debug("No memory-banks property found\n");
1330  				return -EINVAL;
1331  			}
1332  			break;
1333  		}
1334  	}
1335  	/* Note: if no matching subnode was found we use the parent node */
1336  
1337  	if (bd) {
1338  		memset(bd->bi_dram, '\0', sizeof(bd->bi_dram[0]) *
1339  						CONFIG_NR_DRAM_BANKS);
1340  	}
1341  
1342  	auto_size = fdtdec_get_bool(blob, node, "auto-size");
1343  
1344  	total_size = 0;
1345  	end = cell + len / 4 - addr_cells - size_cells;
1346  	debug("cell at %p, end %p\n", cell, end);
1347  	for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
1348  		if (cell > end)
1349  			break;
1350  		addr = 0;
1351  		if (addr_cells == 2)
1352  			addr += (u64)fdt32_to_cpu(*cell++) << 32UL;
1353  		addr += fdt32_to_cpu(*cell++);
1354  		if (bd)
1355  			bd->bi_dram[bank].start = addr;
1356  		if (basep && !bank)
1357  			*basep = (phys_addr_t)addr;
1358  
1359  		size = 0;
1360  		if (size_cells == 2)
1361  			size += (u64)fdt32_to_cpu(*cell++) << 32UL;
1362  		size += fdt32_to_cpu(*cell++);
1363  
1364  		if (auto_size) {
1365  			u64 new_size;
1366  
1367  			debug("Auto-sizing %llx, size %llx: ", addr, size);
1368  			new_size = get_ram_size((long *)(uintptr_t)addr, size);
1369  			if (new_size == size) {
1370  				debug("OK\n");
1371  			} else {
1372  				debug("sized to %llx\n", new_size);
1373  				size = new_size;
1374  			}
1375  		}
1376  
1377  		if (bd)
1378  			bd->bi_dram[bank].size = size;
1379  		total_size += size;
1380  	}
1381  
1382  	debug("Memory size %llu\n", total_size);
1383  	if (sizep)
1384  		*sizep = (phys_size_t)total_size;
1385  
1386  	return 0;
1387  }
1388  #endif /* CONFIG_NR_DRAM_BANKS */
1389  
1390  #endif /* !USE_HOSTCC */
1391