1 /* 2 * Copyright (c) 2011 The Chromium OS Authors. 3 * SPDX-License-Identifier: GPL-2.0+ 4 */ 5 6 #ifndef USE_HOSTCC 7 #include <common.h> 8 #include <dm.h> 9 #include <errno.h> 10 #include <serial.h> 11 #include <libfdt.h> 12 #include <fdt_support.h> 13 #include <fdtdec.h> 14 #include <asm/sections.h> 15 #include <linux/ctype.h> 16 17 DECLARE_GLOBAL_DATA_PTR; 18 19 /* 20 * Here are the type we know about. One day we might allow drivers to 21 * register. For now we just put them here. The COMPAT macro allows us to 22 * turn this into a sparse list later, and keeps the ID with the name. 23 * 24 * NOTE: This list is basically a TODO list for things that need to be 25 * converted to driver model. So don't add new things here unless there is a 26 * good reason why driver-model conversion is infeasible. Examples include 27 * things which are used before driver model is available. 28 */ 29 #define COMPAT(id, name) name 30 static const char * const compat_names[COMPAT_COUNT] = { 31 COMPAT(UNKNOWN, "<none>"), 32 COMPAT(NVIDIA_TEGRA20_EMC, "nvidia,tegra20-emc"), 33 COMPAT(NVIDIA_TEGRA20_EMC_TABLE, "nvidia,tegra20-emc-table"), 34 COMPAT(NVIDIA_TEGRA20_NAND, "nvidia,tegra20-nand"), 35 COMPAT(NVIDIA_TEGRA124_PMC, "nvidia,tegra124-pmc"), 36 COMPAT(NVIDIA_TEGRA186_SDMMC, "nvidia,tegra186-sdhci"), 37 COMPAT(NVIDIA_TEGRA210_SDMMC, "nvidia,tegra210-sdhci"), 38 COMPAT(NVIDIA_TEGRA124_SDMMC, "nvidia,tegra124-sdhci"), 39 COMPAT(NVIDIA_TEGRA30_SDMMC, "nvidia,tegra30-sdhci"), 40 COMPAT(NVIDIA_TEGRA20_SDMMC, "nvidia,tegra20-sdhci"), 41 COMPAT(NVIDIA_TEGRA124_XUSB_PADCTL, "nvidia,tegra124-xusb-padctl"), 42 COMPAT(NVIDIA_TEGRA210_XUSB_PADCTL, "nvidia,tegra210-xusb-padctl"), 43 COMPAT(SMSC_LAN9215, "smsc,lan9215"), 44 COMPAT(SAMSUNG_EXYNOS5_SROMC, "samsung,exynos-sromc"), 45 COMPAT(SAMSUNG_S3C2440_I2C, "samsung,s3c2440-i2c"), 46 COMPAT(SAMSUNG_EXYNOS5_SOUND, "samsung,exynos-sound"), 47 COMPAT(WOLFSON_WM8994_CODEC, "wolfson,wm8994-codec"), 48 COMPAT(SAMSUNG_EXYNOS_USB_PHY, "samsung,exynos-usb-phy"), 49 COMPAT(SAMSUNG_EXYNOS5_USB3_PHY, "samsung,exynos5250-usb3-phy"), 50 COMPAT(SAMSUNG_EXYNOS_TMU, "samsung,exynos-tmu"), 51 COMPAT(SAMSUNG_EXYNOS_MIPI_DSI, "samsung,exynos-mipi-dsi"), 52 COMPAT(SAMSUNG_EXYNOS_DWMMC, "samsung,exynos-dwmmc"), 53 COMPAT(SAMSUNG_EXYNOS_MMC, "samsung,exynos-mmc"), 54 COMPAT(MAXIM_MAX77686_PMIC, "maxim,max77686"), 55 COMPAT(GENERIC_SPI_FLASH, "spi-flash"), 56 COMPAT(MAXIM_98095_CODEC, "maxim,max98095-codec"), 57 COMPAT(SAMSUNG_EXYNOS5_I2C, "samsung,exynos5-hsi2c"), 58 COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"), 59 COMPAT(INTEL_MICROCODE, "intel,microcode"), 60 COMPAT(AMS_AS3722, "ams,as3722"), 61 COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"), 62 COMPAT(ALTERA_SOCFPGA_DWMAC, "altr,socfpga-stmmac"), 63 COMPAT(ALTERA_SOCFPGA_DWMMC, "altr,socfpga-dw-mshc"), 64 COMPAT(ALTERA_SOCFPGA_DWC2USB, "snps,dwc2"), 65 COMPAT(INTEL_BAYTRAIL_FSP, "intel,baytrail-fsp"), 66 COMPAT(INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"), 67 COMPAT(INTEL_IVYBRIDGE_FSP, "intel,ivybridge-fsp"), 68 COMPAT(COMPAT_SUNXI_NAND, "allwinner,sun4i-a10-nand"), 69 COMPAT(ALTERA_SOCFPGA_CLK, "altr,clk-mgr"), 70 COMPAT(ALTERA_SOCFPGA_PINCTRL_SINGLE, "pinctrl-single"), 71 COMPAT(ALTERA_SOCFPGA_H2F_BRG, "altr,socfpga-hps2fpga-bridge"), 72 COMPAT(ALTERA_SOCFPGA_LWH2F_BRG, "altr,socfpga-lwhps2fpga-bridge"), 73 COMPAT(ALTERA_SOCFPGA_F2H_BRG, "altr,socfpga-fpga2hps-bridge"), 74 COMPAT(ALTERA_SOCFPGA_F2SDR0, "altr,socfpga-fpga2sdram0-bridge"), 75 COMPAT(ALTERA_SOCFPGA_F2SDR1, "altr,socfpga-fpga2sdram1-bridge"), 76 COMPAT(ALTERA_SOCFPGA_F2SDR2, "altr,socfpga-fpga2sdram2-bridge"), 77 }; 78 79 const char *fdtdec_get_compatible(enum fdt_compat_id id) 80 { 81 /* We allow reading of the 'unknown' ID for testing purposes */ 82 assert(id >= 0 && id < COMPAT_COUNT); 83 return compat_names[id]; 84 } 85 86 fdt_addr_t fdtdec_get_addr_size_fixed(const void *blob, int node, 87 const char *prop_name, int index, int na, int ns, 88 fdt_size_t *sizep, bool translate) 89 { 90 const fdt32_t *prop, *prop_end; 91 const fdt32_t *prop_addr, *prop_size, *prop_after_size; 92 int len; 93 fdt_addr_t addr; 94 95 debug("%s: %s: ", __func__, prop_name); 96 97 if (na > (sizeof(fdt_addr_t) / sizeof(fdt32_t))) { 98 debug("(na too large for fdt_addr_t type)\n"); 99 return FDT_ADDR_T_NONE; 100 } 101 102 if (ns > (sizeof(fdt_size_t) / sizeof(fdt32_t))) { 103 debug("(ns too large for fdt_size_t type)\n"); 104 return FDT_ADDR_T_NONE; 105 } 106 107 prop = fdt_getprop(blob, node, prop_name, &len); 108 if (!prop) { 109 debug("(not found)\n"); 110 return FDT_ADDR_T_NONE; 111 } 112 prop_end = prop + (len / sizeof(*prop)); 113 114 prop_addr = prop + (index * (na + ns)); 115 prop_size = prop_addr + na; 116 prop_after_size = prop_size + ns; 117 if (prop_after_size > prop_end) { 118 debug("(not enough data: expected >= %d cells, got %d cells)\n", 119 (u32)(prop_after_size - prop), ((u32)(prop_end - prop))); 120 return FDT_ADDR_T_NONE; 121 } 122 123 #if CONFIG_IS_ENABLED(OF_TRANSLATE) 124 if (translate) 125 addr = fdt_translate_address(blob, node, prop_addr); 126 else 127 #endif 128 addr = fdtdec_get_number(prop_addr, na); 129 130 if (sizep) { 131 *sizep = fdtdec_get_number(prop_size, ns); 132 debug("addr=%08llx, size=%llx\n", (unsigned long long)addr, 133 (unsigned long long)*sizep); 134 } else { 135 debug("addr=%08llx\n", (unsigned long long)addr); 136 } 137 138 return addr; 139 } 140 141 fdt_addr_t fdtdec_get_addr_size_auto_parent(const void *blob, int parent, 142 int node, const char *prop_name, int index, fdt_size_t *sizep, 143 bool translate) 144 { 145 int na, ns; 146 147 debug("%s: ", __func__); 148 149 na = fdt_address_cells(blob, parent); 150 if (na < 1) { 151 debug("(bad #address-cells)\n"); 152 return FDT_ADDR_T_NONE; 153 } 154 155 ns = fdt_size_cells(blob, parent); 156 if (ns < 0) { 157 debug("(bad #size-cells)\n"); 158 return FDT_ADDR_T_NONE; 159 } 160 161 debug("na=%d, ns=%d, ", na, ns); 162 163 return fdtdec_get_addr_size_fixed(blob, node, prop_name, index, na, 164 ns, sizep, translate); 165 } 166 167 fdt_addr_t fdtdec_get_addr_size_auto_noparent(const void *blob, int node, 168 const char *prop_name, int index, fdt_size_t *sizep, 169 bool translate) 170 { 171 int parent; 172 173 debug("%s: ", __func__); 174 175 parent = fdt_parent_offset(blob, node); 176 if (parent < 0) { 177 debug("(no parent found)\n"); 178 return FDT_ADDR_T_NONE; 179 } 180 181 return fdtdec_get_addr_size_auto_parent(blob, parent, node, prop_name, 182 index, sizep, translate); 183 } 184 185 fdt_addr_t fdtdec_get_addr_size(const void *blob, int node, 186 const char *prop_name, fdt_size_t *sizep) 187 { 188 int ns = sizep ? (sizeof(fdt_size_t) / sizeof(fdt32_t)) : 0; 189 190 return fdtdec_get_addr_size_fixed(blob, node, prop_name, 0, 191 sizeof(fdt_addr_t) / sizeof(fdt32_t), 192 ns, sizep, false); 193 } 194 195 fdt_addr_t fdtdec_get_addr(const void *blob, int node, 196 const char *prop_name) 197 { 198 return fdtdec_get_addr_size(blob, node, prop_name, NULL); 199 } 200 201 #if defined(CONFIG_PCI) && defined(CONFIG_DM_PCI) 202 int fdtdec_get_pci_addr(const void *blob, int node, enum fdt_pci_space type, 203 const char *prop_name, struct fdt_pci_addr *addr) 204 { 205 const u32 *cell; 206 int len; 207 int ret = -ENOENT; 208 209 debug("%s: %s: ", __func__, prop_name); 210 211 /* 212 * If we follow the pci bus bindings strictly, we should check 213 * the value of the node's parent node's #address-cells and 214 * #size-cells. They need to be 3 and 2 accordingly. However, 215 * for simplicity we skip the check here. 216 */ 217 cell = fdt_getprop(blob, node, prop_name, &len); 218 if (!cell) 219 goto fail; 220 221 if ((len % FDT_PCI_REG_SIZE) == 0) { 222 int num = len / FDT_PCI_REG_SIZE; 223 int i; 224 225 for (i = 0; i < num; i++) { 226 debug("pci address #%d: %08lx %08lx %08lx\n", i, 227 (ulong)fdt32_to_cpu(cell[0]), 228 (ulong)fdt32_to_cpu(cell[1]), 229 (ulong)fdt32_to_cpu(cell[2])); 230 if ((fdt32_to_cpu(*cell) & type) == type) { 231 addr->phys_hi = fdt32_to_cpu(cell[0]); 232 addr->phys_mid = fdt32_to_cpu(cell[1]); 233 addr->phys_lo = fdt32_to_cpu(cell[1]); 234 break; 235 } else { 236 cell += (FDT_PCI_ADDR_CELLS + 237 FDT_PCI_SIZE_CELLS); 238 } 239 } 240 241 if (i == num) { 242 ret = -ENXIO; 243 goto fail; 244 } 245 246 return 0; 247 } else { 248 ret = -EINVAL; 249 } 250 251 fail: 252 debug("(not found)\n"); 253 return ret; 254 } 255 256 int fdtdec_get_pci_vendev(const void *blob, int node, u16 *vendor, u16 *device) 257 { 258 const char *list, *end; 259 int len; 260 261 list = fdt_getprop(blob, node, "compatible", &len); 262 if (!list) 263 return -ENOENT; 264 265 end = list + len; 266 while (list < end) { 267 char *s; 268 269 len = strlen(list); 270 if (len >= strlen("pciVVVV,DDDD")) { 271 s = strstr(list, "pci"); 272 273 /* 274 * check if the string is something like pciVVVV,DDDD.RR 275 * or just pciVVVV,DDDD 276 */ 277 if (s && s[7] == ',' && 278 (s[12] == '.' || s[12] == 0)) { 279 s += 3; 280 *vendor = simple_strtol(s, NULL, 16); 281 282 s += 5; 283 *device = simple_strtol(s, NULL, 16); 284 285 return 0; 286 } 287 } 288 list += (len + 1); 289 } 290 291 return -ENOENT; 292 } 293 294 int fdtdec_get_pci_bar32(struct udevice *dev, struct fdt_pci_addr *addr, 295 u32 *bar) 296 { 297 int barnum; 298 299 /* extract the bar number from fdt_pci_addr */ 300 barnum = addr->phys_hi & 0xff; 301 if ((barnum < PCI_BASE_ADDRESS_0) || (barnum > PCI_CARDBUS_CIS)) 302 return -EINVAL; 303 304 barnum = (barnum - PCI_BASE_ADDRESS_0) / 4; 305 *bar = dm_pci_read_bar32(dev, barnum); 306 307 return 0; 308 } 309 #endif 310 311 uint64_t fdtdec_get_uint64(const void *blob, int node, const char *prop_name, 312 uint64_t default_val) 313 { 314 const uint64_t *cell64; 315 int length; 316 317 cell64 = fdt_getprop(blob, node, prop_name, &length); 318 if (!cell64 || length < sizeof(*cell64)) 319 return default_val; 320 321 return fdt64_to_cpu(*cell64); 322 } 323 324 int fdtdec_get_is_enabled(const void *blob, int node) 325 { 326 const char *cell; 327 328 /* 329 * It should say "okay", so only allow that. Some fdts use "ok" but 330 * this is a bug. Please fix your device tree source file. See here 331 * for discussion: 332 * 333 * http://www.mail-archive.com/u-boot@lists.denx.de/msg71598.html 334 */ 335 cell = fdt_getprop(blob, node, "status", NULL); 336 if (cell) 337 return 0 == strcmp(cell, "okay"); 338 return 1; 339 } 340 341 enum fdt_compat_id fdtdec_lookup(const void *blob, int node) 342 { 343 enum fdt_compat_id id; 344 345 /* Search our drivers */ 346 for (id = COMPAT_UNKNOWN; id < COMPAT_COUNT; id++) 347 if (0 == fdt_node_check_compatible(blob, node, 348 compat_names[id])) 349 return id; 350 return COMPAT_UNKNOWN; 351 } 352 353 int fdtdec_next_compatible(const void *blob, int node, 354 enum fdt_compat_id id) 355 { 356 return fdt_node_offset_by_compatible(blob, node, compat_names[id]); 357 } 358 359 int fdtdec_next_compatible_subnode(const void *blob, int node, 360 enum fdt_compat_id id, int *depthp) 361 { 362 do { 363 node = fdt_next_node(blob, node, depthp); 364 } while (*depthp > 1); 365 366 /* If this is a direct subnode, and compatible, return it */ 367 if (*depthp == 1 && 0 == fdt_node_check_compatible( 368 blob, node, compat_names[id])) 369 return node; 370 371 return -FDT_ERR_NOTFOUND; 372 } 373 374 int fdtdec_next_alias(const void *blob, const char *name, 375 enum fdt_compat_id id, int *upto) 376 { 377 #define MAX_STR_LEN 20 378 char str[MAX_STR_LEN + 20]; 379 int node, err; 380 381 /* snprintf() is not available */ 382 assert(strlen(name) < MAX_STR_LEN); 383 sprintf(str, "%.*s%d", MAX_STR_LEN, name, *upto); 384 node = fdt_path_offset(blob, str); 385 if (node < 0) 386 return node; 387 err = fdt_node_check_compatible(blob, node, compat_names[id]); 388 if (err < 0) 389 return err; 390 if (err) 391 return -FDT_ERR_NOTFOUND; 392 (*upto)++; 393 return node; 394 } 395 396 int fdtdec_find_aliases_for_id(const void *blob, const char *name, 397 enum fdt_compat_id id, int *node_list, int maxcount) 398 { 399 memset(node_list, '\0', sizeof(*node_list) * maxcount); 400 401 return fdtdec_add_aliases_for_id(blob, name, id, node_list, maxcount); 402 } 403 404 /* TODO: Can we tighten this code up a little? */ 405 int fdtdec_add_aliases_for_id(const void *blob, const char *name, 406 enum fdt_compat_id id, int *node_list, int maxcount) 407 { 408 int name_len = strlen(name); 409 int nodes[maxcount]; 410 int num_found = 0; 411 int offset, node; 412 int alias_node; 413 int count; 414 int i, j; 415 416 /* find the alias node if present */ 417 alias_node = fdt_path_offset(blob, "/aliases"); 418 419 /* 420 * start with nothing, and we can assume that the root node can't 421 * match 422 */ 423 memset(nodes, '\0', sizeof(nodes)); 424 425 /* First find all the compatible nodes */ 426 for (node = count = 0; node >= 0 && count < maxcount;) { 427 node = fdtdec_next_compatible(blob, node, id); 428 if (node >= 0) 429 nodes[count++] = node; 430 } 431 if (node >= 0) 432 debug("%s: warning: maxcount exceeded with alias '%s'\n", 433 __func__, name); 434 435 /* Now find all the aliases */ 436 for (offset = fdt_first_property_offset(blob, alias_node); 437 offset > 0; 438 offset = fdt_next_property_offset(blob, offset)) { 439 const struct fdt_property *prop; 440 const char *path; 441 int number; 442 int found; 443 444 node = 0; 445 prop = fdt_get_property_by_offset(blob, offset, NULL); 446 path = fdt_string(blob, fdt32_to_cpu(prop->nameoff)); 447 if (prop->len && 0 == strncmp(path, name, name_len)) 448 node = fdt_path_offset(blob, prop->data); 449 if (node <= 0) 450 continue; 451 452 /* Get the alias number */ 453 number = simple_strtoul(path + name_len, NULL, 10); 454 if (number < 0 || number >= maxcount) { 455 debug("%s: warning: alias '%s' is out of range\n", 456 __func__, path); 457 continue; 458 } 459 460 /* Make sure the node we found is actually in our list! */ 461 found = -1; 462 for (j = 0; j < count; j++) 463 if (nodes[j] == node) { 464 found = j; 465 break; 466 } 467 468 if (found == -1) { 469 debug("%s: warning: alias '%s' points to a node " 470 "'%s' that is missing or is not compatible " 471 " with '%s'\n", __func__, path, 472 fdt_get_name(blob, node, NULL), 473 compat_names[id]); 474 continue; 475 } 476 477 /* 478 * Add this node to our list in the right place, and mark 479 * it as done. 480 */ 481 if (fdtdec_get_is_enabled(blob, node)) { 482 if (node_list[number]) { 483 debug("%s: warning: alias '%s' requires that " 484 "a node be placed in the list in a " 485 "position which is already filled by " 486 "node '%s'\n", __func__, path, 487 fdt_get_name(blob, node, NULL)); 488 continue; 489 } 490 node_list[number] = node; 491 if (number >= num_found) 492 num_found = number + 1; 493 } 494 nodes[found] = 0; 495 } 496 497 /* Add any nodes not mentioned by an alias */ 498 for (i = j = 0; i < maxcount; i++) { 499 if (!node_list[i]) { 500 for (; j < maxcount; j++) 501 if (nodes[j] && 502 fdtdec_get_is_enabled(blob, nodes[j])) 503 break; 504 505 /* Have we run out of nodes to add? */ 506 if (j == maxcount) 507 break; 508 509 assert(!node_list[i]); 510 node_list[i] = nodes[j++]; 511 if (i >= num_found) 512 num_found = i + 1; 513 } 514 } 515 516 return num_found; 517 } 518 519 int fdtdec_get_alias_seq(const void *blob, const char *base, int offset, 520 int *seqp) 521 { 522 int base_len = strlen(base); 523 const char *find_name; 524 int find_namelen; 525 int prop_offset; 526 int aliases; 527 528 find_name = fdt_get_name(blob, offset, &find_namelen); 529 debug("Looking for '%s' at %d, name %s\n", base, offset, find_name); 530 531 aliases = fdt_path_offset(blob, "/aliases"); 532 for (prop_offset = fdt_first_property_offset(blob, aliases); 533 prop_offset > 0; 534 prop_offset = fdt_next_property_offset(blob, prop_offset)) { 535 const char *prop; 536 const char *name; 537 const char *slash; 538 int len, val; 539 540 prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len); 541 debug(" - %s, %s\n", name, prop); 542 if (len < find_namelen || *prop != '/' || prop[len - 1] || 543 strncmp(name, base, base_len)) 544 continue; 545 546 slash = strrchr(prop, '/'); 547 if (strcmp(slash + 1, find_name)) 548 continue; 549 val = trailing_strtol(name); 550 if (val != -1) { 551 *seqp = val; 552 debug("Found seq %d\n", *seqp); 553 return 0; 554 } 555 } 556 557 debug("Not found\n"); 558 return -ENOENT; 559 } 560 561 const char *fdtdec_get_chosen_prop(const void *blob, const char *name) 562 { 563 int chosen_node; 564 565 if (!blob) 566 return NULL; 567 chosen_node = fdt_path_offset(blob, "/chosen"); 568 return fdt_getprop(blob, chosen_node, name, NULL); 569 } 570 571 int fdtdec_get_chosen_node(const void *blob, const char *name) 572 { 573 const char *prop; 574 575 prop = fdtdec_get_chosen_prop(blob, name); 576 if (!prop) 577 return -FDT_ERR_NOTFOUND; 578 return fdt_path_offset(blob, prop); 579 } 580 581 int fdtdec_check_fdt(void) 582 { 583 /* 584 * We must have an FDT, but we cannot panic() yet since the console 585 * is not ready. So for now, just assert(). Boards which need an early 586 * FDT (prior to console ready) will need to make their own 587 * arrangements and do their own checks. 588 */ 589 assert(!fdtdec_prepare_fdt()); 590 return 0; 591 } 592 593 /* 594 * This function is a little odd in that it accesses global data. At some 595 * point if the architecture board.c files merge this will make more sense. 596 * Even now, it is common code. 597 */ 598 int fdtdec_prepare_fdt(void) 599 { 600 if (!gd->fdt_blob || ((uintptr_t)gd->fdt_blob & 3) || 601 fdt_check_header(gd->fdt_blob)) { 602 #ifdef CONFIG_SPL_BUILD 603 puts("Missing DTB\n"); 604 #else 605 puts("No valid device tree binary found - please append one to U-Boot binary, use u-boot-dtb.bin or define CONFIG_OF_EMBED. For sandbox, use -d <file.dtb>\n"); 606 # ifdef DEBUG 607 if (gd->fdt_blob) { 608 printf("fdt_blob=%p\n", gd->fdt_blob); 609 print_buffer((ulong)gd->fdt_blob, gd->fdt_blob, 4, 610 32, 0); 611 } 612 # endif 613 #endif 614 return -1; 615 } 616 return 0; 617 } 618 619 int fdtdec_lookup_phandle(const void *blob, int node, const char *prop_name) 620 { 621 const u32 *phandle; 622 int lookup; 623 624 debug("%s: %s\n", __func__, prop_name); 625 phandle = fdt_getprop(blob, node, prop_name, NULL); 626 if (!phandle) 627 return -FDT_ERR_NOTFOUND; 628 629 lookup = fdt_node_offset_by_phandle(blob, fdt32_to_cpu(*phandle)); 630 return lookup; 631 } 632 633 /** 634 * Look up a property in a node and check that it has a minimum length. 635 * 636 * @param blob FDT blob 637 * @param node node to examine 638 * @param prop_name name of property to find 639 * @param min_len minimum property length in bytes 640 * @param err 0 if ok, or -FDT_ERR_NOTFOUND if the property is not 641 found, or -FDT_ERR_BADLAYOUT if not enough data 642 * @return pointer to cell, which is only valid if err == 0 643 */ 644 static const void *get_prop_check_min_len(const void *blob, int node, 645 const char *prop_name, int min_len, int *err) 646 { 647 const void *cell; 648 int len; 649 650 debug("%s: %s\n", __func__, prop_name); 651 cell = fdt_getprop(blob, node, prop_name, &len); 652 if (!cell) 653 *err = -FDT_ERR_NOTFOUND; 654 else if (len < min_len) 655 *err = -FDT_ERR_BADLAYOUT; 656 else 657 *err = 0; 658 return cell; 659 } 660 661 int fdtdec_get_int_array(const void *blob, int node, const char *prop_name, 662 u32 *array, int count) 663 { 664 const u32 *cell; 665 int i, err = 0; 666 667 debug("%s: %s\n", __func__, prop_name); 668 cell = get_prop_check_min_len(blob, node, prop_name, 669 sizeof(u32) * count, &err); 670 if (!err) { 671 for (i = 0; i < count; i++) 672 array[i] = fdt32_to_cpu(cell[i]); 673 } 674 return err; 675 } 676 677 int fdtdec_get_int_array_count(const void *blob, int node, 678 const char *prop_name, u32 *array, int count) 679 { 680 const u32 *cell; 681 int len, elems; 682 int i; 683 684 debug("%s: %s\n", __func__, prop_name); 685 cell = fdt_getprop(blob, node, prop_name, &len); 686 if (!cell) 687 return -FDT_ERR_NOTFOUND; 688 elems = len / sizeof(u32); 689 if (count > elems) 690 count = elems; 691 for (i = 0; i < count; i++) 692 array[i] = fdt32_to_cpu(cell[i]); 693 694 return count; 695 } 696 697 const u32 *fdtdec_locate_array(const void *blob, int node, 698 const char *prop_name, int count) 699 { 700 const u32 *cell; 701 int err; 702 703 cell = get_prop_check_min_len(blob, node, prop_name, 704 sizeof(u32) * count, &err); 705 return err ? NULL : cell; 706 } 707 708 int fdtdec_get_bool(const void *blob, int node, const char *prop_name) 709 { 710 const s32 *cell; 711 int len; 712 713 debug("%s: %s\n", __func__, prop_name); 714 cell = fdt_getprop(blob, node, prop_name, &len); 715 return cell != NULL; 716 } 717 718 int fdtdec_parse_phandle_with_args(const void *blob, int src_node, 719 const char *list_name, 720 const char *cells_name, 721 int cell_count, int index, 722 struct fdtdec_phandle_args *out_args) 723 { 724 const __be32 *list, *list_end; 725 int rc = 0, size, cur_index = 0; 726 uint32_t count = 0; 727 int node = -1; 728 int phandle; 729 730 /* Retrieve the phandle list property */ 731 list = fdt_getprop(blob, src_node, list_name, &size); 732 if (!list) 733 return -ENOENT; 734 list_end = list + size / sizeof(*list); 735 736 /* Loop over the phandles until all the requested entry is found */ 737 while (list < list_end) { 738 rc = -EINVAL; 739 count = 0; 740 741 /* 742 * If phandle is 0, then it is an empty entry with no 743 * arguments. Skip forward to the next entry. 744 */ 745 phandle = be32_to_cpup(list++); 746 if (phandle) { 747 /* 748 * Find the provider node and parse the #*-cells 749 * property to determine the argument length. 750 * 751 * This is not needed if the cell count is hard-coded 752 * (i.e. cells_name not set, but cell_count is set), 753 * except when we're going to return the found node 754 * below. 755 */ 756 if (cells_name || cur_index == index) { 757 node = fdt_node_offset_by_phandle(blob, 758 phandle); 759 if (!node) { 760 debug("%s: could not find phandle\n", 761 fdt_get_name(blob, src_node, 762 NULL)); 763 goto err; 764 } 765 } 766 767 if (cells_name) { 768 count = fdtdec_get_int(blob, node, cells_name, 769 -1); 770 if (count == -1) { 771 debug("%s: could not get %s for %s\n", 772 fdt_get_name(blob, src_node, 773 NULL), 774 cells_name, 775 fdt_get_name(blob, node, 776 NULL)); 777 goto err; 778 } 779 } else { 780 count = cell_count; 781 } 782 783 /* 784 * Make sure that the arguments actually fit in the 785 * remaining property data length 786 */ 787 if (list + count > list_end) { 788 debug("%s: arguments longer than property\n", 789 fdt_get_name(blob, src_node, NULL)); 790 goto err; 791 } 792 } 793 794 /* 795 * All of the error cases above bail out of the loop, so at 796 * this point, the parsing is successful. If the requested 797 * index matches, then fill the out_args structure and return, 798 * or return -ENOENT for an empty entry. 799 */ 800 rc = -ENOENT; 801 if (cur_index == index) { 802 if (!phandle) 803 goto err; 804 805 if (out_args) { 806 int i; 807 808 if (count > MAX_PHANDLE_ARGS) { 809 debug("%s: too many arguments %d\n", 810 fdt_get_name(blob, src_node, 811 NULL), count); 812 count = MAX_PHANDLE_ARGS; 813 } 814 out_args->node = node; 815 out_args->args_count = count; 816 for (i = 0; i < count; i++) { 817 out_args->args[i] = 818 be32_to_cpup(list++); 819 } 820 } 821 822 /* Found it! return success */ 823 return 0; 824 } 825 826 node = -1; 827 list += count; 828 cur_index++; 829 } 830 831 /* 832 * Result will be one of: 833 * -ENOENT : index is for empty phandle 834 * -EINVAL : parsing error on data 835 * [1..n] : Number of phandle (count mode; when index = -1) 836 */ 837 rc = index < 0 ? cur_index : -ENOENT; 838 err: 839 return rc; 840 } 841 842 int fdtdec_get_child_count(const void *blob, int node) 843 { 844 int subnode; 845 int num = 0; 846 847 fdt_for_each_subnode(subnode, blob, node) 848 num++; 849 850 return num; 851 } 852 853 int fdtdec_get_byte_array(const void *blob, int node, const char *prop_name, 854 u8 *array, int count) 855 { 856 const u8 *cell; 857 int err; 858 859 cell = get_prop_check_min_len(blob, node, prop_name, count, &err); 860 if (!err) 861 memcpy(array, cell, count); 862 return err; 863 } 864 865 const u8 *fdtdec_locate_byte_array(const void *blob, int node, 866 const char *prop_name, int count) 867 { 868 const u8 *cell; 869 int err; 870 871 cell = get_prop_check_min_len(blob, node, prop_name, count, &err); 872 if (err) 873 return NULL; 874 return cell; 875 } 876 877 int fdtdec_get_config_int(const void *blob, const char *prop_name, 878 int default_val) 879 { 880 int config_node; 881 882 debug("%s: %s\n", __func__, prop_name); 883 config_node = fdt_path_offset(blob, "/config"); 884 if (config_node < 0) 885 return default_val; 886 return fdtdec_get_int(blob, config_node, prop_name, default_val); 887 } 888 889 int fdtdec_get_config_bool(const void *blob, const char *prop_name) 890 { 891 int config_node; 892 const void *prop; 893 894 debug("%s: %s\n", __func__, prop_name); 895 config_node = fdt_path_offset(blob, "/config"); 896 if (config_node < 0) 897 return 0; 898 prop = fdt_get_property(blob, config_node, prop_name, NULL); 899 900 return prop != NULL; 901 } 902 903 char *fdtdec_get_config_string(const void *blob, const char *prop_name) 904 { 905 const char *nodep; 906 int nodeoffset; 907 int len; 908 909 debug("%s: %s\n", __func__, prop_name); 910 nodeoffset = fdt_path_offset(blob, "/config"); 911 if (nodeoffset < 0) 912 return NULL; 913 914 nodep = fdt_getprop(blob, nodeoffset, prop_name, &len); 915 if (!nodep) 916 return NULL; 917 918 return (char *)nodep; 919 } 920 921 int fdtdec_decode_region(const void *blob, int node, const char *prop_name, 922 fdt_addr_t *basep, fdt_size_t *sizep) 923 { 924 const fdt_addr_t *cell; 925 int len; 926 927 debug("%s: %s: %s\n", __func__, fdt_get_name(blob, node, NULL), 928 prop_name); 929 cell = fdt_getprop(blob, node, prop_name, &len); 930 if (!cell || (len < sizeof(fdt_addr_t) * 2)) { 931 debug("cell=%p, len=%d\n", cell, len); 932 return -1; 933 } 934 935 *basep = fdt_addr_to_cpu(*cell); 936 *sizep = fdt_size_to_cpu(cell[1]); 937 debug("%s: base=%08lx, size=%lx\n", __func__, (ulong)*basep, 938 (ulong)*sizep); 939 940 return 0; 941 } 942 943 /** 944 * Read a flash entry from the fdt 945 * 946 * @param blob FDT blob 947 * @param node Offset of node to read 948 * @param name Name of node being read 949 * @param entry Place to put offset and size of this node 950 * @return 0 if ok, -ve on error 951 */ 952 int fdtdec_read_fmap_entry(const void *blob, int node, const char *name, 953 struct fmap_entry *entry) 954 { 955 const char *prop; 956 u32 reg[2]; 957 958 if (fdtdec_get_int_array(blob, node, "reg", reg, 2)) { 959 debug("Node '%s' has bad/missing 'reg' property\n", name); 960 return -FDT_ERR_NOTFOUND; 961 } 962 entry->offset = reg[0]; 963 entry->length = reg[1]; 964 entry->used = fdtdec_get_int(blob, node, "used", entry->length); 965 prop = fdt_getprop(blob, node, "compress", NULL); 966 entry->compress_algo = prop && !strcmp(prop, "lzo") ? 967 FMAP_COMPRESS_LZO : FMAP_COMPRESS_NONE; 968 prop = fdt_getprop(blob, node, "hash", &entry->hash_size); 969 entry->hash_algo = prop ? FMAP_HASH_SHA256 : FMAP_HASH_NONE; 970 entry->hash = (uint8_t *)prop; 971 972 return 0; 973 } 974 975 u64 fdtdec_get_number(const fdt32_t *ptr, unsigned int cells) 976 { 977 u64 number = 0; 978 979 while (cells--) 980 number = (number << 32) | fdt32_to_cpu(*ptr++); 981 982 return number; 983 } 984 985 int fdt_get_resource(const void *fdt, int node, const char *property, 986 unsigned int index, struct fdt_resource *res) 987 { 988 const fdt32_t *ptr, *end; 989 int na, ns, len, parent; 990 unsigned int i = 0; 991 992 parent = fdt_parent_offset(fdt, node); 993 if (parent < 0) 994 return parent; 995 996 na = fdt_address_cells(fdt, parent); 997 ns = fdt_size_cells(fdt, parent); 998 999 ptr = fdt_getprop(fdt, node, property, &len); 1000 if (!ptr) 1001 return len; 1002 1003 end = ptr + len / sizeof(*ptr); 1004 1005 while (ptr + na + ns <= end) { 1006 if (i == index) { 1007 res->start = res->end = fdtdec_get_number(ptr, na); 1008 res->end += fdtdec_get_number(&ptr[na], ns) - 1; 1009 return 0; 1010 } 1011 1012 ptr += na + ns; 1013 i++; 1014 } 1015 1016 return -FDT_ERR_NOTFOUND; 1017 } 1018 1019 int fdt_get_named_resource(const void *fdt, int node, const char *property, 1020 const char *prop_names, const char *name, 1021 struct fdt_resource *res) 1022 { 1023 int index; 1024 1025 index = fdt_stringlist_search(fdt, node, prop_names, name); 1026 if (index < 0) 1027 return index; 1028 1029 return fdt_get_resource(fdt, node, property, index, res); 1030 } 1031 1032 int fdtdec_decode_memory_region(const void *blob, int config_node, 1033 const char *mem_type, const char *suffix, 1034 fdt_addr_t *basep, fdt_size_t *sizep) 1035 { 1036 char prop_name[50]; 1037 const char *mem; 1038 fdt_size_t size, offset_size; 1039 fdt_addr_t base, offset; 1040 int node; 1041 1042 if (config_node == -1) { 1043 config_node = fdt_path_offset(blob, "/config"); 1044 if (config_node < 0) { 1045 debug("%s: Cannot find /config node\n", __func__); 1046 return -ENOENT; 1047 } 1048 } 1049 if (!suffix) 1050 suffix = ""; 1051 1052 snprintf(prop_name, sizeof(prop_name), "%s-memory%s", mem_type, 1053 suffix); 1054 mem = fdt_getprop(blob, config_node, prop_name, NULL); 1055 if (!mem) { 1056 debug("%s: No memory type for '%s', using /memory\n", __func__, 1057 prop_name); 1058 mem = "/memory"; 1059 } 1060 1061 node = fdt_path_offset(blob, mem); 1062 if (node < 0) { 1063 debug("%s: Failed to find node '%s': %s\n", __func__, mem, 1064 fdt_strerror(node)); 1065 return -ENOENT; 1066 } 1067 1068 /* 1069 * Not strictly correct - the memory may have multiple banks. We just 1070 * use the first 1071 */ 1072 if (fdtdec_decode_region(blob, node, "reg", &base, &size)) { 1073 debug("%s: Failed to decode memory region %s\n", __func__, 1074 mem); 1075 return -EINVAL; 1076 } 1077 1078 snprintf(prop_name, sizeof(prop_name), "%s-offset%s", mem_type, 1079 suffix); 1080 if (fdtdec_decode_region(blob, config_node, prop_name, &offset, 1081 &offset_size)) { 1082 debug("%s: Failed to decode memory region '%s'\n", __func__, 1083 prop_name); 1084 return -EINVAL; 1085 } 1086 1087 *basep = base + offset; 1088 *sizep = offset_size; 1089 1090 return 0; 1091 } 1092 1093 static int decode_timing_property(const void *blob, int node, const char *name, 1094 struct timing_entry *result) 1095 { 1096 int length, ret = 0; 1097 const u32 *prop; 1098 1099 prop = fdt_getprop(blob, node, name, &length); 1100 if (!prop) { 1101 debug("%s: could not find property %s\n", 1102 fdt_get_name(blob, node, NULL), name); 1103 return length; 1104 } 1105 1106 if (length == sizeof(u32)) { 1107 result->typ = fdtdec_get_int(blob, node, name, 0); 1108 result->min = result->typ; 1109 result->max = result->typ; 1110 } else { 1111 ret = fdtdec_get_int_array(blob, node, name, &result->min, 3); 1112 } 1113 1114 return ret; 1115 } 1116 1117 int fdtdec_decode_display_timing(const void *blob, int parent, int index, 1118 struct display_timing *dt) 1119 { 1120 int i, node, timings_node; 1121 u32 val = 0; 1122 int ret = 0; 1123 1124 timings_node = fdt_subnode_offset(blob, parent, "display-timings"); 1125 if (timings_node < 0) 1126 return timings_node; 1127 1128 for (i = 0, node = fdt_first_subnode(blob, timings_node); 1129 node > 0 && i != index; 1130 node = fdt_next_subnode(blob, node)) 1131 i++; 1132 1133 if (node < 0) 1134 return node; 1135 1136 memset(dt, 0, sizeof(*dt)); 1137 1138 ret |= decode_timing_property(blob, node, "hback-porch", 1139 &dt->hback_porch); 1140 ret |= decode_timing_property(blob, node, "hfront-porch", 1141 &dt->hfront_porch); 1142 ret |= decode_timing_property(blob, node, "hactive", &dt->hactive); 1143 ret |= decode_timing_property(blob, node, "hsync-len", &dt->hsync_len); 1144 ret |= decode_timing_property(blob, node, "vback-porch", 1145 &dt->vback_porch); 1146 ret |= decode_timing_property(blob, node, "vfront-porch", 1147 &dt->vfront_porch); 1148 ret |= decode_timing_property(blob, node, "vactive", &dt->vactive); 1149 ret |= decode_timing_property(blob, node, "vsync-len", &dt->vsync_len); 1150 ret |= decode_timing_property(blob, node, "clock-frequency", 1151 &dt->pixelclock); 1152 1153 dt->flags = 0; 1154 val = fdtdec_get_int(blob, node, "vsync-active", -1); 1155 if (val != -1) { 1156 dt->flags |= val ? DISPLAY_FLAGS_VSYNC_HIGH : 1157 DISPLAY_FLAGS_VSYNC_LOW; 1158 } 1159 val = fdtdec_get_int(blob, node, "hsync-active", -1); 1160 if (val != -1) { 1161 dt->flags |= val ? DISPLAY_FLAGS_HSYNC_HIGH : 1162 DISPLAY_FLAGS_HSYNC_LOW; 1163 } 1164 val = fdtdec_get_int(blob, node, "de-active", -1); 1165 if (val != -1) { 1166 dt->flags |= val ? DISPLAY_FLAGS_DE_HIGH : 1167 DISPLAY_FLAGS_DE_LOW; 1168 } 1169 val = fdtdec_get_int(blob, node, "pixelclk-active", -1); 1170 if (val != -1) { 1171 dt->flags |= val ? DISPLAY_FLAGS_PIXDATA_POSEDGE : 1172 DISPLAY_FLAGS_PIXDATA_NEGEDGE; 1173 } 1174 1175 if (fdtdec_get_bool(blob, node, "interlaced")) 1176 dt->flags |= DISPLAY_FLAGS_INTERLACED; 1177 if (fdtdec_get_bool(blob, node, "doublescan")) 1178 dt->flags |= DISPLAY_FLAGS_DOUBLESCAN; 1179 if (fdtdec_get_bool(blob, node, "doubleclk")) 1180 dt->flags |= DISPLAY_FLAGS_DOUBLECLK; 1181 1182 return ret; 1183 } 1184 1185 int fdtdec_setup_memory_size(void) 1186 { 1187 int ret, mem; 1188 struct fdt_resource res; 1189 1190 mem = fdt_path_offset(gd->fdt_blob, "/memory"); 1191 if (mem < 0) { 1192 debug("%s: Missing /memory node\n", __func__); 1193 return -EINVAL; 1194 } 1195 1196 ret = fdt_get_resource(gd->fdt_blob, mem, "reg", 0, &res); 1197 if (ret != 0) { 1198 debug("%s: Unable to decode first memory bank\n", __func__); 1199 return -EINVAL; 1200 } 1201 1202 gd->ram_size = (phys_size_t)(res.end - res.start + 1); 1203 debug("%s: Initial DRAM size %llx\n", __func__, (u64)gd->ram_size); 1204 1205 return 0; 1206 } 1207 1208 #if defined(CONFIG_NR_DRAM_BANKS) 1209 int fdtdec_setup_memory_banksize(void) 1210 { 1211 int bank, ret, mem; 1212 struct fdt_resource res; 1213 1214 mem = fdt_path_offset(gd->fdt_blob, "/memory"); 1215 if (mem < 0) { 1216 debug("%s: Missing /memory node\n", __func__); 1217 return -EINVAL; 1218 } 1219 1220 for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) { 1221 ret = fdt_get_resource(gd->fdt_blob, mem, "reg", bank, &res); 1222 if (ret == -FDT_ERR_NOTFOUND) 1223 break; 1224 if (ret != 0) 1225 return -EINVAL; 1226 1227 gd->bd->bi_dram[bank].start = (phys_addr_t)res.start; 1228 gd->bd->bi_dram[bank].size = 1229 (phys_size_t)(res.end - res.start + 1); 1230 1231 debug("%s: DRAM Bank #%d: start = 0x%llx, size = 0x%llx\n", 1232 __func__, bank, 1233 (unsigned long long)gd->bd->bi_dram[bank].start, 1234 (unsigned long long)gd->bd->bi_dram[bank].size); 1235 } 1236 1237 return 0; 1238 } 1239 #endif 1240 1241 int fdtdec_setup(void) 1242 { 1243 #if CONFIG_IS_ENABLED(OF_CONTROL) 1244 # ifdef CONFIG_OF_EMBED 1245 /* Get a pointer to the FDT */ 1246 gd->fdt_blob = __dtb_dt_begin; 1247 # elif defined CONFIG_OF_SEPARATE 1248 # ifdef CONFIG_SPL_BUILD 1249 /* FDT is at end of BSS unless it is in a different memory region */ 1250 if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS)) 1251 gd->fdt_blob = (ulong *)&_image_binary_end; 1252 else 1253 gd->fdt_blob = (ulong *)&__bss_end; 1254 # else 1255 /* FDT is at end of image */ 1256 gd->fdt_blob = (ulong *)&_end; 1257 # endif 1258 # elif defined(CONFIG_OF_HOSTFILE) 1259 if (sandbox_read_fdt_from_file()) { 1260 puts("Failed to read control FDT\n"); 1261 return -1; 1262 } 1263 # endif 1264 # ifndef CONFIG_SPL_BUILD 1265 /* Allow the early environment to override the fdt address */ 1266 gd->fdt_blob = (void *)getenv_ulong("fdtcontroladdr", 16, 1267 (uintptr_t)gd->fdt_blob); 1268 # endif 1269 #endif 1270 return fdtdec_prepare_fdt(); 1271 } 1272 1273 #endif /* !USE_HOSTCC */ 1274