xref: /openbmc/u-boot/lib/fdtdec.c (revision 157c74b6)
1 /*
2  * Copyright (c) 2011 The Chromium OS Authors.
3  * SPDX-License-Identifier:	GPL-2.0+
4  */
5 
6 #ifndef USE_HOSTCC
7 #include <common.h>
8 #include <boot_fit.h>
9 #include <dm.h>
10 #include <dm/of_extra.h>
11 #include <errno.h>
12 #include <fdtdec.h>
13 #include <fdt_support.h>
14 #include <libfdt.h>
15 #include <serial.h>
16 #include <asm/sections.h>
17 #include <linux/ctype.h>
18 #include <linux/lzo.h>
19 
20 DECLARE_GLOBAL_DATA_PTR;
21 
22 /*
23  * Here are the type we know about. One day we might allow drivers to
24  * register. For now we just put them here. The COMPAT macro allows us to
25  * turn this into a sparse list later, and keeps the ID with the name.
26  *
27  * NOTE: This list is basically a TODO list for things that need to be
28  * converted to driver model. So don't add new things here unless there is a
29  * good reason why driver-model conversion is infeasible. Examples include
30  * things which are used before driver model is available.
31  */
32 #define COMPAT(id, name) name
33 static const char * const compat_names[COMPAT_COUNT] = {
34 	COMPAT(UNKNOWN, "<none>"),
35 	COMPAT(NVIDIA_TEGRA20_EMC, "nvidia,tegra20-emc"),
36 	COMPAT(NVIDIA_TEGRA20_EMC_TABLE, "nvidia,tegra20-emc-table"),
37 	COMPAT(NVIDIA_TEGRA20_NAND, "nvidia,tegra20-nand"),
38 	COMPAT(NVIDIA_TEGRA124_XUSB_PADCTL, "nvidia,tegra124-xusb-padctl"),
39 	COMPAT(NVIDIA_TEGRA210_XUSB_PADCTL, "nvidia,tegra210-xusb-padctl"),
40 	COMPAT(SMSC_LAN9215, "smsc,lan9215"),
41 	COMPAT(SAMSUNG_EXYNOS5_SROMC, "samsung,exynos-sromc"),
42 	COMPAT(SAMSUNG_S3C2440_I2C, "samsung,s3c2440-i2c"),
43 	COMPAT(SAMSUNG_EXYNOS5_SOUND, "samsung,exynos-sound"),
44 	COMPAT(WOLFSON_WM8994_CODEC, "wolfson,wm8994-codec"),
45 	COMPAT(SAMSUNG_EXYNOS_USB_PHY, "samsung,exynos-usb-phy"),
46 	COMPAT(SAMSUNG_EXYNOS5_USB3_PHY, "samsung,exynos5250-usb3-phy"),
47 	COMPAT(SAMSUNG_EXYNOS_TMU, "samsung,exynos-tmu"),
48 	COMPAT(SAMSUNG_EXYNOS_MIPI_DSI, "samsung,exynos-mipi-dsi"),
49 	COMPAT(SAMSUNG_EXYNOS_DWMMC, "samsung,exynos-dwmmc"),
50 	COMPAT(SAMSUNG_EXYNOS_MMC, "samsung,exynos-mmc"),
51 	COMPAT(MAXIM_MAX77686_PMIC, "maxim,max77686"),
52 	COMPAT(GENERIC_SPI_FLASH, "spi-flash"),
53 	COMPAT(MAXIM_98095_CODEC, "maxim,max98095-codec"),
54 	COMPAT(SAMSUNG_EXYNOS5_I2C, "samsung,exynos5-hsi2c"),
55 	COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"),
56 	COMPAT(INTEL_MICROCODE, "intel,microcode"),
57 	COMPAT(AMS_AS3722, "ams,as3722"),
58 	COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"),
59 	COMPAT(ALTERA_SOCFPGA_DWMAC, "altr,socfpga-stmmac"),
60 	COMPAT(ALTERA_SOCFPGA_DWMMC, "altr,socfpga-dw-mshc"),
61 	COMPAT(ALTERA_SOCFPGA_DWC2USB, "snps,dwc2"),
62 	COMPAT(INTEL_BAYTRAIL_FSP, "intel,baytrail-fsp"),
63 	COMPAT(INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"),
64 	COMPAT(INTEL_IVYBRIDGE_FSP, "intel,ivybridge-fsp"),
65 	COMPAT(COMPAT_SUNXI_NAND, "allwinner,sun4i-a10-nand"),
66 	COMPAT(ALTERA_SOCFPGA_CLK, "altr,clk-mgr"),
67 	COMPAT(ALTERA_SOCFPGA_PINCTRL_SINGLE, "pinctrl-single"),
68 	COMPAT(ALTERA_SOCFPGA_H2F_BRG, "altr,socfpga-hps2fpga-bridge"),
69 	COMPAT(ALTERA_SOCFPGA_LWH2F_BRG, "altr,socfpga-lwhps2fpga-bridge"),
70 	COMPAT(ALTERA_SOCFPGA_F2H_BRG, "altr,socfpga-fpga2hps-bridge"),
71 	COMPAT(ALTERA_SOCFPGA_F2SDR0, "altr,socfpga-fpga2sdram0-bridge"),
72 	COMPAT(ALTERA_SOCFPGA_F2SDR1, "altr,socfpga-fpga2sdram1-bridge"),
73 	COMPAT(ALTERA_SOCFPGA_F2SDR2, "altr,socfpga-fpga2sdram2-bridge"),
74 	COMPAT(ALTERA_SOCFPGA_FPGA0, "altr,socfpga-a10-fpga-mgr"),
75 	COMPAT(ALTERA_SOCFPGA_NOC, "altr,socfpga-a10-noc"),
76 };
77 
78 const char *fdtdec_get_compatible(enum fdt_compat_id id)
79 {
80 	/* We allow reading of the 'unknown' ID for testing purposes */
81 	assert(id >= 0 && id < COMPAT_COUNT);
82 	return compat_names[id];
83 }
84 
85 fdt_addr_t fdtdec_get_addr_size_fixed(const void *blob, int node,
86 		const char *prop_name, int index, int na, int ns,
87 		fdt_size_t *sizep, bool translate)
88 {
89 	const fdt32_t *prop, *prop_end;
90 	const fdt32_t *prop_addr, *prop_size, *prop_after_size;
91 	int len;
92 	fdt_addr_t addr;
93 
94 	debug("%s: %s: ", __func__, prop_name);
95 
96 	if (na > (sizeof(fdt_addr_t) / sizeof(fdt32_t))) {
97 		debug("(na too large for fdt_addr_t type)\n");
98 		return FDT_ADDR_T_NONE;
99 	}
100 
101 	if (ns > (sizeof(fdt_size_t) / sizeof(fdt32_t))) {
102 		debug("(ns too large for fdt_size_t type)\n");
103 		return FDT_ADDR_T_NONE;
104 	}
105 
106 	prop = fdt_getprop(blob, node, prop_name, &len);
107 	if (!prop) {
108 		debug("(not found)\n");
109 		return FDT_ADDR_T_NONE;
110 	}
111 	prop_end = prop + (len / sizeof(*prop));
112 
113 	prop_addr = prop + (index * (na + ns));
114 	prop_size = prop_addr + na;
115 	prop_after_size = prop_size + ns;
116 	if (prop_after_size > prop_end) {
117 		debug("(not enough data: expected >= %d cells, got %d cells)\n",
118 		      (u32)(prop_after_size - prop), ((u32)(prop_end - prop)));
119 		return FDT_ADDR_T_NONE;
120 	}
121 
122 #if CONFIG_IS_ENABLED(OF_TRANSLATE)
123 	if (translate)
124 		addr = fdt_translate_address(blob, node, prop_addr);
125 	else
126 #endif
127 		addr = fdtdec_get_number(prop_addr, na);
128 
129 	if (sizep) {
130 		*sizep = fdtdec_get_number(prop_size, ns);
131 		debug("addr=%08llx, size=%llx\n", (unsigned long long)addr,
132 		      (unsigned long long)*sizep);
133 	} else {
134 		debug("addr=%08llx\n", (unsigned long long)addr);
135 	}
136 
137 	return addr;
138 }
139 
140 fdt_addr_t fdtdec_get_addr_size_auto_parent(const void *blob, int parent,
141 		int node, const char *prop_name, int index, fdt_size_t *sizep,
142 		bool translate)
143 {
144 	int na, ns;
145 
146 	debug("%s: ", __func__);
147 
148 	na = fdt_address_cells(blob, parent);
149 	if (na < 1) {
150 		debug("(bad #address-cells)\n");
151 		return FDT_ADDR_T_NONE;
152 	}
153 
154 	ns = fdt_size_cells(blob, parent);
155 	if (ns < 0) {
156 		debug("(bad #size-cells)\n");
157 		return FDT_ADDR_T_NONE;
158 	}
159 
160 	debug("na=%d, ns=%d, ", na, ns);
161 
162 	return fdtdec_get_addr_size_fixed(blob, node, prop_name, index, na,
163 					  ns, sizep, translate);
164 }
165 
166 fdt_addr_t fdtdec_get_addr_size_auto_noparent(const void *blob, int node,
167 		const char *prop_name, int index, fdt_size_t *sizep,
168 		bool translate)
169 {
170 	int parent;
171 
172 	debug("%s: ", __func__);
173 
174 	parent = fdt_parent_offset(blob, node);
175 	if (parent < 0) {
176 		debug("(no parent found)\n");
177 		return FDT_ADDR_T_NONE;
178 	}
179 
180 	return fdtdec_get_addr_size_auto_parent(blob, parent, node, prop_name,
181 						index, sizep, translate);
182 }
183 
184 fdt_addr_t fdtdec_get_addr_size(const void *blob, int node,
185 		const char *prop_name, fdt_size_t *sizep)
186 {
187 	int ns = sizep ? (sizeof(fdt_size_t) / sizeof(fdt32_t)) : 0;
188 
189 	return fdtdec_get_addr_size_fixed(blob, node, prop_name, 0,
190 					  sizeof(fdt_addr_t) / sizeof(fdt32_t),
191 					  ns, sizep, false);
192 }
193 
194 fdt_addr_t fdtdec_get_addr(const void *blob, int node,
195 		const char *prop_name)
196 {
197 	return fdtdec_get_addr_size(blob, node, prop_name, NULL);
198 }
199 
200 #if defined(CONFIG_PCI) && defined(CONFIG_DM_PCI)
201 int fdtdec_get_pci_addr(const void *blob, int node, enum fdt_pci_space type,
202 		const char *prop_name, struct fdt_pci_addr *addr)
203 {
204 	const u32 *cell;
205 	int len;
206 	int ret = -ENOENT;
207 
208 	debug("%s: %s: ", __func__, prop_name);
209 
210 	/*
211 	 * If we follow the pci bus bindings strictly, we should check
212 	 * the value of the node's parent node's #address-cells and
213 	 * #size-cells. They need to be 3 and 2 accordingly. However,
214 	 * for simplicity we skip the check here.
215 	 */
216 	cell = fdt_getprop(blob, node, prop_name, &len);
217 	if (!cell)
218 		goto fail;
219 
220 	if ((len % FDT_PCI_REG_SIZE) == 0) {
221 		int num = len / FDT_PCI_REG_SIZE;
222 		int i;
223 
224 		for (i = 0; i < num; i++) {
225 			debug("pci address #%d: %08lx %08lx %08lx\n", i,
226 			      (ulong)fdt32_to_cpu(cell[0]),
227 			      (ulong)fdt32_to_cpu(cell[1]),
228 			      (ulong)fdt32_to_cpu(cell[2]));
229 			if ((fdt32_to_cpu(*cell) & type) == type) {
230 				addr->phys_hi = fdt32_to_cpu(cell[0]);
231 				addr->phys_mid = fdt32_to_cpu(cell[1]);
232 				addr->phys_lo = fdt32_to_cpu(cell[1]);
233 				break;
234 			} else {
235 				cell += (FDT_PCI_ADDR_CELLS +
236 					 FDT_PCI_SIZE_CELLS);
237 			}
238 		}
239 
240 		if (i == num) {
241 			ret = -ENXIO;
242 			goto fail;
243 		}
244 
245 		return 0;
246 	} else {
247 		ret = -EINVAL;
248 	}
249 
250 fail:
251 	debug("(not found)\n");
252 	return ret;
253 }
254 
255 int fdtdec_get_pci_vendev(const void *blob, int node, u16 *vendor, u16 *device)
256 {
257 	const char *list, *end;
258 	int len;
259 
260 	list = fdt_getprop(blob, node, "compatible", &len);
261 	if (!list)
262 		return -ENOENT;
263 
264 	end = list + len;
265 	while (list < end) {
266 		char *s;
267 
268 		len = strlen(list);
269 		if (len >= strlen("pciVVVV,DDDD")) {
270 			s = strstr(list, "pci");
271 
272 			/*
273 			 * check if the string is something like pciVVVV,DDDD.RR
274 			 * or just pciVVVV,DDDD
275 			 */
276 			if (s && s[7] == ',' &&
277 			    (s[12] == '.' || s[12] == 0)) {
278 				s += 3;
279 				*vendor = simple_strtol(s, NULL, 16);
280 
281 				s += 5;
282 				*device = simple_strtol(s, NULL, 16);
283 
284 				return 0;
285 			}
286 		}
287 		list += (len + 1);
288 	}
289 
290 	return -ENOENT;
291 }
292 
293 int fdtdec_get_pci_bar32(struct udevice *dev, struct fdt_pci_addr *addr,
294 			 u32 *bar)
295 {
296 	int barnum;
297 
298 	/* extract the bar number from fdt_pci_addr */
299 	barnum = addr->phys_hi & 0xff;
300 	if ((barnum < PCI_BASE_ADDRESS_0) || (barnum > PCI_CARDBUS_CIS))
301 		return -EINVAL;
302 
303 	barnum = (barnum - PCI_BASE_ADDRESS_0) / 4;
304 	*bar = dm_pci_read_bar32(dev, barnum);
305 
306 	return 0;
307 }
308 #endif
309 
310 uint64_t fdtdec_get_uint64(const void *blob, int node, const char *prop_name,
311 		uint64_t default_val)
312 {
313 	const uint64_t *cell64;
314 	int length;
315 
316 	cell64 = fdt_getprop(blob, node, prop_name, &length);
317 	if (!cell64 || length < sizeof(*cell64))
318 		return default_val;
319 
320 	return fdt64_to_cpu(*cell64);
321 }
322 
323 int fdtdec_get_is_enabled(const void *blob, int node)
324 {
325 	const char *cell;
326 
327 	/*
328 	 * It should say "okay", so only allow that. Some fdts use "ok" but
329 	 * this is a bug. Please fix your device tree source file. See here
330 	 * for discussion:
331 	 *
332 	 * http://www.mail-archive.com/u-boot@lists.denx.de/msg71598.html
333 	 */
334 	cell = fdt_getprop(blob, node, "status", NULL);
335 	if (cell)
336 		return 0 == strcmp(cell, "okay");
337 	return 1;
338 }
339 
340 enum fdt_compat_id fdtdec_lookup(const void *blob, int node)
341 {
342 	enum fdt_compat_id id;
343 
344 	/* Search our drivers */
345 	for (id = COMPAT_UNKNOWN; id < COMPAT_COUNT; id++)
346 		if (0 == fdt_node_check_compatible(blob, node,
347 				compat_names[id]))
348 			return id;
349 	return COMPAT_UNKNOWN;
350 }
351 
352 int fdtdec_next_compatible(const void *blob, int node,
353 		enum fdt_compat_id id)
354 {
355 	return fdt_node_offset_by_compatible(blob, node, compat_names[id]);
356 }
357 
358 int fdtdec_next_compatible_subnode(const void *blob, int node,
359 		enum fdt_compat_id id, int *depthp)
360 {
361 	do {
362 		node = fdt_next_node(blob, node, depthp);
363 	} while (*depthp > 1);
364 
365 	/* If this is a direct subnode, and compatible, return it */
366 	if (*depthp == 1 && 0 == fdt_node_check_compatible(
367 						blob, node, compat_names[id]))
368 		return node;
369 
370 	return -FDT_ERR_NOTFOUND;
371 }
372 
373 int fdtdec_next_alias(const void *blob, const char *name,
374 		enum fdt_compat_id id, int *upto)
375 {
376 #define MAX_STR_LEN 20
377 	char str[MAX_STR_LEN + 20];
378 	int node, err;
379 
380 	/* snprintf() is not available */
381 	assert(strlen(name) < MAX_STR_LEN);
382 	sprintf(str, "%.*s%d", MAX_STR_LEN, name, *upto);
383 	node = fdt_path_offset(blob, str);
384 	if (node < 0)
385 		return node;
386 	err = fdt_node_check_compatible(blob, node, compat_names[id]);
387 	if (err < 0)
388 		return err;
389 	if (err)
390 		return -FDT_ERR_NOTFOUND;
391 	(*upto)++;
392 	return node;
393 }
394 
395 int fdtdec_find_aliases_for_id(const void *blob, const char *name,
396 			enum fdt_compat_id id, int *node_list, int maxcount)
397 {
398 	memset(node_list, '\0', sizeof(*node_list) * maxcount);
399 
400 	return fdtdec_add_aliases_for_id(blob, name, id, node_list, maxcount);
401 }
402 
403 /* TODO: Can we tighten this code up a little? */
404 int fdtdec_add_aliases_for_id(const void *blob, const char *name,
405 			enum fdt_compat_id id, int *node_list, int maxcount)
406 {
407 	int name_len = strlen(name);
408 	int nodes[maxcount];
409 	int num_found = 0;
410 	int offset, node;
411 	int alias_node;
412 	int count;
413 	int i, j;
414 
415 	/* find the alias node if present */
416 	alias_node = fdt_path_offset(blob, "/aliases");
417 
418 	/*
419 	 * start with nothing, and we can assume that the root node can't
420 	 * match
421 	 */
422 	memset(nodes, '\0', sizeof(nodes));
423 
424 	/* First find all the compatible nodes */
425 	for (node = count = 0; node >= 0 && count < maxcount;) {
426 		node = fdtdec_next_compatible(blob, node, id);
427 		if (node >= 0)
428 			nodes[count++] = node;
429 	}
430 	if (node >= 0)
431 		debug("%s: warning: maxcount exceeded with alias '%s'\n",
432 		       __func__, name);
433 
434 	/* Now find all the aliases */
435 	for (offset = fdt_first_property_offset(blob, alias_node);
436 			offset > 0;
437 			offset = fdt_next_property_offset(blob, offset)) {
438 		const struct fdt_property *prop;
439 		const char *path;
440 		int number;
441 		int found;
442 
443 		node = 0;
444 		prop = fdt_get_property_by_offset(blob, offset, NULL);
445 		path = fdt_string(blob, fdt32_to_cpu(prop->nameoff));
446 		if (prop->len && 0 == strncmp(path, name, name_len))
447 			node = fdt_path_offset(blob, prop->data);
448 		if (node <= 0)
449 			continue;
450 
451 		/* Get the alias number */
452 		number = simple_strtoul(path + name_len, NULL, 10);
453 		if (number < 0 || number >= maxcount) {
454 			debug("%s: warning: alias '%s' is out of range\n",
455 			       __func__, path);
456 			continue;
457 		}
458 
459 		/* Make sure the node we found is actually in our list! */
460 		found = -1;
461 		for (j = 0; j < count; j++)
462 			if (nodes[j] == node) {
463 				found = j;
464 				break;
465 			}
466 
467 		if (found == -1) {
468 			debug("%s: warning: alias '%s' points to a node "
469 				"'%s' that is missing or is not compatible "
470 				" with '%s'\n", __func__, path,
471 				fdt_get_name(blob, node, NULL),
472 			       compat_names[id]);
473 			continue;
474 		}
475 
476 		/*
477 		 * Add this node to our list in the right place, and mark
478 		 * it as done.
479 		 */
480 		if (fdtdec_get_is_enabled(blob, node)) {
481 			if (node_list[number]) {
482 				debug("%s: warning: alias '%s' requires that "
483 				      "a node be placed in the list in a "
484 				      "position which is already filled by "
485 				      "node '%s'\n", __func__, path,
486 				      fdt_get_name(blob, node, NULL));
487 				continue;
488 			}
489 			node_list[number] = node;
490 			if (number >= num_found)
491 				num_found = number + 1;
492 		}
493 		nodes[found] = 0;
494 	}
495 
496 	/* Add any nodes not mentioned by an alias */
497 	for (i = j = 0; i < maxcount; i++) {
498 		if (!node_list[i]) {
499 			for (; j < maxcount; j++)
500 				if (nodes[j] &&
501 					fdtdec_get_is_enabled(blob, nodes[j]))
502 					break;
503 
504 			/* Have we run out of nodes to add? */
505 			if (j == maxcount)
506 				break;
507 
508 			assert(!node_list[i]);
509 			node_list[i] = nodes[j++];
510 			if (i >= num_found)
511 				num_found = i + 1;
512 		}
513 	}
514 
515 	return num_found;
516 }
517 
518 int fdtdec_get_alias_seq(const void *blob, const char *base, int offset,
519 			 int *seqp)
520 {
521 	int base_len = strlen(base);
522 	const char *find_name;
523 	int find_namelen;
524 	int prop_offset;
525 	int aliases;
526 
527 	find_name = fdt_get_name(blob, offset, &find_namelen);
528 	debug("Looking for '%s' at %d, name %s\n", base, offset, find_name);
529 
530 	aliases = fdt_path_offset(blob, "/aliases");
531 	for (prop_offset = fdt_first_property_offset(blob, aliases);
532 	     prop_offset > 0;
533 	     prop_offset = fdt_next_property_offset(blob, prop_offset)) {
534 		const char *prop;
535 		const char *name;
536 		const char *slash;
537 		int len, val;
538 
539 		prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
540 		debug("   - %s, %s\n", name, prop);
541 		if (len < find_namelen || *prop != '/' || prop[len - 1] ||
542 		    strncmp(name, base, base_len))
543 			continue;
544 
545 		slash = strrchr(prop, '/');
546 		if (strcmp(slash + 1, find_name))
547 			continue;
548 		val = trailing_strtol(name);
549 		if (val != -1) {
550 			*seqp = val;
551 			debug("Found seq %d\n", *seqp);
552 			return 0;
553 		}
554 	}
555 
556 	debug("Not found\n");
557 	return -ENOENT;
558 }
559 
560 const char *fdtdec_get_chosen_prop(const void *blob, const char *name)
561 {
562 	int chosen_node;
563 
564 	if (!blob)
565 		return NULL;
566 	chosen_node = fdt_path_offset(blob, "/chosen");
567 	return fdt_getprop(blob, chosen_node, name, NULL);
568 }
569 
570 int fdtdec_get_chosen_node(const void *blob, const char *name)
571 {
572 	const char *prop;
573 
574 	prop = fdtdec_get_chosen_prop(blob, name);
575 	if (!prop)
576 		return -FDT_ERR_NOTFOUND;
577 	return fdt_path_offset(blob, prop);
578 }
579 
580 int fdtdec_check_fdt(void)
581 {
582 	/*
583 	 * We must have an FDT, but we cannot panic() yet since the console
584 	 * is not ready. So for now, just assert(). Boards which need an early
585 	 * FDT (prior to console ready) will need to make their own
586 	 * arrangements and do their own checks.
587 	 */
588 	assert(!fdtdec_prepare_fdt());
589 	return 0;
590 }
591 
592 /*
593  * This function is a little odd in that it accesses global data. At some
594  * point if the architecture board.c files merge this will make more sense.
595  * Even now, it is common code.
596  */
597 int fdtdec_prepare_fdt(void)
598 {
599 	if (!gd->fdt_blob || ((uintptr_t)gd->fdt_blob & 3) ||
600 	    fdt_check_header(gd->fdt_blob)) {
601 #ifdef CONFIG_SPL_BUILD
602 		puts("Missing DTB\n");
603 #else
604 		puts("No valid device tree binary found - please append one to U-Boot binary, use u-boot-dtb.bin or define CONFIG_OF_EMBED. For sandbox, use -d <file.dtb>\n");
605 # ifdef DEBUG
606 		if (gd->fdt_blob) {
607 			printf("fdt_blob=%p\n", gd->fdt_blob);
608 			print_buffer((ulong)gd->fdt_blob, gd->fdt_blob, 4,
609 				     32, 0);
610 		}
611 # endif
612 #endif
613 		return -1;
614 	}
615 	return 0;
616 }
617 
618 int fdtdec_lookup_phandle(const void *blob, int node, const char *prop_name)
619 {
620 	const u32 *phandle;
621 	int lookup;
622 
623 	debug("%s: %s\n", __func__, prop_name);
624 	phandle = fdt_getprop(blob, node, prop_name, NULL);
625 	if (!phandle)
626 		return -FDT_ERR_NOTFOUND;
627 
628 	lookup = fdt_node_offset_by_phandle(blob, fdt32_to_cpu(*phandle));
629 	return lookup;
630 }
631 
632 /**
633  * Look up a property in a node and check that it has a minimum length.
634  *
635  * @param blob		FDT blob
636  * @param node		node to examine
637  * @param prop_name	name of property to find
638  * @param min_len	minimum property length in bytes
639  * @param err		0 if ok, or -FDT_ERR_NOTFOUND if the property is not
640 			found, or -FDT_ERR_BADLAYOUT if not enough data
641  * @return pointer to cell, which is only valid if err == 0
642  */
643 static const void *get_prop_check_min_len(const void *blob, int node,
644 		const char *prop_name, int min_len, int *err)
645 {
646 	const void *cell;
647 	int len;
648 
649 	debug("%s: %s\n", __func__, prop_name);
650 	cell = fdt_getprop(blob, node, prop_name, &len);
651 	if (!cell)
652 		*err = -FDT_ERR_NOTFOUND;
653 	else if (len < min_len)
654 		*err = -FDT_ERR_BADLAYOUT;
655 	else
656 		*err = 0;
657 	return cell;
658 }
659 
660 int fdtdec_get_int_array(const void *blob, int node, const char *prop_name,
661 		u32 *array, int count)
662 {
663 	const u32 *cell;
664 	int i, err = 0;
665 
666 	debug("%s: %s\n", __func__, prop_name);
667 	cell = get_prop_check_min_len(blob, node, prop_name,
668 				      sizeof(u32) * count, &err);
669 	if (!err) {
670 		for (i = 0; i < count; i++)
671 			array[i] = fdt32_to_cpu(cell[i]);
672 	}
673 	return err;
674 }
675 
676 int fdtdec_get_int_array_count(const void *blob, int node,
677 			       const char *prop_name, u32 *array, int count)
678 {
679 	const u32 *cell;
680 	int len, elems;
681 	int i;
682 
683 	debug("%s: %s\n", __func__, prop_name);
684 	cell = fdt_getprop(blob, node, prop_name, &len);
685 	if (!cell)
686 		return -FDT_ERR_NOTFOUND;
687 	elems = len / sizeof(u32);
688 	if (count > elems)
689 		count = elems;
690 	for (i = 0; i < count; i++)
691 		array[i] = fdt32_to_cpu(cell[i]);
692 
693 	return count;
694 }
695 
696 const u32 *fdtdec_locate_array(const void *blob, int node,
697 			       const char *prop_name, int count)
698 {
699 	const u32 *cell;
700 	int err;
701 
702 	cell = get_prop_check_min_len(blob, node, prop_name,
703 				      sizeof(u32) * count, &err);
704 	return err ? NULL : cell;
705 }
706 
707 int fdtdec_get_bool(const void *blob, int node, const char *prop_name)
708 {
709 	const s32 *cell;
710 	int len;
711 
712 	debug("%s: %s\n", __func__, prop_name);
713 	cell = fdt_getprop(blob, node, prop_name, &len);
714 	return cell != NULL;
715 }
716 
717 int fdtdec_parse_phandle_with_args(const void *blob, int src_node,
718 				   const char *list_name,
719 				   const char *cells_name,
720 				   int cell_count, int index,
721 				   struct fdtdec_phandle_args *out_args)
722 {
723 	const __be32 *list, *list_end;
724 	int rc = 0, size, cur_index = 0;
725 	uint32_t count = 0;
726 	int node = -1;
727 	int phandle;
728 
729 	/* Retrieve the phandle list property */
730 	list = fdt_getprop(blob, src_node, list_name, &size);
731 	if (!list)
732 		return -ENOENT;
733 	list_end = list + size / sizeof(*list);
734 
735 	/* Loop over the phandles until all the requested entry is found */
736 	while (list < list_end) {
737 		rc = -EINVAL;
738 		count = 0;
739 
740 		/*
741 		 * If phandle is 0, then it is an empty entry with no
742 		 * arguments.  Skip forward to the next entry.
743 		 */
744 		phandle = be32_to_cpup(list++);
745 		if (phandle) {
746 			/*
747 			 * Find the provider node and parse the #*-cells
748 			 * property to determine the argument length.
749 			 *
750 			 * This is not needed if the cell count is hard-coded
751 			 * (i.e. cells_name not set, but cell_count is set),
752 			 * except when we're going to return the found node
753 			 * below.
754 			 */
755 			if (cells_name || cur_index == index) {
756 				node = fdt_node_offset_by_phandle(blob,
757 								  phandle);
758 				if (!node) {
759 					debug("%s: could not find phandle\n",
760 					      fdt_get_name(blob, src_node,
761 							   NULL));
762 					goto err;
763 				}
764 			}
765 
766 			if (cells_name) {
767 				count = fdtdec_get_int(blob, node, cells_name,
768 						       -1);
769 				if (count == -1) {
770 					debug("%s: could not get %s for %s\n",
771 					      fdt_get_name(blob, src_node,
772 							   NULL),
773 					      cells_name,
774 					      fdt_get_name(blob, node,
775 							   NULL));
776 					goto err;
777 				}
778 			} else {
779 				count = cell_count;
780 			}
781 
782 			/*
783 			 * Make sure that the arguments actually fit in the
784 			 * remaining property data length
785 			 */
786 			if (list + count > list_end) {
787 				debug("%s: arguments longer than property\n",
788 				      fdt_get_name(blob, src_node, NULL));
789 				goto err;
790 			}
791 		}
792 
793 		/*
794 		 * All of the error cases above bail out of the loop, so at
795 		 * this point, the parsing is successful. If the requested
796 		 * index matches, then fill the out_args structure and return,
797 		 * or return -ENOENT for an empty entry.
798 		 */
799 		rc = -ENOENT;
800 		if (cur_index == index) {
801 			if (!phandle)
802 				goto err;
803 
804 			if (out_args) {
805 				int i;
806 
807 				if (count > MAX_PHANDLE_ARGS) {
808 					debug("%s: too many arguments %d\n",
809 					      fdt_get_name(blob, src_node,
810 							   NULL), count);
811 					count = MAX_PHANDLE_ARGS;
812 				}
813 				out_args->node = node;
814 				out_args->args_count = count;
815 				for (i = 0; i < count; i++) {
816 					out_args->args[i] =
817 							be32_to_cpup(list++);
818 				}
819 			}
820 
821 			/* Found it! return success */
822 			return 0;
823 		}
824 
825 		node = -1;
826 		list += count;
827 		cur_index++;
828 	}
829 
830 	/*
831 	 * Result will be one of:
832 	 * -ENOENT : index is for empty phandle
833 	 * -EINVAL : parsing error on data
834 	 * [1..n]  : Number of phandle (count mode; when index = -1)
835 	 */
836 	rc = index < 0 ? cur_index : -ENOENT;
837  err:
838 	return rc;
839 }
840 
841 int fdtdec_get_child_count(const void *blob, int node)
842 {
843 	int subnode;
844 	int num = 0;
845 
846 	fdt_for_each_subnode(subnode, blob, node)
847 		num++;
848 
849 	return num;
850 }
851 
852 int fdtdec_get_byte_array(const void *blob, int node, const char *prop_name,
853 		u8 *array, int count)
854 {
855 	const u8 *cell;
856 	int err;
857 
858 	cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
859 	if (!err)
860 		memcpy(array, cell, count);
861 	return err;
862 }
863 
864 const u8 *fdtdec_locate_byte_array(const void *blob, int node,
865 			     const char *prop_name, int count)
866 {
867 	const u8 *cell;
868 	int err;
869 
870 	cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
871 	if (err)
872 		return NULL;
873 	return cell;
874 }
875 
876 int fdtdec_get_config_int(const void *blob, const char *prop_name,
877 		int default_val)
878 {
879 	int config_node;
880 
881 	debug("%s: %s\n", __func__, prop_name);
882 	config_node = fdt_path_offset(blob, "/config");
883 	if (config_node < 0)
884 		return default_val;
885 	return fdtdec_get_int(blob, config_node, prop_name, default_val);
886 }
887 
888 int fdtdec_get_config_bool(const void *blob, const char *prop_name)
889 {
890 	int config_node;
891 	const void *prop;
892 
893 	debug("%s: %s\n", __func__, prop_name);
894 	config_node = fdt_path_offset(blob, "/config");
895 	if (config_node < 0)
896 		return 0;
897 	prop = fdt_get_property(blob, config_node, prop_name, NULL);
898 
899 	return prop != NULL;
900 }
901 
902 char *fdtdec_get_config_string(const void *blob, const char *prop_name)
903 {
904 	const char *nodep;
905 	int nodeoffset;
906 	int len;
907 
908 	debug("%s: %s\n", __func__, prop_name);
909 	nodeoffset = fdt_path_offset(blob, "/config");
910 	if (nodeoffset < 0)
911 		return NULL;
912 
913 	nodep = fdt_getprop(blob, nodeoffset, prop_name, &len);
914 	if (!nodep)
915 		return NULL;
916 
917 	return (char *)nodep;
918 }
919 
920 int fdtdec_decode_region(const void *blob, int node, const char *prop_name,
921 			 fdt_addr_t *basep, fdt_size_t *sizep)
922 {
923 	const fdt_addr_t *cell;
924 	int len;
925 
926 	debug("%s: %s: %s\n", __func__, fdt_get_name(blob, node, NULL),
927 	      prop_name);
928 	cell = fdt_getprop(blob, node, prop_name, &len);
929 	if (!cell || (len < sizeof(fdt_addr_t) * 2)) {
930 		debug("cell=%p, len=%d\n", cell, len);
931 		return -1;
932 	}
933 
934 	*basep = fdt_addr_to_cpu(*cell);
935 	*sizep = fdt_size_to_cpu(cell[1]);
936 	debug("%s: base=%08lx, size=%lx\n", __func__, (ulong)*basep,
937 	      (ulong)*sizep);
938 
939 	return 0;
940 }
941 
942 u64 fdtdec_get_number(const fdt32_t *ptr, unsigned int cells)
943 {
944 	u64 number = 0;
945 
946 	while (cells--)
947 		number = (number << 32) | fdt32_to_cpu(*ptr++);
948 
949 	return number;
950 }
951 
952 int fdt_get_resource(const void *fdt, int node, const char *property,
953 		     unsigned int index, struct fdt_resource *res)
954 {
955 	const fdt32_t *ptr, *end;
956 	int na, ns, len, parent;
957 	unsigned int i = 0;
958 
959 	parent = fdt_parent_offset(fdt, node);
960 	if (parent < 0)
961 		return parent;
962 
963 	na = fdt_address_cells(fdt, parent);
964 	ns = fdt_size_cells(fdt, parent);
965 
966 	ptr = fdt_getprop(fdt, node, property, &len);
967 	if (!ptr)
968 		return len;
969 
970 	end = ptr + len / sizeof(*ptr);
971 
972 	while (ptr + na + ns <= end) {
973 		if (i == index) {
974 			res->start = res->end = fdtdec_get_number(ptr, na);
975 			res->end += fdtdec_get_number(&ptr[na], ns) - 1;
976 			return 0;
977 		}
978 
979 		ptr += na + ns;
980 		i++;
981 	}
982 
983 	return -FDT_ERR_NOTFOUND;
984 }
985 
986 int fdt_get_named_resource(const void *fdt, int node, const char *property,
987 			   const char *prop_names, const char *name,
988 			   struct fdt_resource *res)
989 {
990 	int index;
991 
992 	index = fdt_stringlist_search(fdt, node, prop_names, name);
993 	if (index < 0)
994 		return index;
995 
996 	return fdt_get_resource(fdt, node, property, index, res);
997 }
998 
999 int fdtdec_decode_memory_region(const void *blob, int config_node,
1000 				const char *mem_type, const char *suffix,
1001 				fdt_addr_t *basep, fdt_size_t *sizep)
1002 {
1003 	char prop_name[50];
1004 	const char *mem;
1005 	fdt_size_t size, offset_size;
1006 	fdt_addr_t base, offset;
1007 	int node;
1008 
1009 	if (config_node == -1) {
1010 		config_node = fdt_path_offset(blob, "/config");
1011 		if (config_node < 0) {
1012 			debug("%s: Cannot find /config node\n", __func__);
1013 			return -ENOENT;
1014 		}
1015 	}
1016 	if (!suffix)
1017 		suffix = "";
1018 
1019 	snprintf(prop_name, sizeof(prop_name), "%s-memory%s", mem_type,
1020 		 suffix);
1021 	mem = fdt_getprop(blob, config_node, prop_name, NULL);
1022 	if (!mem) {
1023 		debug("%s: No memory type for '%s', using /memory\n", __func__,
1024 		      prop_name);
1025 		mem = "/memory";
1026 	}
1027 
1028 	node = fdt_path_offset(blob, mem);
1029 	if (node < 0) {
1030 		debug("%s: Failed to find node '%s': %s\n", __func__, mem,
1031 		      fdt_strerror(node));
1032 		return -ENOENT;
1033 	}
1034 
1035 	/*
1036 	 * Not strictly correct - the memory may have multiple banks. We just
1037 	 * use the first
1038 	 */
1039 	if (fdtdec_decode_region(blob, node, "reg", &base, &size)) {
1040 		debug("%s: Failed to decode memory region %s\n", __func__,
1041 		      mem);
1042 		return -EINVAL;
1043 	}
1044 
1045 	snprintf(prop_name, sizeof(prop_name), "%s-offset%s", mem_type,
1046 		 suffix);
1047 	if (fdtdec_decode_region(blob, config_node, prop_name, &offset,
1048 				 &offset_size)) {
1049 		debug("%s: Failed to decode memory region '%s'\n", __func__,
1050 		      prop_name);
1051 		return -EINVAL;
1052 	}
1053 
1054 	*basep = base + offset;
1055 	*sizep = offset_size;
1056 
1057 	return 0;
1058 }
1059 
1060 static int decode_timing_property(const void *blob, int node, const char *name,
1061 				  struct timing_entry *result)
1062 {
1063 	int length, ret = 0;
1064 	const u32 *prop;
1065 
1066 	prop = fdt_getprop(blob, node, name, &length);
1067 	if (!prop) {
1068 		debug("%s: could not find property %s\n",
1069 		      fdt_get_name(blob, node, NULL), name);
1070 		return length;
1071 	}
1072 
1073 	if (length == sizeof(u32)) {
1074 		result->typ = fdtdec_get_int(blob, node, name, 0);
1075 		result->min = result->typ;
1076 		result->max = result->typ;
1077 	} else {
1078 		ret = fdtdec_get_int_array(blob, node, name, &result->min, 3);
1079 	}
1080 
1081 	return ret;
1082 }
1083 
1084 int fdtdec_decode_display_timing(const void *blob, int parent, int index,
1085 				 struct display_timing *dt)
1086 {
1087 	int i, node, timings_node;
1088 	u32 val = 0;
1089 	int ret = 0;
1090 
1091 	timings_node = fdt_subnode_offset(blob, parent, "display-timings");
1092 	if (timings_node < 0)
1093 		return timings_node;
1094 
1095 	for (i = 0, node = fdt_first_subnode(blob, timings_node);
1096 	     node > 0 && i != index;
1097 	     node = fdt_next_subnode(blob, node))
1098 		i++;
1099 
1100 	if (node < 0)
1101 		return node;
1102 
1103 	memset(dt, 0, sizeof(*dt));
1104 
1105 	ret |= decode_timing_property(blob, node, "hback-porch",
1106 				      &dt->hback_porch);
1107 	ret |= decode_timing_property(blob, node, "hfront-porch",
1108 				      &dt->hfront_porch);
1109 	ret |= decode_timing_property(blob, node, "hactive", &dt->hactive);
1110 	ret |= decode_timing_property(blob, node, "hsync-len", &dt->hsync_len);
1111 	ret |= decode_timing_property(blob, node, "vback-porch",
1112 				      &dt->vback_porch);
1113 	ret |= decode_timing_property(blob, node, "vfront-porch",
1114 				      &dt->vfront_porch);
1115 	ret |= decode_timing_property(blob, node, "vactive", &dt->vactive);
1116 	ret |= decode_timing_property(blob, node, "vsync-len", &dt->vsync_len);
1117 	ret |= decode_timing_property(blob, node, "clock-frequency",
1118 				      &dt->pixelclock);
1119 
1120 	dt->flags = 0;
1121 	val = fdtdec_get_int(blob, node, "vsync-active", -1);
1122 	if (val != -1) {
1123 		dt->flags |= val ? DISPLAY_FLAGS_VSYNC_HIGH :
1124 				DISPLAY_FLAGS_VSYNC_LOW;
1125 	}
1126 	val = fdtdec_get_int(blob, node, "hsync-active", -1);
1127 	if (val != -1) {
1128 		dt->flags |= val ? DISPLAY_FLAGS_HSYNC_HIGH :
1129 				DISPLAY_FLAGS_HSYNC_LOW;
1130 	}
1131 	val = fdtdec_get_int(blob, node, "de-active", -1);
1132 	if (val != -1) {
1133 		dt->flags |= val ? DISPLAY_FLAGS_DE_HIGH :
1134 				DISPLAY_FLAGS_DE_LOW;
1135 	}
1136 	val = fdtdec_get_int(blob, node, "pixelclk-active", -1);
1137 	if (val != -1) {
1138 		dt->flags |= val ? DISPLAY_FLAGS_PIXDATA_POSEDGE :
1139 				DISPLAY_FLAGS_PIXDATA_NEGEDGE;
1140 	}
1141 
1142 	if (fdtdec_get_bool(blob, node, "interlaced"))
1143 		dt->flags |= DISPLAY_FLAGS_INTERLACED;
1144 	if (fdtdec_get_bool(blob, node, "doublescan"))
1145 		dt->flags |= DISPLAY_FLAGS_DOUBLESCAN;
1146 	if (fdtdec_get_bool(blob, node, "doubleclk"))
1147 		dt->flags |= DISPLAY_FLAGS_DOUBLECLK;
1148 
1149 	return ret;
1150 }
1151 
1152 int fdtdec_setup_memory_size(void)
1153 {
1154 	int ret, mem;
1155 	struct fdt_resource res;
1156 
1157 	mem = fdt_path_offset(gd->fdt_blob, "/memory");
1158 	if (mem < 0) {
1159 		debug("%s: Missing /memory node\n", __func__);
1160 		return -EINVAL;
1161 	}
1162 
1163 	ret = fdt_get_resource(gd->fdt_blob, mem, "reg", 0, &res);
1164 	if (ret != 0) {
1165 		debug("%s: Unable to decode first memory bank\n", __func__);
1166 		return -EINVAL;
1167 	}
1168 
1169 	gd->ram_size = (phys_size_t)(res.end - res.start + 1);
1170 	debug("%s: Initial DRAM size %llx\n", __func__,
1171 	      (unsigned long long)gd->ram_size);
1172 
1173 	return 0;
1174 }
1175 
1176 #if defined(CONFIG_NR_DRAM_BANKS)
1177 int fdtdec_setup_memory_banksize(void)
1178 {
1179 	int bank, ret, mem, reg = 0;
1180 	struct fdt_resource res;
1181 
1182 	mem = fdt_node_offset_by_prop_value(gd->fdt_blob, -1, "device_type",
1183 					    "memory", 7);
1184 	if (mem < 0) {
1185 		debug("%s: Missing /memory node\n", __func__);
1186 		return -EINVAL;
1187 	}
1188 
1189 	for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
1190 		ret = fdt_get_resource(gd->fdt_blob, mem, "reg", reg++, &res);
1191 		if (ret == -FDT_ERR_NOTFOUND) {
1192 			reg = 0;
1193 			mem = fdt_node_offset_by_prop_value(gd->fdt_blob, mem,
1194 							    "device_type",
1195 							    "memory", 7);
1196 			if (mem == -FDT_ERR_NOTFOUND)
1197 				break;
1198 
1199 			ret = fdt_get_resource(gd->fdt_blob, mem, "reg", reg++, &res);
1200 			if (ret == -FDT_ERR_NOTFOUND)
1201 				break;
1202 		}
1203 		if (ret != 0) {
1204 			return -EINVAL;
1205 		}
1206 
1207 		gd->bd->bi_dram[bank].start = (phys_addr_t)res.start;
1208 		gd->bd->bi_dram[bank].size =
1209 			(phys_size_t)(res.end - res.start + 1);
1210 
1211 		debug("%s: DRAM Bank #%d: start = 0x%llx, size = 0x%llx\n",
1212 		      __func__, bank,
1213 		      (unsigned long long)gd->bd->bi_dram[bank].start,
1214 		      (unsigned long long)gd->bd->bi_dram[bank].size);
1215 	}
1216 
1217 	return 0;
1218 }
1219 #endif
1220 
1221 #if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
1222 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_GZIP) ||\
1223 	CONFIG_IS_ENABLED(MULTI_DTB_FIT_LZO)
1224 static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
1225 {
1226 	size_t sz_out = CONFIG_SPL_MULTI_DTB_FIT_UNCOMPRESS_SZ;
1227 	ulong sz_in = sz_src;
1228 	void *dst;
1229 	int rc;
1230 
1231 	if (CONFIG_IS_ENABLED(GZIP))
1232 		if (gzip_parse_header(src, sz_in) < 0)
1233 			return -1;
1234 	if (CONFIG_IS_ENABLED(LZO))
1235 		if (!lzop_is_valid_header(src))
1236 			return -EBADMSG;
1237 
1238 	if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC)) {
1239 		dst = malloc(sz_out);
1240 		if (!dst) {
1241 			puts("uncompress_blob: Unable to allocate memory\n");
1242 			return -ENOMEM;
1243 		}
1244 	} else  {
1245 #  if CONFIG_IS_ENABLED(MULTI_DTB_FIT_USER_DEFINED_AREA)
1246 		dst = (void *)CONFIG_VAL(MULTI_DTB_FIT_USER_DEF_ADDR);
1247 #  else
1248 		return -ENOTSUPP;
1249 #  endif
1250 	}
1251 
1252 	if (CONFIG_IS_ENABLED(GZIP))
1253 		rc = gunzip(dst, sz_out, (u8 *)src, &sz_in);
1254 	else if (CONFIG_IS_ENABLED(LZO))
1255 		rc = lzop_decompress(src, sz_in, dst, &sz_out);
1256 
1257 	if (rc < 0) {
1258 		/* not a valid compressed blob */
1259 		puts("uncompress_blob: Unable to uncompress\n");
1260 		if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC))
1261 			free(dst);
1262 		return -EBADMSG;
1263 	}
1264 	*dstp = dst;
1265 	return 0;
1266 }
1267 # else
1268 static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
1269 {
1270 	return -ENOTSUPP;
1271 }
1272 # endif
1273 #endif
1274 
1275 int fdtdec_setup(void)
1276 {
1277 #if CONFIG_IS_ENABLED(OF_CONTROL)
1278 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
1279 	void *fdt_blob;
1280 # endif
1281 # ifdef CONFIG_OF_EMBED
1282 	/* Get a pointer to the FDT */
1283 #  ifdef CONFIG_SPL_BUILD
1284 	gd->fdt_blob = __dtb_dt_spl_begin;
1285 #  else
1286 	gd->fdt_blob = __dtb_dt_begin;
1287 #  endif
1288 # elif defined CONFIG_OF_SEPARATE
1289 #  ifdef CONFIG_SPL_BUILD
1290 	/* FDT is at end of BSS unless it is in a different memory region */
1291 	if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS))
1292 		gd->fdt_blob = (ulong *)&_image_binary_end;
1293 	else
1294 		gd->fdt_blob = (ulong *)&__bss_end;
1295 #  else
1296 	/* FDT is at end of image */
1297 	gd->fdt_blob = (ulong *)&_end;
1298 #  endif
1299 # elif defined(CONFIG_OF_BOARD)
1300 	/* Allow the board to override the fdt address. */
1301 	gd->fdt_blob = board_fdt_blob_setup();
1302 # elif defined(CONFIG_OF_HOSTFILE)
1303 	if (sandbox_read_fdt_from_file()) {
1304 		puts("Failed to read control FDT\n");
1305 		return -1;
1306 	}
1307 # endif
1308 # ifndef CONFIG_SPL_BUILD
1309 	/* Allow the early environment to override the fdt address */
1310 	gd->fdt_blob = (void *)env_get_ulong("fdtcontroladdr", 16,
1311 						(uintptr_t)gd->fdt_blob);
1312 # endif
1313 
1314 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
1315 	/*
1316 	 * Try and uncompress the blob.
1317 	 * Unfortunately there is no way to know how big the input blob really
1318 	 * is. So let us set the maximum input size arbitrarily high. 16MB
1319 	 * ought to be more than enough for packed DTBs.
1320 	 */
1321 	if (uncompress_blob(gd->fdt_blob, 0x1000000, &fdt_blob) == 0)
1322 		gd->fdt_blob = fdt_blob;
1323 
1324 	/*
1325 	 * Check if blob is a FIT images containings DTBs.
1326 	 * If so, pick the most relevant
1327 	 */
1328 	fdt_blob = locate_dtb_in_fit(gd->fdt_blob);
1329 	if (fdt_blob)
1330 		gd->fdt_blob = fdt_blob;
1331 # endif
1332 #endif
1333 
1334 	return fdtdec_prepare_fdt();
1335 }
1336 
1337 #endif /* !USE_HOSTCC */
1338