1 /* 2 * (C) Copyright 2012-2013, Xilinx, Michal Simek 3 * 4 * (C) Copyright 2012 5 * Joe Hershberger <joe.hershberger@ni.com> 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #ifndef _ZYNQPL_H_ 11 #define _ZYNQPL_H_ 12 13 #include <xilinx.h> 14 15 extern struct xilinx_fpga_op zynq_op; 16 17 #define XILINX_ZYNQ_7010 0x2 18 #define XILINX_ZYNQ_7015 0x1b 19 #define XILINX_ZYNQ_7020 0x7 20 #define XILINX_ZYNQ_7030 0xc 21 #define XILINX_ZYNQ_7045 0x11 22 #define XILINX_ZYNQ_7100 0x16 23 24 /* Device Image Sizes */ 25 #define XILINX_XC7Z010_SIZE 16669920/8 26 #define XILINX_XC7Z015_SIZE 28085344/8 27 #define XILINX_XC7Z020_SIZE 32364512/8 28 #define XILINX_XC7Z030_SIZE 47839328/8 29 #define XILINX_XC7Z045_SIZE 106571232/8 30 #define XILINX_XC7Z100_SIZE 139330784/8 31 32 /* Descriptor Macros */ 33 #define XILINX_XC7Z010_DESC(cookie) \ 34 { xilinx_zynq, devcfg, XILINX_XC7Z010_SIZE, NULL, cookie, &zynq_op, "7z010" } 35 36 #define XILINX_XC7Z015_DESC(cookie) \ 37 { xilinx_zynq, devcfg, XILINX_XC7Z015_SIZE, NULL, cookie, &zynq_op, "7z015" } 38 39 #define XILINX_XC7Z020_DESC(cookie) \ 40 { xilinx_zynq, devcfg, XILINX_XC7Z020_SIZE, NULL, cookie, &zynq_op, "7z020" } 41 42 #define XILINX_XC7Z030_DESC(cookie) \ 43 { xilinx_zynq, devcfg, XILINX_XC7Z030_SIZE, NULL, cookie, &zynq_op, "7z030" } 44 45 #define XILINX_XC7Z045_DESC(cookie) \ 46 { xilinx_zynq, devcfg, XILINX_XC7Z045_SIZE, NULL, cookie, &zynq_op, "7z045" } 47 48 #define XILINX_XC7Z100_DESC(cookie) \ 49 { xilinx_zynq, devcfg, XILINX_XC7Z100_SIZE, NULL, cookie, &zynq_op, "7z100" } 50 51 #endif /* _ZYNQPL_H_ */ 52