1 /* 2 * (C) Copyright 2002 3 * Rich Ireland, Enterasys Networks, rireland@enterasys.com. 4 * Keith Outwater, keith_outwater@mvis.com 5 * 6 * See file CREDITS for list of people who contributed to this 7 * project. 8 * 9 * This program is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License as 11 * published by the Free Software Foundation; either version 2 of 12 * the License, or (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 22 * MA 02111-1307 USA 23 * 24 */ 25 26 #ifndef _VIRTEX2_H_ 27 #define _VIRTEX2_H_ 28 29 #include <xilinx.h> 30 31 extern int Virtex2_load( Xilinx_desc *desc, void *image, size_t size ); 32 extern int Virtex2_dump( Xilinx_desc *desc, void *buf, size_t bsize ); 33 extern int Virtex2_info( Xilinx_desc *desc ); 34 extern int Virtex2_reloc( Xilinx_desc *desc, ulong reloc_off ); 35 36 /* 37 * Slave SelectMap Implementation function table. 38 */ 39 typedef struct { 40 Xilinx_pre_fn pre; 41 Xilinx_pgm_fn pgm; 42 Xilinx_init_fn init; 43 Xilinx_err_fn err; 44 Xilinx_done_fn done; 45 Xilinx_clk_fn clk; 46 Xilinx_cs_fn cs; 47 Xilinx_wr_fn wr; 48 Xilinx_rdata_fn rdata; 49 Xilinx_wdata_fn wdata; 50 Xilinx_busy_fn busy; 51 Xilinx_abort_fn abort; 52 Xilinx_post_fn post; 53 int relocated; 54 } Xilinx_Virtex2_Slave_SelectMap_fns; 55 56 /* Slave Serial Implementation function table */ 57 typedef struct { 58 Xilinx_pgm_fn pgm; 59 Xilinx_clk_fn clk; 60 Xilinx_rdata_fn rdata; 61 Xilinx_wdata_fn wdata; 62 int relocated; 63 } Xilinx_Virtex2_Slave_Serial_fns; 64 65 /* Device Image Sizes (in bytes) 66 *********************************************************************/ 67 #define XILINX_XC2V40_SIZE (338208 / 8) 68 #define XILINX_XC2V80_SIZE (597408 / 8) 69 #define XILINX_XC2V250_SIZE (1591584 / 8) 70 #define XILINX_XC2V500_SIZE (2557857 / 8) 71 #define XILINX_XC2V1000_SIZE (3749408 / 8) 72 #define XILINX_XC2V1500_SIZE (5166240 / 8) 73 #define XILINX_XC2V2000_SIZE (6808352 / 8) 74 #define XILINX_XC2V3000_SIZE (9589408 / 8) 75 #define XILINX_XC2V4000_SIZE (14220192 / 8) 76 #define XILINX_XC2V6000_SIZE (19752096 / 8) 77 #define XILINX_XC2V8000_SIZE (26185120 / 8) 78 #define XILINX_XC2V10000_SIZE (33519264 / 8) 79 80 /* Descriptor Macros 81 *********************************************************************/ 82 #define XILINX_XC2V40_DESC(iface, fn_table, cookie) \ 83 { Xilinx_Virtex2, iface, XILINX_XC2V40_SIZE, fn_table, cookie } 84 85 #define XILINX_XC2V80_DESC(iface, fn_table, cookie) \ 86 { Xilinx_Virtex2, iface, XILINX_XC2V80_SIZE, fn_table, cookie } 87 88 #define XILINX_XC2V250_DESC(iface, fn_table, cookie) \ 89 { Xilinx_Virtex2, iface, XILINX_XC2V250_SIZE, fn_table, cookie } 90 91 #define XILINX_XC2V500_DESC(iface, fn_table, cookie) \ 92 { Xilinx_Virtex2, iface, XILINX_XC2V500_SIZE, fn_table, cookie } 93 94 #define XILINX_XC2V1000_DESC(iface, fn_table, cookie) \ 95 { Xilinx_Virtex2, iface, XILINX_XC2V1000_SIZE, fn_table, cookie } 96 97 #define XILINX_XC2V1500_DESC(iface, fn_table, cookie) \ 98 { Xilinx_Virtex2, iface, XILINX_XC2V1500_SIZE, fn_table, cookie } 99 100 #define XILINX_XC2V2000_DESC(iface, fn_table, cookie) \ 101 { Xilinx_Virtex2, iface, XILINX_XC2V2000_SIZE, fn_table, cookie } 102 103 #define XILINX_XC2V3000_DESC(iface, fn_table, cookie) \ 104 { Xilinx_Virtex2, iface, XILINX_XC2V3000_SIZE, fn_table, cookie } 105 106 #define XILINX_XC2V4000_DESC(iface, fn_table, cookie) \ 107 { Xilinx_Virtex2, iface, XILINX_XC2V4000_SIZE, fn_table, cookie } 108 109 #define XILINX_XC2V6000_DESC(iface, fn_table, cookie) \ 110 { Xilinx_Virtex2, iface, XILINX_XC2V6000_SIZE, fn_table, cookie } 111 112 #define XILINX_XC2V8000_DESC(iface, fn_table, cookie) \ 113 { Xilinx_Virtex2, iface, XILINX_XC2V8000_SIZE, fn_table, cookie } 114 115 #define XILINX_XC2V10000_DESC(iface, fn_table, cookie) \ 116 { Xilinx_Virtex2, iface, XILINX_XC2V10000_SIZE, fn_table, cookie } 117 118 #endif /* _VIRTEX2_H_ */ 119 120 /* vim: set ts=4 tw=78: */ 121