1 /* 2 * Generic ULPI interface. 3 * 4 * Copyright (C) 2011 Jana Rapava <fermata7@gmail.com> 5 * Copyright (C) 2011 CompuLab, Ltd. <www.compulab.co.il> 6 * 7 * Authors: Jana Rapava <fermata7@gmail.com> 8 * Igor Grinberg <grinberg@compulab.co.il> 9 * 10 * Register offsets taken from: 11 * linux/include/linux/usb/ulpi.h 12 * 13 * Original Copyrights follow: 14 * Copyright (C) 2010 Nokia Corporation 15 * 16 * This software is distributed under the terms of the GNU General 17 * Public License ("GPL") as published by the Free Software Foundation, 18 * version 2 of that License. 19 */ 20 21 #ifndef __USB_ULPI_H__ 22 #define __USB_ULPI_H__ 23 24 #define ULPI_ERROR (1 << 8) /* overflow from any register value */ 25 26 #ifndef CONFIG_USB_ULPI_TIMEOUT 27 #define CONFIG_USB_ULPI_TIMEOUT 1000 /* timeout in us */ 28 #endif 29 30 /* 31 * Initialize the ULPI transciever and check the interface integrity. 32 * @ulpi_viewport - the address of the ULPI viewport register. 33 * 34 * returns 0 on success, ULPI_ERROR on failure. 35 */ 36 int ulpi_init(u32 ulpi_viewport); 37 38 /* 39 * Select transceiver speed. 40 * @speed - ULPI_FC_HIGH_SPEED, ULPI_FC_FULL_SPEED (default), 41 * ULPI_FC_LOW_SPEED, ULPI_FC_FS4LS 42 * returns 0 on success, ULPI_ERROR on failure. 43 */ 44 int ulpi_select_transceiver(u32 ulpi_viewport, unsigned speed); 45 46 /* 47 * Enable/disable VBUS. 48 * @ext_power - external VBUS supply is used (default is false) 49 * @ext_indicator - external VBUS over-current indicator is used 50 * 51 * returns 0 on success, ULPI_ERROR on failure. 52 */ 53 int ulpi_enable_vbus(u32 ulpi_viewport, int on, int ext_power, int ext_ind); 54 55 /* 56 * Enable/disable pull-down resistors on D+ and D- USB lines. 57 * 58 * returns 0 on success, ULPI_ERROR on failure. 59 */ 60 int ulpi_set_pd(u32 ulpi_viewport, int enable); 61 62 /* 63 * Select OpMode. 64 * @opmode - ULPI_FC_OPMODE_NORMAL (default), ULPI_FC_OPMODE_NONDRIVING, 65 * ULPI_FC_OPMODE_DISABLE_NRZI, ULPI_FC_OPMODE_NOSYNC_NOEOP 66 * 67 * returns 0 on success, ULPI_ERROR on failure. 68 */ 69 int ulpi_opmode_sel(u32 ulpi_viewport, unsigned opmode); 70 71 /* 72 * Switch to Serial Mode. 73 * @smode - ULPI_IFACE_6_PIN_SERIAL_MODE or ULPI_IFACE_3_PIN_SERIAL_MODE 74 * 75 * returns 0 on success, ULPI_ERROR on failure. 76 * 77 * Notes: 78 * Switches immediately to Serial Mode. 79 * To return from Serial Mode, STP line needs to be asserted. 80 */ 81 int ulpi_serial_mode_enable(u32 ulpi_viewport, unsigned smode); 82 83 /* 84 * Put PHY into low power mode. 85 * 86 * returns 0 on success, ULPI_ERROR on failure. 87 * 88 * Notes: 89 * STP line must be driven low to keep the PHY in suspend. 90 * To resume the PHY, STP line needs to be asserted. 91 */ 92 int ulpi_suspend(u32 ulpi_viewport); 93 94 /* 95 * Reset the transceiver. ULPI interface and registers are not affected. 96 * 97 * returns 0 on success, ULPI_ERROR on failure. 98 */ 99 int ulpi_reset(u32 ulpi_viewport); 100 101 102 /* ULPI access methods below must be implemented for each ULPI viewport. */ 103 104 /* 105 * Write to the ULPI PHY register via the viewport. 106 * @reg - the ULPI register (one of the fields in struct ulpi_regs). 107 * @value - the value - only 8 lower bits are used, others ignored. 108 * 109 * returns 0 on success, ULPI_ERROR on failure. 110 */ 111 int ulpi_write(u32 ulpi_viewport, u8 *reg, u32 value); 112 113 /* 114 * Read the ULPI PHY register content via the viewport. 115 * @reg - the ULPI register (one of the fields in struct ulpi_regs). 116 * 117 * returns register content on success, ULPI_ERROR on failure. 118 */ 119 u32 ulpi_read(u32 ulpi_viewport, u8 *reg); 120 121 /* 122 * Wait for the reset to complete. 123 * The Link must not attempt to access the PHY until the reset has 124 * completed and DIR line is de-asserted. 125 */ 126 int ulpi_reset_wait(u32 ulpi_viewport); 127 128 /* Access Extended Register Set (indicator) */ 129 #define ACCESS_EXT_REGS_OFFSET 0x2f /* read-write */ 130 /* Vendor-specific */ 131 #define VENDOR_SPEC_OFFSET 0x30 132 133 /* 134 * Extended Register Set 135 * 136 * Addresses 0x00-0x3F map directly to Immediate Register Set. 137 * Addresses 0x40-0x7F are reserved. 138 * Addresses 0x80-0xff are vendor-specific. 139 */ 140 #define EXT_VENDOR_SPEC_OFFSET 0x80 141 142 /* ULPI registers, bits and offsets definitions */ 143 struct ulpi_regs { 144 /* Vendor ID and Product ID: 0x00 - 0x03 Read-only */ 145 u8 vendor_id_low; 146 u8 vendor_id_high; 147 u8 product_id_low; 148 u8 product_id_high; 149 /* Function Control: 0x04 - 0x06 Read */ 150 u8 function_ctrl; /* 0x04 Write */ 151 u8 function_ctrl_set; /* 0x05 Set */ 152 u8 function_ctrl_clear; /* 0x06 Clear */ 153 /* Interface Control: 0x07 - 0x09 Read */ 154 u8 iface_ctrl; /* 0x07 Write */ 155 u8 iface_ctrl_set; /* 0x08 Set */ 156 u8 iface_ctrl_clear; /* 0x09 Clear */ 157 /* OTG Control: 0x0A - 0x0C Read */ 158 u8 otg_ctrl; /* 0x0A Write */ 159 u8 otg_ctrl_set; /* 0x0B Set */ 160 u8 otg_ctrl_clear; /* 0x0C Clear */ 161 /* USB Interrupt Enable Rising: 0x0D - 0x0F Read */ 162 u8 usb_ie_rising; /* 0x0D Write */ 163 u8 usb_ie_rising_set; /* 0x0E Set */ 164 u8 usb_ie_rising_clear; /* 0x0F Clear */ 165 /* USB Interrupt Enable Falling: 0x10 - 0x12 Read */ 166 u8 usb_ie_falling; /* 0x10 Write */ 167 u8 usb_ie_falling_set; /* 0x11 Set */ 168 u8 usb_ie_falling_clear; /* 0x12 Clear */ 169 /* USB Interrupt Status: 0x13 Read-only */ 170 u8 usb_int_status; 171 /* USB Interrupt Latch: 0x14 Read-only with auto-clear */ 172 u8 usb_int_latch; 173 /* Debug: 0x15 Read-only */ 174 u8 debug; 175 /* Scratch Register: 0x16 - 0x18 Read */ 176 u8 scratch; /* 0x16 Write */ 177 u8 scratch_set; /* 0x17 Set */ 178 u8 scratch_clear; /* 0x18 Clear */ 179 /* 180 * Optional Carkit registers: 181 * Carkit Control: 0x19 - 0x1B Read 182 */ 183 u8 carkit_ctrl; /* 0x19 Write */ 184 u8 carkit_ctrl_set; /* 0x1A Set */ 185 u8 carkit_ctrl_clear; /* 0x1B Clear */ 186 /* Carkit Interrupt Delay: 0x1C Read, Write */ 187 u8 carkit_int_delay; 188 /* Carkit Interrupt Enable: 0x1D - 0x1F Read */ 189 u8 carkit_ie; /* 0x1D Write */ 190 u8 carkit_ie_set; /* 0x1E Set */ 191 u8 carkit_ie_clear; /* 0x1F Clear */ 192 /* Carkit Interrupt Status: 0x20 Read-only */ 193 u8 carkit_int_status; 194 /* Carkit Interrupt Latch: 0x21 Read-only with auto-clear */ 195 u8 carkit_int_latch; 196 /* Carkit Pulse Control: 0x22 - 0x24 Read */ 197 u8 carkit_pulse_ctrl; /* 0x22 Write */ 198 u8 carkit_pulse_ctrl_set; /* 0x23 Set */ 199 u8 carkit_pulse_ctrl_clear; /* 0x24 Clear */ 200 /* 201 * Other optional registers: 202 * Transmit Positive Width: 0x25 Read, Write 203 */ 204 u8 transmit_pos_width; 205 /* Transmit Negative Width: 0x26 Read, Write */ 206 u8 transmit_neg_width; 207 /* Receive Polarity Recovery: 0x27 Read, Write */ 208 u8 recv_pol_recovery; 209 /* 210 * Addresses 0x28 - 0x2E are reserved, so we use offsets 211 * for immediate registers with higher addresses 212 */ 213 }; 214 215 /* 216 * Register Bits 217 */ 218 219 /* Function Control */ 220 #define ULPI_FC_XCVRSEL_MASK (3 << 0) 221 #define ULPI_FC_HIGH_SPEED (0 << 0) 222 #define ULPI_FC_FULL_SPEED (1 << 0) 223 #define ULPI_FC_LOW_SPEED (2 << 0) 224 #define ULPI_FC_FS4LS (3 << 0) 225 #define ULPI_FC_TERMSELECT (1 << 2) 226 #define ULPI_FC_OPMODE_MASK (3 << 3) 227 #define ULPI_FC_OPMODE_NORMAL (0 << 3) 228 #define ULPI_FC_OPMODE_NONDRIVING (1 << 3) 229 #define ULPI_FC_OPMODE_DISABLE_NRZI (2 << 3) 230 #define ULPI_FC_OPMODE_NOSYNC_NOEOP (3 << 3) 231 #define ULPI_FC_RESET (1 << 5) 232 #define ULPI_FC_SUSPENDM (1 << 6) 233 234 /* Interface Control */ 235 #define ULPI_IFACE_6_PIN_SERIAL_MODE (1 << 0) 236 #define ULPI_IFACE_3_PIN_SERIAL_MODE (1 << 1) 237 #define ULPI_IFACE_CARKITMODE (1 << 2) 238 #define ULPI_IFACE_CLOCKSUSPENDM (1 << 3) 239 #define ULPI_IFACE_AUTORESUME (1 << 4) 240 #define ULPI_IFACE_EXTVBUS_COMPLEMENT (1 << 5) 241 #define ULPI_IFACE_PASSTHRU (1 << 6) 242 #define ULPI_IFACE_PROTECT_IFC_DISABLE (1 << 7) 243 244 /* OTG Control */ 245 #define ULPI_OTG_ID_PULLUP (1 << 0) 246 #define ULPI_OTG_DP_PULLDOWN (1 << 1) 247 #define ULPI_OTG_DM_PULLDOWN (1 << 2) 248 #define ULPI_OTG_DISCHRGVBUS (1 << 3) 249 #define ULPI_OTG_CHRGVBUS (1 << 4) 250 #define ULPI_OTG_DRVVBUS (1 << 5) 251 #define ULPI_OTG_DRVVBUS_EXT (1 << 6) 252 #define ULPI_OTG_EXTVBUSIND (1 << 7) 253 254 /* 255 * USB Interrupt Enable Rising, 256 * USB Interrupt Enable Falling, 257 * USB Interrupt Status and 258 * USB Interrupt Latch 259 */ 260 #define ULPI_INT_HOST_DISCONNECT (1 << 0) 261 #define ULPI_INT_VBUS_VALID (1 << 1) 262 #define ULPI_INT_SESS_VALID (1 << 2) 263 #define ULPI_INT_SESS_END (1 << 3) 264 #define ULPI_INT_IDGRD (1 << 4) 265 266 /* Debug */ 267 #define ULPI_DEBUG_LINESTATE0 (1 << 0) 268 #define ULPI_DEBUG_LINESTATE1 (1 << 1) 269 270 /* Carkit Control */ 271 #define ULPI_CARKIT_CTRL_CARKITPWR (1 << 0) 272 #define ULPI_CARKIT_CTRL_IDGNDDRV (1 << 1) 273 #define ULPI_CARKIT_CTRL_TXDEN (1 << 2) 274 #define ULPI_CARKIT_CTRL_RXDEN (1 << 3) 275 #define ULPI_CARKIT_CTRL_SPKLEFTEN (1 << 4) 276 #define ULPI_CARKIT_CTRL_SPKRIGHTEN (1 << 5) 277 #define ULPI_CARKIT_CTRL_MICEN (1 << 6) 278 279 /* Carkit Interrupt Enable */ 280 #define ULPI_CARKIT_INT_EN_IDFLOAT_RISE (1 << 0) 281 #define ULPI_CARKIT_INT_EN_IDFLOAT_FALL (1 << 1) 282 #define ULPI_CARKIT_INT_EN_CARINTDET (1 << 2) 283 #define ULPI_CARKIT_INT_EN_DP_RISE (1 << 3) 284 #define ULPI_CARKIT_INT_EN_DP_FALL (1 << 4) 285 286 /* Carkit Interrupt Status and Latch */ 287 #define ULPI_CARKIT_INT_IDFLOAT (1 << 0) 288 #define ULPI_CARKIT_INT_CARINTDET (1 << 1) 289 #define ULPI_CARKIT_INT_DP (1 << 2) 290 291 /* Carkit Pulse Control*/ 292 #define ULPI_CARKIT_PLS_CTRL_TXPLSEN (1 << 0) 293 #define ULPI_CARKIT_PLS_CTRL_RXPLSEN (1 << 1) 294 #define ULPI_CARKIT_PLS_CTRL_SPKRLEFT_BIASEN (1 << 2) 295 #define ULPI_CARKIT_PLS_CTRL_SPKRRIGHT_BIASEN (1 << 3) 296 297 298 #endif /* __USB_ULPI_H__ */ 299