1 /* 2 * Generic ULPI interface. 3 * 4 * Copyright (C) 2011 Jana Rapava <fermata7@gmail.com> 5 * Copyright (C) 2011 CompuLab, Ltd. <www.compulab.co.il> 6 * 7 * Authors: Jana Rapava <fermata7@gmail.com> 8 * Igor Grinberg <grinberg@compulab.co.il> 9 * 10 * Register offsets taken from: 11 * linux/include/linux/usb/ulpi.h 12 * 13 * Original Copyrights follow: 14 * Copyright (C) 2010 Nokia Corporation 15 * 16 * SPDX-License-Identifier: GPL-2.0 17 */ 18 19 #ifndef __USB_ULPI_H__ 20 #define __USB_ULPI_H__ 21 22 #define ULPI_ERROR (1 << 8) /* overflow from any register value */ 23 24 #ifndef CONFIG_USB_ULPI_TIMEOUT 25 #define CONFIG_USB_ULPI_TIMEOUT 1000 /* timeout in us */ 26 #endif 27 28 /* 29 * ulpi view port address and 30 * Port_number that can be passed. 31 * Any additional data to be passed can 32 * be extended from this structure 33 */ 34 struct ulpi_viewport { 35 uintptr_t viewport_addr; 36 u32 port_num; 37 }; 38 39 /* 40 * Initialize the ULPI transciever and check the interface integrity. 41 * @ulpi_vp - structure containing ULPI viewport data 42 * 43 * returns 0 on success, ULPI_ERROR on failure. 44 */ 45 int ulpi_init(struct ulpi_viewport *ulpi_vp); 46 47 /* 48 * Select transceiver speed. 49 * @speed - ULPI_FC_HIGH_SPEED, ULPI_FC_FULL_SPEED (default), 50 * ULPI_FC_LOW_SPEED, ULPI_FC_FS4LS 51 * returns 0 on success, ULPI_ERROR on failure. 52 */ 53 int ulpi_select_transceiver(struct ulpi_viewport *ulpi_vp, unsigned speed); 54 55 /* 56 * Enable/disable VBUS. 57 * @ext_power - external VBUS supply is used (default is false) 58 * @ext_indicator - external VBUS over-current indicator is used 59 * 60 * returns 0 on success, ULPI_ERROR on failure. 61 */ 62 int ulpi_set_vbus(struct ulpi_viewport *ulpi_vp, int on, int ext_power); 63 64 /* 65 * Configure VBUS indicator 66 * @external - external VBUS over-current indicator is used 67 * @passthru - disables ANDing of internal VBUS comparator 68 * with external VBUS input 69 * @complement - inverts the external VBUS input 70 */ 71 int ulpi_set_vbus_indicator(struct ulpi_viewport *ulpi_vp, int external, 72 int passthru, int complement); 73 74 /* 75 * Enable/disable pull-down resistors on D+ and D- USB lines. 76 * 77 * returns 0 on success, ULPI_ERROR on failure. 78 */ 79 int ulpi_set_pd(struct ulpi_viewport *ulpi_vp, int enable); 80 81 /* 82 * Select OpMode. 83 * @opmode - ULPI_FC_OPMODE_NORMAL (default), ULPI_FC_OPMODE_NONDRIVING, 84 * ULPI_FC_OPMODE_DISABLE_NRZI, ULPI_FC_OPMODE_NOSYNC_NOEOP 85 * 86 * returns 0 on success, ULPI_ERROR on failure. 87 */ 88 int ulpi_opmode_sel(struct ulpi_viewport *ulpi_vp, unsigned opmode); 89 90 /* 91 * Switch to Serial Mode. 92 * @smode - ULPI_IFACE_6_PIN_SERIAL_MODE or ULPI_IFACE_3_PIN_SERIAL_MODE 93 * 94 * returns 0 on success, ULPI_ERROR on failure. 95 * 96 * Notes: 97 * Switches immediately to Serial Mode. 98 * To return from Serial Mode, STP line needs to be asserted. 99 */ 100 int ulpi_serial_mode_enable(struct ulpi_viewport *ulpi_vp, unsigned smode); 101 102 /* 103 * Put PHY into low power mode. 104 * 105 * returns 0 on success, ULPI_ERROR on failure. 106 * 107 * Notes: 108 * STP line must be driven low to keep the PHY in suspend. 109 * To resume the PHY, STP line needs to be asserted. 110 */ 111 int ulpi_suspend(struct ulpi_viewport *ulpi_vp); 112 113 /* 114 * Reset the transceiver. ULPI interface and registers are not affected. 115 * 116 * returns 0 on success, ULPI_ERROR on failure. 117 */ 118 int ulpi_reset(struct ulpi_viewport *ulpi_vp); 119 120 121 /* ULPI access methods below must be implemented for each ULPI viewport. */ 122 123 /* 124 * Write to the ULPI PHY register via the viewport. 125 * @reg - the ULPI register (one of the fields in struct ulpi_regs). 126 * Due to ULPI design, only 8 lsb of address are used. 127 * @value - the value - only 8 lower bits are used, others ignored. 128 * 129 * returns 0 on success, ULPI_ERROR on failure. 130 */ 131 int ulpi_write(struct ulpi_viewport *ulpi_vp, u8 *reg, u32 value); 132 133 /* 134 * Read the ULPI PHY register content via the viewport. 135 * @reg - the ULPI register (one of the fields in struct ulpi_regs). 136 * Due to ULPI design, only 8 lsb of address are used. 137 * 138 * returns register content on success, ULPI_ERROR on failure. 139 */ 140 u32 ulpi_read(struct ulpi_viewport *ulpi_vp, u8 *reg); 141 142 /* 143 * Wait for the reset to complete. 144 * The Link must not attempt to access the PHY until the reset has 145 * completed and DIR line is de-asserted. 146 */ 147 int ulpi_reset_wait(struct ulpi_viewport *ulpi_vp); 148 149 /* Access Extended Register Set (indicator) */ 150 #define ACCESS_EXT_REGS_OFFSET 0x2f /* read-write */ 151 /* Vendor-specific */ 152 #define VENDOR_SPEC_OFFSET 0x30 153 154 /* 155 * Extended Register Set 156 * 157 * Addresses 0x00-0x3F map directly to Immediate Register Set. 158 * Addresses 0x40-0x7F are reserved. 159 * Addresses 0x80-0xff are vendor-specific. 160 */ 161 #define EXT_VENDOR_SPEC_OFFSET 0x80 162 163 /* ULPI registers, bits and offsets definitions */ 164 struct ulpi_regs { 165 /* Vendor ID and Product ID: 0x00 - 0x03 Read-only */ 166 u8 vendor_id_low; 167 u8 vendor_id_high; 168 u8 product_id_low; 169 u8 product_id_high; 170 /* Function Control: 0x04 - 0x06 Read */ 171 u8 function_ctrl; /* 0x04 Write */ 172 u8 function_ctrl_set; /* 0x05 Set */ 173 u8 function_ctrl_clear; /* 0x06 Clear */ 174 /* Interface Control: 0x07 - 0x09 Read */ 175 u8 iface_ctrl; /* 0x07 Write */ 176 u8 iface_ctrl_set; /* 0x08 Set */ 177 u8 iface_ctrl_clear; /* 0x09 Clear */ 178 /* OTG Control: 0x0A - 0x0C Read */ 179 u8 otg_ctrl; /* 0x0A Write */ 180 u8 otg_ctrl_set; /* 0x0B Set */ 181 u8 otg_ctrl_clear; /* 0x0C Clear */ 182 /* USB Interrupt Enable Rising: 0x0D - 0x0F Read */ 183 u8 usb_ie_rising; /* 0x0D Write */ 184 u8 usb_ie_rising_set; /* 0x0E Set */ 185 u8 usb_ie_rising_clear; /* 0x0F Clear */ 186 /* USB Interrupt Enable Falling: 0x10 - 0x12 Read */ 187 u8 usb_ie_falling; /* 0x10 Write */ 188 u8 usb_ie_falling_set; /* 0x11 Set */ 189 u8 usb_ie_falling_clear; /* 0x12 Clear */ 190 /* USB Interrupt Status: 0x13 Read-only */ 191 u8 usb_int_status; 192 /* USB Interrupt Latch: 0x14 Read-only with auto-clear */ 193 u8 usb_int_latch; 194 /* Debug: 0x15 Read-only */ 195 u8 debug; 196 /* Scratch Register: 0x16 - 0x18 Read */ 197 u8 scratch; /* 0x16 Write */ 198 u8 scratch_set; /* 0x17 Set */ 199 u8 scratch_clear; /* 0x18 Clear */ 200 /* 201 * Optional Carkit registers: 202 * Carkit Control: 0x19 - 0x1B Read 203 */ 204 u8 carkit_ctrl; /* 0x19 Write */ 205 u8 carkit_ctrl_set; /* 0x1A Set */ 206 u8 carkit_ctrl_clear; /* 0x1B Clear */ 207 /* Carkit Interrupt Delay: 0x1C Read, Write */ 208 u8 carkit_int_delay; 209 /* Carkit Interrupt Enable: 0x1D - 0x1F Read */ 210 u8 carkit_ie; /* 0x1D Write */ 211 u8 carkit_ie_set; /* 0x1E Set */ 212 u8 carkit_ie_clear; /* 0x1F Clear */ 213 /* Carkit Interrupt Status: 0x20 Read-only */ 214 u8 carkit_int_status; 215 /* Carkit Interrupt Latch: 0x21 Read-only with auto-clear */ 216 u8 carkit_int_latch; 217 /* Carkit Pulse Control: 0x22 - 0x24 Read */ 218 u8 carkit_pulse_ctrl; /* 0x22 Write */ 219 u8 carkit_pulse_ctrl_set; /* 0x23 Set */ 220 u8 carkit_pulse_ctrl_clear; /* 0x24 Clear */ 221 /* 222 * Other optional registers: 223 * Transmit Positive Width: 0x25 Read, Write 224 */ 225 u8 transmit_pos_width; 226 /* Transmit Negative Width: 0x26 Read, Write */ 227 u8 transmit_neg_width; 228 /* Receive Polarity Recovery: 0x27 Read, Write */ 229 u8 recv_pol_recovery; 230 /* 231 * Addresses 0x28 - 0x2E are reserved, so we use offsets 232 * for immediate registers with higher addresses 233 */ 234 }; 235 236 /* 237 * Register Bits 238 */ 239 240 /* Function Control */ 241 #define ULPI_FC_XCVRSEL_MASK (3 << 0) 242 #define ULPI_FC_HIGH_SPEED (0 << 0) 243 #define ULPI_FC_FULL_SPEED (1 << 0) 244 #define ULPI_FC_LOW_SPEED (2 << 0) 245 #define ULPI_FC_FS4LS (3 << 0) 246 #define ULPI_FC_TERMSELECT (1 << 2) 247 #define ULPI_FC_OPMODE_MASK (3 << 3) 248 #define ULPI_FC_OPMODE_NORMAL (0 << 3) 249 #define ULPI_FC_OPMODE_NONDRIVING (1 << 3) 250 #define ULPI_FC_OPMODE_DISABLE_NRZI (2 << 3) 251 #define ULPI_FC_OPMODE_NOSYNC_NOEOP (3 << 3) 252 #define ULPI_FC_RESET (1 << 5) 253 #define ULPI_FC_SUSPENDM (1 << 6) 254 255 /* Interface Control */ 256 #define ULPI_IFACE_6_PIN_SERIAL_MODE (1 << 0) 257 #define ULPI_IFACE_3_PIN_SERIAL_MODE (1 << 1) 258 #define ULPI_IFACE_CARKITMODE (1 << 2) 259 #define ULPI_IFACE_CLOCKSUSPENDM (1 << 3) 260 #define ULPI_IFACE_AUTORESUME (1 << 4) 261 #define ULPI_IFACE_EXTVBUS_COMPLEMENT (1 << 5) 262 #define ULPI_IFACE_PASSTHRU (1 << 6) 263 #define ULPI_IFACE_PROTECT_IFC_DISABLE (1 << 7) 264 265 /* OTG Control */ 266 #define ULPI_OTG_ID_PULLUP (1 << 0) 267 #define ULPI_OTG_DP_PULLDOWN (1 << 1) 268 #define ULPI_OTG_DM_PULLDOWN (1 << 2) 269 #define ULPI_OTG_DISCHRGVBUS (1 << 3) 270 #define ULPI_OTG_CHRGVBUS (1 << 4) 271 #define ULPI_OTG_DRVVBUS (1 << 5) 272 #define ULPI_OTG_DRVVBUS_EXT (1 << 6) 273 #define ULPI_OTG_EXTVBUSIND (1 << 7) 274 275 /* 276 * USB Interrupt Enable Rising, 277 * USB Interrupt Enable Falling, 278 * USB Interrupt Status and 279 * USB Interrupt Latch 280 */ 281 #define ULPI_INT_HOST_DISCONNECT (1 << 0) 282 #define ULPI_INT_VBUS_VALID (1 << 1) 283 #define ULPI_INT_SESS_VALID (1 << 2) 284 #define ULPI_INT_SESS_END (1 << 3) 285 #define ULPI_INT_IDGRD (1 << 4) 286 287 /* Debug */ 288 #define ULPI_DEBUG_LINESTATE0 (1 << 0) 289 #define ULPI_DEBUG_LINESTATE1 (1 << 1) 290 291 /* Carkit Control */ 292 #define ULPI_CARKIT_CTRL_CARKITPWR (1 << 0) 293 #define ULPI_CARKIT_CTRL_IDGNDDRV (1 << 1) 294 #define ULPI_CARKIT_CTRL_TXDEN (1 << 2) 295 #define ULPI_CARKIT_CTRL_RXDEN (1 << 3) 296 #define ULPI_CARKIT_CTRL_SPKLEFTEN (1 << 4) 297 #define ULPI_CARKIT_CTRL_SPKRIGHTEN (1 << 5) 298 #define ULPI_CARKIT_CTRL_MICEN (1 << 6) 299 300 /* Carkit Interrupt Enable */ 301 #define ULPI_CARKIT_INT_EN_IDFLOAT_RISE (1 << 0) 302 #define ULPI_CARKIT_INT_EN_IDFLOAT_FALL (1 << 1) 303 #define ULPI_CARKIT_INT_EN_CARINTDET (1 << 2) 304 #define ULPI_CARKIT_INT_EN_DP_RISE (1 << 3) 305 #define ULPI_CARKIT_INT_EN_DP_FALL (1 << 4) 306 307 /* Carkit Interrupt Status and Latch */ 308 #define ULPI_CARKIT_INT_IDFLOAT (1 << 0) 309 #define ULPI_CARKIT_INT_CARINTDET (1 << 1) 310 #define ULPI_CARKIT_INT_DP (1 << 2) 311 312 /* Carkit Pulse Control*/ 313 #define ULPI_CARKIT_PLS_CTRL_TXPLSEN (1 << 0) 314 #define ULPI_CARKIT_PLS_CTRL_RXPLSEN (1 << 1) 315 #define ULPI_CARKIT_PLS_CTRL_SPKRLEFT_BIASEN (1 << 2) 316 #define ULPI_CARKIT_PLS_CTRL_SPKRRIGHT_BIASEN (1 << 3) 317 318 319 #endif /* __USB_ULPI_H__ */ 320