1 /* 2 * Copyright (c) 2009 Wind River Systems, Inc. 3 * Tom Rix <Tom.Rix at windriver.com> 4 * 5 * This program is free software; you can redistribute it and/or 6 * modify it under the terms of the GNU General Public License as 7 * published by the Free Software Foundation; either version 2 of 8 * the License, or (at your option) any later version. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 * 15 * You should have received a copy of the GNU General Public License 16 * along with this program; if not, write to the Free Software 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 18 * MA 02111-1307 USA 19 * 20 * Derived from code on omapzoom, git://git.omapzoom.com/repo/u-boot.git 21 * 22 * Copyright (C) 2007-2009 Texas Instruments, Inc. 23 */ 24 25 #ifndef TWL4030_H 26 #define TWL4030_H 27 28 #include <common.h> 29 #include <i2c.h> 30 31 /* I2C chip addresses */ 32 33 /* USB */ 34 #define TWL4030_CHIP_USB 0x48 35 /* AUD */ 36 #define TWL4030_CHIP_AUDIO_VOICE 0x49 37 #define TWL4030_CHIP_GPIO 0x49 38 #define TWL4030_CHIP_INTBR 0x49 39 #define TWL4030_CHIP_PIH 0x49 40 #define TWL4030_CHIP_TEST 0x49 41 /* AUX */ 42 #define TWL4030_CHIP_KEYPAD 0x4a 43 #define TWL4030_CHIP_MADC 0x4a 44 #define TWL4030_CHIP_INTERRUPTS 0x4a 45 #define TWL4030_CHIP_LED 0x4a 46 #define TWL4030_CHIP_MAIN_CHARGE 0x4a 47 #define TWL4030_CHIP_PRECHARGE 0x4a 48 #define TWL4030_CHIP_PWM0 0x4a 49 #define TWL4030_CHIP_PWM1 0x4a 50 #define TWL4030_CHIP_PWMA 0x4a 51 #define TWL4030_CHIP_PWMB 0x4a 52 /* POWER */ 53 #define TWL4030_CHIP_BACKUP 0x4b 54 #define TWL4030_CHIP_INT 0x4b 55 #define TWL4030_CHIP_PM_MASTER 0x4b 56 #define TWL4030_CHIP_PM_RECEIVER 0x4b 57 #define TWL4030_CHIP_RTC 0x4b 58 #define TWL4030_CHIP_SECURED_REG 0x4b 59 60 /* Register base addresses */ 61 62 /* USB */ 63 #define TWL4030_BASEADD_USB 0x0000 64 /* AUD */ 65 #define TWL4030_BASEADD_AUDIO_VOICE 0x0000 66 #define TWL4030_BASEADD_GPIO 0x0098 67 #define TWL4030_BASEADD_INTBR 0x0085 68 #define TWL4030_BASEADD_PIH 0x0080 69 #define TWL4030_BASEADD_TEST 0x004C 70 /* AUX */ 71 #define TWL4030_BASEADD_INTERRUPTS 0x00B9 72 #define TWL4030_BASEADD_LED 0x00EE 73 #define TWL4030_BASEADD_MADC 0x0000 74 #define TWL4030_BASEADD_MAIN_CHARGE 0x0074 75 #define TWL4030_BASEADD_PRECHARGE 0x00AA 76 #define TWL4030_BASEADD_PWM0 0x00F8 77 #define TWL4030_BASEADD_PWM1 0x00FB 78 #define TWL4030_BASEADD_PWMA 0x00EF 79 #define TWL4030_BASEADD_PWMB 0x00F1 80 #define TWL4030_BASEADD_KEYPAD 0x00D2 81 /* POWER */ 82 #define TWL4030_BASEADD_BACKUP 0x0014 83 #define TWL4030_BASEADD_INT 0x002E 84 #define TWL4030_BASEADD_PM_MASTER 0x0036 85 #define TWL4030_BASEADD_PM_RECIEVER 0x005B 86 #define TWL4030_BASEADD_RTC 0x001C 87 #define TWL4030_BASEADD_SECURED_REG 0x0000 88 89 /* 90 * Power Management Master 91 */ 92 #define TWL4030_PM_MASTER_CFG_P1_TRANSITION 0x36 93 #define TWL4030_PM_MASTER_CFG_P2_TRANSITION 0x37 94 #define TWL4030_PM_MASTER_CFG_P3_TRANSITION 0x38 95 #define TWL4030_PM_MASTER_CFG_P123_TRANSITION 0x39 96 #define TWL4030_PM_MASTER_STS_BOOT 0x3A 97 #define TWL4030_PM_MASTER_CFG_BOOT 0x3B 98 #define TWL4030_PM_MASTER_SHUNDAN 0x3C 99 #define TWL4030_PM_MASTER_BOOT_BCI 0x3D 100 #define TWL4030_PM_MASTER_CFG_PWRANA1 0x3E 101 #define TWL4030_PM_MASTER_CFG_PWRANA2 0x3F 102 #define TWL4030_PM_MASTER_BGAP_TRIM 0x40 103 #define TWL4030_PM_MASTER_BACKUP_MISC_STS 0x41 104 #define TWL4030_PM_MASTER_BACKUP_MISC_CFG 0x42 105 #define TWL4030_PM_MASTER_BACKUP_MISC_TST 0x43 106 #define TWL4030_PM_MASTER_PROTECT_KEY 0x44 107 #define TWL4030_PM_MASTER_STS_HW_CONDITIONS 0x45 108 #define TWL4030_PM_MASTER_P1_SW_EVENTS 0x46 109 #define TWL4030_PM_MASTER_P2_SW_EVENTS 0x47 110 #define TWL4030_PM_MASTER_P3_SW_EVENTS 0x48 111 #define TWL4030_PM_MASTER_STS_P123_STATE 0x49 112 #define TWL4030_PM_MASTER_PB_CFG 0x4A 113 #define TWL4030_PM_MASTER_PB_WORD_MSB 0x4B 114 #define TWL4030_PM_MASTER_PB_WORD_LSB 0x4C 115 #define TWL4030_PM_MASTER_SEQ_ADD_W2P 0x52 116 #define TWL4030_PM_MASTER_SEQ_ADD_P2A 0x53 117 #define TWL4030_PM_MASTER_SEQ_ADD_A2W 0x54 118 #define TWL4030_PM_MASTER_SEQ_ADD_A2S 0x55 119 #define TWL4030_PM_MASTER_SEQ_ADD_S2A12 0x56 120 #define TWL4030_PM_MASTER_SEQ_ADD_S2A3 0x57 121 #define TWL4030_PM_MASTER_SEQ_ADD_WARM 0x58 122 #define TWL4030_PM_MASTER_MEMORY_ADDRESS 0x59 123 #define TWL4030_PM_MASTER_MEMORY_DATA 0x5A 124 #define TWL4030_PM_MASTER_SC_CONFIG 0x5B 125 #define TWL4030_PM_MASTER_SC_DETECT1 0x5C 126 #define TWL4030_PM_MASTER_SC_DETECT2 0x5D 127 #define TWL4030_PM_MASTER_WATCHDOG_CFG 0x5E 128 #define TWL4030_PM_MASTER_IT_CHECK_CFG 0x5F 129 #define TWL4030_PM_MASTER_VIBRATOR_CFG 0x60 130 #define TWL4030_PM_MASTER_DCDC_GLOBAL_CFG 0x61 131 #define TWL4030_PM_MASTER_VDD1_TRIM1 0x62 132 #define TWL4030_PM_MASTER_VDD1_TRIM2 0x63 133 #define TWL4030_PM_MASTER_VDD2_TRIM1 0x64 134 #define TWL4030_PM_MASTER_VDD2_TRIM2 0x65 135 #define TWL4030_PM_MASTER_VIO_TRIM1 0x66 136 #define TWL4030_PM_MASTER_VIO_TRIM2 0x67 137 #define TWL4030_PM_MASTER_MISC_CFG 0x68 138 #define TWL4030_PM_MASTER_LS_TST_A 0x69 139 #define TWL4030_PM_MASTER_LS_TST_B 0x6A 140 #define TWL4030_PM_MASTER_LS_TST_C 0x6B 141 #define TWL4030_PM_MASTER_LS_TST_D 0x6C 142 #define TWL4030_PM_MASTER_BB_CFG 0x6D 143 #define TWL4030_PM_MASTER_MISC_TST 0x6E 144 #define TWL4030_PM_MASTER_TRIM1 0x6F 145 /* P[1-3]_SW_EVENTS */ 146 #define TWL4030_PM_MASTER_SW_EVENTS_STOPON_PWRON (1 << 6) 147 #define TWL4030_PM_MASTER_SW_EVENTS_STOPON_SYSEN (1 << 5) 148 #define TWL4030_PM_MASTER_SW_EVENTS_ENABLE_WARMRESET (1 << 4) 149 #define TWL4030_PM_MASTER_SW_EVENTS_LVL_WAKEUP (1 << 3) 150 #define TWL4030_PM_MASTER_SW_EVENTS_DEVACT (1 << 2) 151 #define TWL4030_PM_MASTER_SW_EVENTS_DEVSLP (1 << 1) 152 #define TWL4030_PM_MASTER_SW_EVENTS_DEVOFF (1 << 0) 153 154 /* Power Managment Receiver */ 155 #define TWL4030_PM_RECEIVER_SC_CONFIG 0x5B 156 #define TWL4030_PM_RECEIVER_SC_DETECT1 0x5C 157 #define TWL4030_PM_RECEIVER_SC_DETECT2 0x5D 158 #define TWL4030_PM_RECEIVER_WATCHDOG_CFG 0x5E 159 #define TWL4030_PM_RECEIVER_IT_CHECK_CFG 0x5F 160 #define TWL4030_PM_RECEIVER_VIBRATOR_CFG 0x5F 161 #define TWL4030_PM_RECEIVER_DC_TO_DC_CFG 0x61 162 #define TWL4030_PM_RECEIVER_VDD1_TRIM1 0x62 163 #define TWL4030_PM_RECEIVER_VDD1_TRIM2 0x63 164 #define TWL4030_PM_RECEIVER_VDD2_TRIM1 0x64 165 #define TWL4030_PM_RECEIVER_VDD2_TRIM2 0x65 166 #define TWL4030_PM_RECEIVER_VIO_TRIM1 0x66 167 #define TWL4030_PM_RECEIVER_VIO_TRIM2 0x67 168 #define TWL4030_PM_RECEIVER_MISC_CFG 0x68 169 #define TWL4030_PM_RECEIVER_LS_TST_A 0x69 170 #define TWL4030_PM_RECEIVER_LS_TST_B 0x6A 171 #define TWL4030_PM_RECEIVER_LS_TST_C 0x6B 172 #define TWL4030_PM_RECEIVER_LS_TST_D 0x6C 173 #define TWL4030_PM_RECEIVER_BB_CFG 0x6D 174 #define TWL4030_PM_RECEIVER_MISC_TST 0x6E 175 #define TWL4030_PM_RECEIVER_TRIM1 0x6F 176 #define TWL4030_PM_RECEIVER_TRIM2 0x70 177 #define TWL4030_PM_RECEIVER_DC_DC_TIMEOUT 0x71 178 #define TWL4030_PM_RECEIVER_VAUX1_DEV_GRP 0x72 179 #define TWL4030_PM_RECEIVER_VAUX1_TYPE 0x73 180 #define TWL4030_PM_RECEIVER_VAUX1_REMAP 0x74 181 #define TWL4030_PM_RECEIVER_VAUX1_DEDICATED 0x75 182 #define TWL4030_PM_RECEIVER_VAUX2_DEV_GRP 0x76 183 #define TWL4030_PM_RECEIVER_VAUX2_TYPE 0x77 184 #define TWL4030_PM_RECEIVER_VAUX2_REMAP 0x78 185 #define TWL4030_PM_RECEIVER_VAUX2_DEDICATED 0x79 186 #define TWL4030_PM_RECEIVER_VAUX3_DEV_GRP 0x7A 187 #define TWL4030_PM_RECEIVER_VAUX3_TYPE 0x7B 188 #define TWL4030_PM_RECEIVER_VAUX3_REMAP 0x7C 189 #define TWL4030_PM_RECEIVER_VAUX3_DEDICATED 0x7D 190 #define TWL4030_PM_RECEIVER_VAUX4_DEV_GRP 0x7E 191 #define TWL4030_PM_RECEIVER_VAUX4_TYPE 0x7F 192 #define TWL4030_PM_RECEIVER_VAUX4_REMAP 0x80 193 #define TWL4030_PM_RECEIVER_VAUX4_DEDICATED 0x81 194 #define TWL4030_PM_RECEIVER_VMMC1_DEV_GRP 0x82 195 #define TWL4030_PM_RECEIVER_VMMC1_TYPE 0x83 196 #define TWL4030_PM_RECEIVER_VMMC1_REMAP 0x84 197 #define TWL4030_PM_RECEIVER_VMMC1_DEDICATED 0x85 198 #define TWL4030_PM_RECEIVER_VMMC2_DEV_GRP 0x86 199 #define TWL4030_PM_RECEIVER_VMMC2_TYPE 0x87 200 #define TWL4030_PM_RECEIVER_VMMC2_REMAP 0x88 201 #define TWL4030_PM_RECEIVER_VMMC2_DEDICATED 0x89 202 #define TWL4030_PM_RECEIVER_VPLL1_DEV_GRP 0x8A 203 #define TWL4030_PM_RECEIVER_VPLL1_TYPE 0x8B 204 #define TWL4030_PM_RECEIVER_VPLL1_REMAP 0x8C 205 #define TWL4030_PM_RECEIVER_VPLL1_DEDICATED 0x8D 206 #define TWL4030_PM_RECEIVER_VPLL2_DEV_GRP 0x8E 207 #define TWL4030_PM_RECEIVER_VPLL2_TYPE 0x8F 208 #define TWL4030_PM_RECEIVER_VPLL2_REMAP 0x90 209 #define TWL4030_PM_RECEIVER_VPLL2_DEDICATED 0x91 210 #define TWL4030_PM_RECEIVER_VSIM_DEV_GRP 0x92 211 #define TWL4030_PM_RECEIVER_VSIM_TYPE 0x93 212 #define TWL4030_PM_RECEIVER_VSIM_REMAP 0x94 213 #define TWL4030_PM_RECEIVER_VSIM_DEDICATED 0x95 214 #define TWL4030_PM_RECEIVER_VDAC_DEV_GRP 0x96 215 #define TWL4030_PM_RECEIVER_VDAC_TYPE 0x97 216 #define TWL4030_PM_RECEIVER_VDAC_REMAP 0x98 217 #define TWL4030_PM_RECEIVER_VDAC_DEDICATED 0x99 218 #define TWL4030_PM_RECEIVER_VINTANA1_DEV_GRP 0x9A 219 #define TWL4030_PM_RECEIVER_VINTANA1_TYP 0x9B 220 #define TWL4030_PM_RECEIVER_VINTANA1_REMAP 0x9C 221 #define TWL4030_PM_RECEIVER_VINTANA1_DEDICATED 0x9D 222 #define TWL4030_PM_RECEIVER_VINTANA2_DEV_GRP 0x9E 223 #define TWL4030_PM_RECEIVER_VINTANA2_TYPE 0x9F 224 #define TWL4030_PM_RECEIVER_VINTANA2_REMAP 0xA0 225 #define TWL4030_PM_RECEIVER_VINTANA2_DEDICATED 0xA1 226 #define TWL4030_PM_RECEIVER_VINTDIG_DEV_GRP 0xA2 227 #define TWL4030_PM_RECEIVER_VINTDIG_TYPE 0xA3 228 #define TWL4030_PM_RECEIVER_VINTDIG_REMAP 0xA4 229 #define TWL4030_PM_RECEIVER_VINTDIG_DEDICATED 0xA5 230 #define TWL4030_PM_RECEIVER_VIO_DEV_GRP 0xA6 231 #define TWL4030_PM_RECEIVER_VIO_TYPE 0xA7 232 #define TWL4030_PM_RECEIVER_VIO_REMAP 0xA8 233 #define TWL4030_PM_RECEIVER_VIO_CFG 0xA9 234 #define TWL4030_PM_RECEIVER_VIO_MISC_CFG 0xAA 235 #define TWL4030_PM_RECEIVER_VIO_TEST1 0xAB 236 #define TWL4030_PM_RECEIVER_VIO_TEST2 0xAC 237 #define TWL4030_PM_RECEIVER_VIO_OSC 0xAD 238 #define TWL4030_PM_RECEIVER_VIO_RESERVED 0xAE 239 #define TWL4030_PM_RECEIVER_VIO_VSEL 0xAF 240 #define TWL4030_PM_RECEIVER_VDD1_DEV_GRP 0xB0 241 #define TWL4030_PM_RECEIVER_VDD1_TYPE 0xB1 242 #define TWL4030_PM_RECEIVER_VDD1_REMAP 0xB2 243 #define TWL4030_PM_RECEIVER_VDD1_CFG 0xB3 244 #define TWL4030_PM_RECEIVER_VDD1_MISC_CFG 0xB4 245 #define TWL4030_PM_RECEIVER_VDD1_TEST1 0xB5 246 #define TWL4030_PM_RECEIVER_VDD1_TEST2 0xB6 247 #define TWL4030_PM_RECEIVER_VDD1_OSC 0xB7 248 #define TWL4030_PM_RECEIVER_VDD1_RESERVED 0xB8 249 #define TWL4030_PM_RECEIVER_VDD1_VSEL 0xB9 250 #define TWL4030_PM_RECEIVER_VDD1_VMODE_CFG 0xBA 251 #define TWL4030_PM_RECEIVER_VDD1_VFLOOR 0xBB 252 #define TWL4030_PM_RECEIVER_VDD1_VROOF 0xBC 253 #define TWL4030_PM_RECEIVER_VDD1_STEP 0xBD 254 #define TWL4030_PM_RECEIVER_VDD2_DEV_GRP 0xBE 255 #define TWL4030_PM_RECEIVER_VDD2_TYPE 0xBF 256 #define TWL4030_PM_RECEIVER_VDD2_REMAP 0xC0 257 #define TWL4030_PM_RECEIVER_VDD2_CFG 0xC1 258 #define TWL4030_PM_RECEIVER_VDD2_MISC_CFG 0xC2 259 #define TWL4030_PM_RECEIVER_VDD2_TEST1 0xC3 260 #define TWL4030_PM_RECEIVER_VDD2_TEST2 0xC4 261 #define TWL4030_PM_RECEIVER_VDD2_OSC 0xC5 262 #define TWL4030_PM_RECEIVER_VDD2_RESERVED 0xC6 263 #define TWL4030_PM_RECEIVER_VDD2_VSEL 0xC7 264 #define TWL4030_PM_RECEIVER_VDD2_VMODE_CFG 0xC8 265 #define TWL4030_PM_RECEIVER_VDD2_VFLOOR 0xC9 266 #define TWL4030_PM_RECEIVER_VDD2_VROOF 0xCA 267 #define TWL4030_PM_RECEIVER_VDD2_STEP 0xCB 268 #define TWL4030_PM_RECEIVER_VUSB1V5_DEV_GRP 0xCC 269 #define TWL4030_PM_RECEIVER_VUSB1V5_TYPE 0xCD 270 #define TWL4030_PM_RECEIVER_VUSB1V5_REMAP 0xCE 271 #define TWL4030_PM_RECEIVER_VUSB1V8_DEV_GRP 0xCF 272 #define TWL4030_PM_RECEIVER_VUSB1V8_TYPE 0xD0 273 #define TWL4030_PM_RECEIVER_VUSB1V8_REMAP 0xD1 274 #define TWL4030_PM_RECEIVER_VUSB3V1_DEV_GRP 0xD2 275 #define TWL4030_PM_RECEIVER_VUSB3V1_TYPE 0xD3 276 #define TWL4030_PM_RECEIVER_VUSB3V1_REMAP 0xD4 277 #define TWL4030_PM_RECEIVER_VUSBCP_DEV_GRP 0xD5 278 #define TWL4030_PM_RECEIVER_VUSBCP_TYPE 0xD6 279 #define TWL4030_PM_RECEIVER_VUSBCP_REMAP 0xD7 280 #define TWL4030_PM_RECEIVER_VUSB_DEDICATED1 0xD8 281 #define TWL4030_PM_RECEIVER_VUSB_DEDICATED2 0xD9 282 #define TWL4030_PM_RECEIVER_REGEN_DEV_GRP 0xDA 283 #define TWL4030_PM_RECEIVER_REGEN_TYPE 0xDB 284 #define TWL4030_PM_RECEIVER_REGEN_REMAP 0xDC 285 #define TWL4030_PM_RECEIVER_NRESPWRON_DEV_GRP 0xDD 286 #define TWL4030_PM_RECEIVER_NRESPWRON_TYPE 0xDE 287 #define TWL4030_PM_RECEIVER_NRESPWRON_REMAP 0xDF 288 #define TWL4030_PM_RECEIVER_CLKEN_DEV_GRP 0xE0 289 #define TWL4030_PM_RECEIVER_CLKEN_TYPE 0xE1 290 #define TWL4030_PM_RECEIVER_CLKEN_REMAP 0xE2 291 #define TWL4030_PM_RECEIVER_SYSEN_DEV_GRP 0xE3 292 #define TWL4030_PM_RECEIVER_SYSEN_TYPE 0xE4 293 #define TWL4030_PM_RECEIVER_SYSEN_REMAP 0xE5 294 #define TWL4030_PM_RECEIVER_HFCLKOUT_DEV_GRP 0xE6 295 #define TWL4030_PM_RECEIVER_HFCLKOUT_TYPE 0xE7 296 #define TWL4030_PM_RECEIVER_HFCLKOUT_REMAP 0xE8 297 #define TWL4030_PM_RECEIVER_32KCLKOUT_DEV_GRP 0xE9 298 #define TWL4030_PM_RECEIVER_32KCLKOUT_TYPE 0xEA 299 #define TWL4030_PM_RECEIVER_32KCLKOUT_REMAP 0xEB 300 #define TWL4030_PM_RECEIVER_TRITON_RESET_DEV_GRP 0xEC 301 #define TWL4030_PM_RECEIVER_TRITON_RESET_TYPE 0xED 302 #define TWL4030_PM_RECEIVER_TRITON_RESET_REMAP 0xEE 303 #define TWL4030_PM_RECEIVER_MAINREF_DEV_GRP 0xEF 304 #define TWL4030_PM_RECEIVER_MAINREF_TYPE 0xF0 305 #define TWL4030_PM_RECEIVER_MAINREF_REMAP 0xF1 306 307 /* LED */ 308 #define TWL4030_LED_LEDEN 0xEE 309 310 /* Keypad */ 311 #define TWL4030_KEYPAD_KEYP_CTRL_REG 0xD2 312 #define TWL4030_KEYPAD_KEY_DEB_REG 0xD3 313 #define TWL4030_KEYPAD_LONG_KEY_REG1 0xD4 314 #define TWL4030_KEYPAD_LK_PTV_REG 0xD5 315 #define TWL4030_KEYPAD_TIME_OUT_REG1 0xD6 316 #define TWL4030_KEYPAD_TIME_OUT_REG2 0xD7 317 #define TWL4030_KEYPAD_KBC_REG 0xD8 318 #define TWL4030_KEYPAD_KBR_REG 0xD9 319 #define TWL4030_KEYPAD_KEYP_SMS 0xDA 320 #define TWL4030_KEYPAD_FULL_CODE_7_0 0xDB 321 #define TWL4030_KEYPAD_FULL_CODE_15_8 0xDC 322 #define TWL4030_KEYPAD_FULL_CODE_23_16 0xDD 323 #define TWL4030_KEYPAD_FULL_CODE_31_24 0xDE 324 #define TWL4030_KEYPAD_FULL_CODE_39_32 0xDF 325 #define TWL4030_KEYPAD_FULL_CODE_47_40 0xE0 326 #define TWL4030_KEYPAD_FULL_CODE_55_48 0xE1 327 #define TWL4030_KEYPAD_FULL_CODE_63_56 0xE2 328 #define TWL4030_KEYPAD_KEYP_ISR1 0xE3 329 #define TWL4030_KEYPAD_KEYP_IMR1 0xE4 330 #define TWL4030_KEYPAD_KEYP_ISR2 0xE5 331 #define TWL4030_KEYPAD_KEYP_IMR2 0xE6 332 #define TWL4030_KEYPAD_KEYP_SIR 0xE7 333 #define TWL4030_KEYPAD_KEYP_EDR 0xE8 334 #define TWL4030_KEYPAD_KEYP_SIH_CTRL 0xE9 335 336 #define TWL4030_KEYPAD_CTRL_KBD_ON (1 << 6) 337 #define TWL4030_KEYPAD_CTRL_RP_EN (1 << 5) 338 #define TWL4030_KEYPAD_CTRL_TOLE_EN (1 << 4) 339 #define TWL4030_KEYPAD_CTRL_TOE_EN (1 << 3) 340 #define TWL4030_KEYPAD_CTRL_LK_EN (1 << 2) 341 #define TWL4030_KEYPAD_CTRL_SOFTMODEN (1 << 1) 342 #define TWL4030_KEYPAD_CTRL_SOFT_NRST (1 << 0) 343 344 /* USB */ 345 #define TWL4030_USB_FUNC_CTRL (0x04) 346 #define TWL4030_USB_OPMODE_MASK (3 << 3) 347 #define TWL4030_USB_XCVRSELECT_MASK (3 << 0) 348 #define TWL4030_USB_IFC_CTRL (0x07) 349 #define TWL4030_USB_CARKITMODE (1 << 2) 350 #define TWL4030_USB_POWER_CTRL (0xAC) 351 #define TWL4030_USB_OTG_ENAB (1 << 5) 352 #define TWL4030_USB_PHY_PWR_CTRL (0xFD) 353 #define TWL4030_USB_PHYPWD (1 << 0) 354 #define TWL4030_USB_PHY_CLK_CTRL (0xFE) 355 #define TWL4030_USB_CLOCKGATING_EN (1 << 2) 356 #define TWL4030_USB_CLK32K_EN (1 << 1) 357 #define TWL4030_USB_REQ_PHY_DPLL_CLK (1 << 0) 358 #define TWL4030_USB_PHY_CLK_CTRL_STS (0xFF) 359 #define TWL4030_USB_PHY_DPLL_CLK (1 << 0) 360 361 /* 362 * Convience functions to read and write from TWL4030 363 * 364 * chip_no is the i2c address, it must be one of the chip addresses 365 * defined at the top of this file with the prefix TWL4030_CHIP_ 366 * examples are TWL4030_CHIP_PM_RECEIVER and TWL4030_CHIP_KEYPAD 367 * 368 * val is the data either written to or read from the twl4030 369 * 370 * reg is the register to act on, it must be one of the defines 371 * above and with the format TWL4030_<chip suffix>_<register name> 372 * examples are TWL4030_PM_RECEIVER_VMMC1_DEV_GRP and 373 * TWL4030_LED_LEDEN. 374 */ 375 static inline int twl4030_i2c_write_u8(u8 chip_no, u8 val, u8 reg) 376 { 377 return i2c_write(chip_no, reg, 1, &val, 1); 378 } 379 380 static inline int twl4030_i2c_read_u8(u8 chip_no, u8 *val, u8 reg) 381 { 382 return i2c_read(chip_no, reg, 1, val, 1); 383 } 384 385 /* 386 * Power 387 */ 388 389 /* For hardware resetting */ 390 void twl4030_power_reset_init(void); 391 /* For initializing power device */ 392 void twl4030_power_init(void); 393 /* For initializing mmc power */ 394 void twl4030_power_mmc_init(void); 395 396 /* 397 * LED 398 */ 399 void twl4030_led_init(void); 400 401 #endif /* TWL4030_H */ 402