1 /* 2 * (C) Copyright 2002 3 * Rich Ireland, Enterasys Networks, rireland@enterasys.com. 4 * 5 * See file CREDITS for list of people who contributed to this 6 * project. 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License as 10 * published by the Free Software Foundation; either version 2 of 11 * the License, or (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 21 * MA 02111-1307 USA 22 * 23 */ 24 25 #ifndef _SPARTAN3_H_ 26 #define _SPARTAN3_H_ 27 28 #include <xilinx.h> 29 30 extern int Spartan3_load( Xilinx_desc *desc, void *image, size_t size ); 31 extern int Spartan3_dump( Xilinx_desc *desc, void *buf, size_t bsize ); 32 extern int Spartan3_info( Xilinx_desc *desc ); 33 extern int Spartan3_reloc( Xilinx_desc *desc, ulong reloc_off ); 34 35 /* Slave Parallel Implementation function table */ 36 typedef struct { 37 Xilinx_pre_fn pre; 38 Xilinx_pgm_fn pgm; 39 Xilinx_init_fn init; 40 Xilinx_err_fn err; 41 Xilinx_done_fn done; 42 Xilinx_clk_fn clk; 43 Xilinx_cs_fn cs; 44 Xilinx_wr_fn wr; 45 Xilinx_rdata_fn rdata; 46 Xilinx_wdata_fn wdata; 47 Xilinx_busy_fn busy; 48 Xilinx_abort_fn abort; 49 Xilinx_post_fn post; 50 int relocated; 51 } Xilinx_Spartan3_Slave_Parallel_fns; 52 53 /* Slave Serial Implementation function table */ 54 typedef struct { 55 Xilinx_pre_fn pre; 56 Xilinx_pgm_fn pgm; 57 Xilinx_clk_fn clk; 58 Xilinx_init_fn init; 59 Xilinx_done_fn done; 60 Xilinx_wr_fn wr; 61 int relocated; 62 } Xilinx_Spartan3_Slave_Serial_fns; 63 64 /* Device Image Sizes 65 *********************************************************************/ 66 /* Spartan-III (1.2V) */ 67 #define XILINX_XC3S50_SIZE 439264/8 68 #define XILINX_XC3S200_SIZE 1047616/8 69 #define XILINX_XC3S400_SIZE 1699136/8 70 #define XILINX_XC3S1000_SIZE 3223488/8 71 #define XILINX_XC3S1500_SIZE 5214784/8 72 #define XILINX_XC3S2000_SIZE 7673024/8 73 #define XILINX_XC3S4000_SIZE 11316864/8 74 #define XILINX_XC3S5000_SIZE 13271936/8 75 76 /* Descriptor Macros 77 *********************************************************************/ 78 /* Spartan-II devices */ 79 #define XILINX_XC3S50_DESC(iface, fn_table, cookie) \ 80 { Xilinx_Spartan3, iface, XILINX_XC3S50_SIZE, fn_table, cookie } 81 82 #define XILINX_XC3S200_DESC(iface, fn_table, cookie) \ 83 { Xilinx_Spartan3, iface, XILINX_XC3S200_SIZE, fn_table, cookie } 84 85 #define XILINX_XC3S400_DESC(iface, fn_table, cookie) \ 86 { Xilinx_Spartan3, iface, XILINX_XC3S400_SIZE, fn_table, cookie } 87 88 #define XILINX_XC3S1000_DESC(iface, fn_table, cookie) \ 89 { Xilinx_Spartan3, iface, XILINX_XC3S1000_SIZE, fn_table, cookie } 90 91 #define XILINX_XC3S1500_DESC(iface, fn_table, cookie) \ 92 { Xilinx_Spartan3, iface, XILINX_XC3S1500_SIZE, fn_table, cookie } 93 94 #define XILINX_XC3S2000_DESC(iface, fn_table, cookie) \ 95 { Xilinx_Spartan3, iface, XILINX_XC3S2000E_SIZE, fn_table, cookie } 96 97 #define XILINX_XC3S4000_DESC(iface, fn_table, cookie) \ 98 { Xilinx_Spartan3, iface, XILINX_XC3S4000E_SIZE, fn_table, cookie } 99 100 #define XILINX_XC3S5000_DESC(iface, fn_table, cookie) \ 101 { Xilinx_Spartan3, iface, XILINX_XC3S5000E_SIZE, fn_table, cookie } 102 103 #endif /* _SPARTAN3_H_ */ 104