1 /* 2 * (C) Copyright 2002 3 * Rich Ireland, Enterasys Networks, rireland@enterasys.com. 4 * 5 * See file CREDITS for list of people who contributed to this 6 * project. 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License as 10 * published by the Free Software Foundation; either version 2 of 11 * the License, or (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 21 * MA 02111-1307 USA 22 * 23 */ 24 25 #ifndef _SPARTAN2_H_ 26 #define _SPARTAN2_H_ 27 28 #include <xilinx.h> 29 30 extern int Spartan2_load( Xilinx_desc *desc, void *image, size_t size ); 31 extern int Spartan2_dump( Xilinx_desc *desc, void *buf, size_t bsize ); 32 extern int Spartan2_info( Xilinx_desc *desc ); 33 extern int Spartan2_reloc( Xilinx_desc *desc, ulong reloc_off ); 34 35 /* Slave Parallel Implementation function table */ 36 typedef struct { 37 Xilinx_pre_fn pre; 38 Xilinx_pgm_fn pgm; 39 Xilinx_init_fn init; 40 Xilinx_err_fn err; 41 Xilinx_done_fn done; 42 Xilinx_clk_fn clk; 43 Xilinx_cs_fn cs; 44 Xilinx_wr_fn wr; 45 Xilinx_rdata_fn rdata; 46 Xilinx_wdata_fn wdata; 47 Xilinx_busy_fn busy; 48 Xilinx_abort_fn abort; 49 Xilinx_post_fn post; 50 int relocated; 51 } Xilinx_Spartan2_Slave_Parallel_fns; 52 53 /* Slave Serial Implementation function table */ 54 typedef struct { 55 Xilinx_pre_fn pre; 56 Xilinx_pgm_fn pgm; 57 Xilinx_clk_fn clk; 58 Xilinx_init_fn init; 59 Xilinx_done_fn done; 60 Xilinx_wr_fn wr; 61 int relocated; 62 } Xilinx_Spartan2_Slave_Serial_fns; 63 64 /* Device Image Sizes 65 *********************************************************************/ 66 /* Spartan-II (2.5V) */ 67 #define XILINX_XC2S15_SIZE 197728/8 68 #define XILINX_XC2S30_SIZE 336800/8 69 #define XILINX_XC2S50_SIZE 559232/8 70 #define XILINX_XC2S100_SIZE 781248/8 71 #define XILINX_XC2S150_SIZE 1040128/8 72 73 /* Spartan-IIE (1.8V) */ 74 #define XILINX_XC2S50E_SIZE 630048/8 75 #define XILINX_XC2S100E_SIZE 863840/8 76 #define XILINX_XC2S150E_SIZE 1134496/8 77 #define XILINX_XC2S200E_SIZE 1442016/8 78 #define XILINX_XC2S300E_SIZE 1875648/8 79 80 /* Descriptor Macros 81 *********************************************************************/ 82 /* Spartan-II devices */ 83 #define XILINX_XC2S15_DESC(iface, fn_table, cookie) \ 84 { Xilinx_Spartan2, iface, XILINX_XC2S15_SIZE, fn_table, cookie } 85 86 #define XILINX_XC2S30_DESC(iface, fn_table, cookie) \ 87 { Xilinx_Spartan2, iface, XILINX_XC2S30_SIZE, fn_table, cookie } 88 89 #define XILINX_XC2S50_DESC(iface, fn_table, cookie) \ 90 { Xilinx_Spartan2, iface, XILINX_XC2S50_SIZE, fn_table, cookie } 91 92 #define XILINX_XC2S100_DESC(iface, fn_table, cookie) \ 93 { Xilinx_Spartan2, iface, XILINX_XC2S100_SIZE, fn_table, cookie } 94 95 #define XILINX_XC2S150_DESC(iface, fn_table, cookie) \ 96 { Xilinx_Spartan2, iface, XILINX_XC2S150_SIZE, fn_table, cookie } 97 98 #define XILINX_XC2S50E_DESC(iface, fn_table, cookie) \ 99 { Xilinx_Spartan2, iface, XILINX_XC2S50E_SIZE, fn_table, cookie } 100 101 #define XILINX_XC2S100E_DESC(iface, fn_table, cookie) \ 102 { Xilinx_Spartan2, iface, XILINX_XC2S100E_SIZE, fn_table, cookie } 103 104 #define XILINX_XC2S150E_DESC(iface, fn_table, cookie) \ 105 { Xilinx_Spartan2, iface, XILINX_XC2S150E_SIZE, fn_table, cookie } 106 107 #define XILINX_XC2S200E_DESC(iface, fn_table, cookie) \ 108 { Xilinx_Spartan2, iface, XILINX_XC2S200E_SIZE, fn_table, cookie } 109 110 #define XILINX_XC2S300E_DESC(iface, fn_table, cookie) \ 111 { Xilinx_Spartan2, iface, XILINX_XC2S300E_SIZE, fn_table, cookie } 112 113 #endif /* _SPARTAN2_H_ */ 114