xref: /openbmc/u-boot/include/smsc_sio1007.h (revision ae485b54)
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
4  */
5 
6 #ifndef _SMSC_SIO1007_H_
7 #define _SMSC_SIO1007_H_
8 
9 /*
10  * The I/O base address of SIO1007 at power-up is determined by the SYSOPT0
11  * and SYSOPT1 pins at the deasserting edge of PCIRST#. The combination of
12  * SYSOPT0 and SYSOPT1 determines one of the following addresses.
13  */
14 #define SIO1007_IOPORT0		0x002e
15 #define SIO1007_IOPORT1		0x004e
16 #define SIO1007_IOPORT2		0x162e
17 #define SIO1007_IOPORT3		0x164e
18 
19 /* SIO1007 registers */
20 
21 #define DEV_POWER_CTRL		0x02
22 #define UART1_POWER_ON		(1 << 3)
23 #define UART2_POWER_ON		(1 << 7)
24 
25 #define UART1_IOBASE		0x24
26 #define UART2_IOBASE		0x25
27 #define UART_IRQ		0x28
28 
29 #define RTR_IOBASE_HIGH		0x21
30 #define RTR_IOBASE_LOW		0x30
31 
32 #define GPIO0_DIR		0x31
33 #define GPIO1_DIR		0x35
34 #define GPIO_DIR_INPUT		0
35 #define GPIO_DIR_OUTPUT		1
36 
37 #define GPIO0_POL		0x32
38 #define GPIO1_POL		0x36
39 #define GPIO_POL_NO_INVERT	0
40 #define GPIO_POL_INVERT		1
41 
42 #define GPIO0_TYPE		0x33
43 #define GPIO1_TYPE		0x37
44 #define GPIO_TYPE_PUSH_PULL	0
45 #define GPIO_TYPE_OPEN_DRAIN	1
46 
47 #define DEV_ACTIVATE		0x3a
48 #define RTR_EN			(1 << 1)
49 
50 /* Runtime register offset */
51 
52 #define GPIO0_DATA		0xc
53 #define GPIO1_DATA		0xe
54 
55 /* Number of serial ports supported */
56 #define SIO1007_UART_NUM	2
57 
58 /* Number of gpio pins supported */
59 #define GPIO_NUM_PER_GROUP	8
60 #define GPIO_GROUP_NUM		2
61 #define SIO1007_GPIO_NUM	(GPIO_NUM_PER_GROUP * GPIO_GROUP_NUM)
62 
63 /**
64  * Configure the I/O port address of the specified serial device and
65  * enable the serial device.
66  *
67  * @port:	SIO1007 I/O port address
68  * @num:	serial device number (0 or 1)
69  * @iobase:	processor I/O port address to assign to this serial device
70  * @irq:	processor IRQ number to assign to this serial device
71  */
72 void sio1007_enable_serial(int port, int num, int iobase, int irq);
73 
74 /**
75  * Configure the I/O port address of the runtime register block and
76  * enable the address decoding.
77  *
78  * @port:	SIO1007 I/O port address
79  * @iobase:	processor I/O port address to assign to the runtime registers
80  */
81 void sio1007_enable_runtime(int port, int iobase);
82 
83 /**
84  * Configure the direction/polority/type of a specified GPIO pin
85  *
86  * @port:	SIO1007 I/O port address
87  * @gpio:	GPIO number (0-7 for GP10-GP17, 8-15 for GP30-GP37)
88  * @dir:	GPIO_DIR_INPUT or GPIO_DIR_OUTPUT
89  * @pol:	GPIO_POL_NO_INVERT or GPIO_POL_INVERT
90  * @type:	GPIO_TYPE_PUSH_PULL or GPIO_TYPE_OPEN_DRAIN
91  */
92 void sio1007_gpio_config(int port, int gpio, int dir, int pol, int type);
93 
94 /**
95  * Get a GPIO pin value.
96  * This will work whether the GPIO is an input or an output.
97  *
98  * @port:	runtime register block I/O port address
99  * @gpio:	GPIO number (0-7 for GP10-GP17, 8-15 for GP30-GP37)
100  * @return:	0 if low, 1 if high, -EINVAL if gpio number is invalid
101  */
102 int sio1007_gpio_get_value(int port, int gpio);
103 
104 /**
105  * Set a GPIO pin value.
106  * This will only work when the GPIO is configured as an output.
107  *
108  * @port:	runtime register block I/O port address
109  * @gpio:	GPIO number (0-7 for GP10-GP17, 8-15 for GP30-GP37)
110  * @val:	0 if low, 1 if high
111  */
112 void sio1007_gpio_set_value(int port, int gpio, int val);
113 
114 #endif /* _SMSC_SIO1007_H_ */
115