1d62589d5Swdenk/* 2d62589d5Swdenk * (C) Copyright 2000-2002 3d62589d5Swdenk * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 4d62589d5Swdenk * 51a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 6d62589d5Swdenk */ 7d62589d5Swdenk 8d62589d5Swdenk/* 9d62589d5Swdenk * This file contains all the macros and symbols which define 10d62589d5Swdenk * a PowerPC assembly language environment. 11d62589d5Swdenk */ 12d62589d5Swdenk#ifndef __PPC_ASM_TMPL__ 13d62589d5Swdenk#define __PPC_ASM_TMPL__ 14d62589d5Swdenk 1596d2bb95SScott Wood#include <config.h> 1696d2bb95SScott Wood 17d62589d5Swdenk/*************************************************************************** 18d62589d5Swdenk * 19d62589d5Swdenk * These definitions simplify the ugly declarations necessary for GOT 20d62589d5Swdenk * definitions. 21d62589d5Swdenk * 22d62589d5Swdenk * Stolen from prepboot/bootldr.h, (C) 1998 Gabriel Paubert, paubert@iram.es 23d62589d5Swdenk * 24161e4ae4SHeiko Schocher * Uses r12 to access the GOT 25d62589d5Swdenk */ 26d62589d5Swdenk 27d62589d5Swdenk#define START_GOT \ 28d62589d5Swdenk .section ".got2","aw"; \ 29d62589d5Swdenk.LCTOC1 = .+32768 30d62589d5Swdenk 31d62589d5Swdenk#define END_GOT \ 32d62589d5Swdenk .text 33d62589d5Swdenk 34d62589d5Swdenk#define GET_GOT \ 35d62589d5Swdenk bl 1f ; \ 36d62589d5Swdenk .text 2 ; \ 37d62589d5Swdenk0: .long .LCTOC1-1f ; \ 38d62589d5Swdenk .text ; \ 390f8aa159SJoakim Tjernlund1: mflr r12 ; \ 400f8aa159SJoakim Tjernlund lwz r0,0b-1b(r12) ; \ 410f8aa159SJoakim Tjernlund add r12,r0,r12 ; 42d62589d5Swdenk 43d62589d5Swdenk#define GOT_ENTRY(NAME) .L_ ## NAME = . - .LCTOC1 ; .long NAME 44d62589d5Swdenk 450f8aa159SJoakim Tjernlund#define GOT(NAME) .L_ ## NAME (r12) 46d62589d5Swdenk 47d62589d5Swdenk 48d62589d5Swdenk/*************************************************************************** 49d62589d5Swdenk * Register names 50d62589d5Swdenk */ 51d62589d5Swdenk#define r0 0 52d62589d5Swdenk#define r1 1 53d62589d5Swdenk#define r2 2 54d62589d5Swdenk#define r3 3 55d62589d5Swdenk#define r4 4 56d62589d5Swdenk#define r5 5 57d62589d5Swdenk#define r6 6 58d62589d5Swdenk#define r7 7 59d62589d5Swdenk#define r8 8 60d62589d5Swdenk#define r9 9 61d62589d5Swdenk#define r10 10 62d62589d5Swdenk#define r11 11 63d62589d5Swdenk#define r12 12 64d62589d5Swdenk#define r13 13 65d62589d5Swdenk#define r14 14 66d62589d5Swdenk#define r15 15 67d62589d5Swdenk#define r16 16 68d62589d5Swdenk#define r17 17 69d62589d5Swdenk#define r18 18 70d62589d5Swdenk#define r19 19 71d62589d5Swdenk#define r20 20 72d62589d5Swdenk#define r21 21 73d62589d5Swdenk#define r22 22 74d62589d5Swdenk#define r23 23 75d62589d5Swdenk#define r24 24 76d62589d5Swdenk#define r25 25 77d62589d5Swdenk#define r26 26 78d62589d5Swdenk#define r27 27 79d62589d5Swdenk#define r28 28 80d62589d5Swdenk#define r29 29 81d62589d5Swdenk#define r30 30 82d62589d5Swdenk#define r31 31 83d62589d5Swdenk 84*907208c4SChristophe Leroy#if defined(CONFIG_8xx) 85*907208c4SChristophe Leroy 86*907208c4SChristophe Leroy/* Some special registers */ 87*907208c4SChristophe Leroy 88*907208c4SChristophe Leroy#define ICR 148 /* Interrupt Cause Register (37-44) */ 89*907208c4SChristophe Leroy#define DER 149 90*907208c4SChristophe Leroy#define COUNTA 150 /* Breakpoint Counter (37-44) */ 91*907208c4SChristophe Leroy#define COUNTB 151 /* Breakpoint Counter (37-44) */ 92*907208c4SChristophe Leroy#define LCTRL1 156 /* Load/Store Support (37-40) */ 93*907208c4SChristophe Leroy#define LCTRL2 157 /* Load/Store Support (37-41) */ 94*907208c4SChristophe Leroy#define ICTRL 158 95*907208c4SChristophe Leroy 96*907208c4SChristophe Leroy#endif /* CONFIG_8xx */ 97*907208c4SChristophe Leroy 98*907208c4SChristophe Leroy 99*907208c4SChristophe Leroy#if defined(CONFIG_8xx) 100*907208c4SChristophe Leroy 101*907208c4SChristophe Leroy/* Registers in the processor's internal memory map that we use. 102*907208c4SChristophe Leroy*/ 103*907208c4SChristophe Leroy#define SYPCR 0x00000004 104*907208c4SChristophe Leroy#define BR0 0x00000100 105*907208c4SChristophe Leroy#define OR0 0x00000104 106*907208c4SChristophe Leroy#define BR1 0x00000108 107*907208c4SChristophe Leroy#define OR1 0x0000010c 108*907208c4SChristophe Leroy#define BR2 0x00000110 109*907208c4SChristophe Leroy#define OR2 0x00000114 110*907208c4SChristophe Leroy#define BR3 0x00000118 111*907208c4SChristophe Leroy#define OR3 0x0000011c 112*907208c4SChristophe Leroy#define BR4 0x00000120 113*907208c4SChristophe Leroy#define OR4 0x00000124 114*907208c4SChristophe Leroy 115*907208c4SChristophe Leroy#define MAR 0x00000164 116*907208c4SChristophe Leroy#define MCR 0x00000168 117*907208c4SChristophe Leroy#define MAMR 0x00000170 118*907208c4SChristophe Leroy#define MBMR 0x00000174 119*907208c4SChristophe Leroy#define MSTAT 0x00000178 120*907208c4SChristophe Leroy#define MPTPR 0x0000017a 121*907208c4SChristophe Leroy#define MDR 0x0000017c 122*907208c4SChristophe Leroy 123*907208c4SChristophe Leroy#define TBSCR 0x00000200 124*907208c4SChristophe Leroy#define TBREFF0 0x00000204 125*907208c4SChristophe Leroy 126*907208c4SChristophe Leroy#define PLPRCR 0x00000284 127*907208c4SChristophe Leroy 128*907208c4SChristophe Leroy#endif 129*907208c4SChristophe Leroy 130d62589d5Swdenk#define curptr r2 131d62589d5Swdenk 132d62589d5Swdenk#define SYNC \ 133d62589d5Swdenk sync; \ 134d62589d5Swdenk isync 135d62589d5Swdenk 136d62589d5Swdenk/* 137d62589d5Swdenk * Macros for storing registers into and loading registers from 138d62589d5Swdenk * exception frames. 139d62589d5Swdenk */ 140d62589d5Swdenk#define SAVE_GPR(n, base) stw n,GPR0+4*(n)(base) 141d62589d5Swdenk#define SAVE_2GPRS(n, base) SAVE_GPR(n, base); SAVE_GPR(n+1, base) 142d62589d5Swdenk#define SAVE_4GPRS(n, base) SAVE_2GPRS(n, base); SAVE_2GPRS(n+2, base) 143d62589d5Swdenk#define SAVE_8GPRS(n, base) SAVE_4GPRS(n, base); SAVE_4GPRS(n+4, base) 144d62589d5Swdenk#define SAVE_10GPRS(n, base) SAVE_8GPRS(n, base); SAVE_2GPRS(n+8, base) 145d62589d5Swdenk#define REST_GPR(n, base) lwz n,GPR0+4*(n)(base) 146d62589d5Swdenk#define REST_2GPRS(n, base) REST_GPR(n, base); REST_GPR(n+1, base) 147d62589d5Swdenk#define REST_4GPRS(n, base) REST_2GPRS(n, base); REST_2GPRS(n+2, base) 148d62589d5Swdenk#define REST_8GPRS(n, base) REST_4GPRS(n, base); REST_4GPRS(n+4, base) 149d62589d5Swdenk#define REST_10GPRS(n, base) REST_8GPRS(n, base); REST_2GPRS(n+8, base) 150d62589d5Swdenk 151d62589d5Swdenk/* 152d62589d5Swdenk * GCC sometimes accesses words at negative offsets from the stack 153d62589d5Swdenk * pointer, although the SysV ABI says it shouldn't. To cope with 154d62589d5Swdenk * this, we leave this much untouched space on the stack on exception 155d62589d5Swdenk * entry. 156d62589d5Swdenk */ 157d62589d5Swdenk#define STACK_UNDERHEAD 64 158d62589d5Swdenk 159d62589d5Swdenk/* 160d62589d5Swdenk * Exception entry code. This code runs with address translation 161d62589d5Swdenk * turned off, i.e. using physical addresses. 162d62589d5Swdenk * We assume sprg3 has the physical address of the current 163d62589d5Swdenk * task's thread_struct. 164d62589d5Swdenk */ 165efa35cf1SGrzegorz Bernacki#define EXCEPTION_PROLOG(reg1, reg2) \ 166d62589d5Swdenk mtspr SPRG0,r20; \ 167d62589d5Swdenk mtspr SPRG1,r21; \ 168d62589d5Swdenk mfcr r20; \ 169d62589d5Swdenk subi r21,r1,INT_FRAME_SIZE+STACK_UNDERHEAD; /* alloc exc. frame */\ 170d62589d5Swdenk stw r20,_CCR(r21); /* save registers */ \ 171d62589d5Swdenk stw r22,GPR22(r21); \ 172d62589d5Swdenk stw r23,GPR23(r21); \ 173d62589d5Swdenk mfspr r20,SPRG0; \ 174d62589d5Swdenk stw r20,GPR20(r21); \ 175d62589d5Swdenk mfspr r22,SPRG1; \ 176d62589d5Swdenk stw r22,GPR21(r21); \ 177d62589d5Swdenk mflr r20; \ 178d62589d5Swdenk stw r20,_LINK(r21); \ 179d62589d5Swdenk mfctr r22; \ 180d62589d5Swdenk stw r22,_CTR(r21); \ 181d62589d5Swdenk mfspr r20,XER; \ 182d62589d5Swdenk stw r20,_XER(r21); \ 183cc3023b9SRafal Jaworowski mfspr r20, DAR_DEAR; \ 184efa35cf1SGrzegorz Bernacki stw r20,_DAR(r21); \ 185efa35cf1SGrzegorz Bernacki mfspr r22,reg1; \ 186efa35cf1SGrzegorz Bernacki mfspr r23,reg2; \ 187d62589d5Swdenk stw r0,GPR0(r21); \ 188d62589d5Swdenk stw r1,GPR1(r21); \ 189d62589d5Swdenk stw r2,GPR2(r21); \ 190d62589d5Swdenk stw r1,0(r21); \ 191d62589d5Swdenk mr r1,r21; /* set new kernel sp */ \ 192d62589d5Swdenk SAVE_4GPRS(3, r21); 193d62589d5Swdenk/* 194d62589d5Swdenk * Note: code which follows this uses cr0.eq (set if from kernel), 195d62589d5Swdenk * r21, r22 (SRR0), and r23 (SRR1). 196d62589d5Swdenk */ 197d62589d5Swdenk 198d62589d5Swdenk/* 199d62589d5Swdenk * Exception vectors. 200d62589d5Swdenk * 201d62589d5Swdenk * The data words for `hdlr' and `int_return' are initialized with 202d62589d5Swdenk * OFFSET values only; they must be relocated first before they can 203d62589d5Swdenk * be used! 204d62589d5Swdenk */ 205fc4e1887SJoakim Tjernlund#define COPY_EE(d, s) rlwimi d,s,0,16,16 206fc4e1887SJoakim Tjernlund#define NOCOPY(d, s) 20796d2bb95SScott Wood 20896d2bb95SScott Wood#ifdef CONFIG_E500 20996d2bb95SScott Wood#define EXC_XFER_TEMPLATE(n, label, hdlr, msr, copyee) \ 21096d2bb95SScott Wood stw r22,_NIP(r21); \ 21196d2bb95SScott Wood stw r23,_MSR(r21); \ 21296d2bb95SScott Wood li r23,n; \ 21396d2bb95SScott Wood stw r23,TRAP(r21); \ 21496d2bb95SScott Wood li r20,msr; \ 21596d2bb95SScott Wood copyee(r20,r23); \ 21696d2bb95SScott Wood rlwimi r20,r23,0,25,25; \ 21796d2bb95SScott Wood mtmsr r20; \ 21896d2bb95SScott Wood bl 1f; \ 21996d2bb95SScott Wood1: mflr r23; \ 22096d2bb95SScott Wood addis r23,r23,(hdlr - 1b)@ha; \ 22196d2bb95SScott Wood addi r23,r23,(hdlr - 1b)@l; \ 22296d2bb95SScott Wood b transfer_to_handler 22396d2bb95SScott Wood 22496d2bb95SScott Wood#define STD_EXCEPTION(n, label, hdlr) \ 22550689461Smario.six@gdsys.cc.align 4; \ 22696d2bb95SScott Woodlabel: \ 22796d2bb95SScott Wood EXCEPTION_PROLOG(SRR0, SRR1); \ 22896d2bb95SScott Wood addi r3,r1,STACK_FRAME_OVERHEAD; \ 22996d2bb95SScott Wood EXC_XFER_TEMPLATE(n, label, hdlr, MSR_KERNEL, NOCOPY) \ 23096d2bb95SScott Wood 23196d2bb95SScott Wood#define CRIT_EXCEPTION(n, label, hdlr) \ 23250689461Smario.six@gdsys.cc.align 4; \ 23396d2bb95SScott Woodlabel: \ 23496d2bb95SScott Wood EXCEPTION_PROLOG(CSRR0, CSRR1); \ 23596d2bb95SScott Wood addi r3,r1,STACK_FRAME_OVERHEAD; \ 23696d2bb95SScott Wood EXC_XFER_TEMPLATE(n, label, hdlr, \ 23796d2bb95SScott Wood MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE), NOCOPY) \ 23896d2bb95SScott Wood 23996d2bb95SScott Wood#define MCK_EXCEPTION(n, label, hdlr) \ 24050689461Smario.six@gdsys.cc.align 4; \ 24196d2bb95SScott Woodlabel: \ 24296d2bb95SScott Wood EXCEPTION_PROLOG(MCSRR0, MCSRR1); \ 24396d2bb95SScott Wood addi r3,r1,STACK_FRAME_OVERHEAD; \ 24496d2bb95SScott Wood EXC_XFER_TEMPLATE(n, label, hdlr, \ 24596d2bb95SScott Wood MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE), NOCOPY) \ 24696d2bb95SScott Wood 24796d2bb95SScott Wood#else /* !E500 */ 24896d2bb95SScott Wood 249fc4e1887SJoakim Tjernlund#define EXC_XFER_TEMPLATE(label, hdlr, msr, copyee) \ 250fc4e1887SJoakim Tjernlund bl 1f; \ 251fc4e1887SJoakim Tjernlund1: mflr r20; \ 252fc4e1887SJoakim Tjernlund lwz r20,(.L_ ## label)-1b+8(r20); \ 253fc4e1887SJoakim Tjernlund mtlr r20; \ 254fc4e1887SJoakim Tjernlund li r20,msr; \ 255fc4e1887SJoakim Tjernlund copyee(r20,r23); \ 256d62589d5Swdenk rlwimi r20,r23,0,25,25; \ 257d62589d5Swdenk blrl; \ 258d62589d5Swdenk.L_ ## label : \ 259efa35cf1SGrzegorz Bernacki .long hdlr - _start + _START_OFFSET; \ 260fc4e1887SJoakim Tjernlund .long int_return - _start + _START_OFFSET; \ 261fc4e1887SJoakim Tjernlund .long transfer_to_handler - _start + _START_OFFSET 262fc4e1887SJoakim Tjernlund 263fc4e1887SJoakim Tjernlund#define STD_EXCEPTION(n, label, hdlr) \ 264fc4e1887SJoakim Tjernlund . = n; \ 265fc4e1887SJoakim Tjernlundlabel: \ 266fc4e1887SJoakim Tjernlund EXCEPTION_PROLOG(SRR0, SRR1); \ 267fc4e1887SJoakim Tjernlund addi r3,r1,STACK_FRAME_OVERHEAD; \ 268fc4e1887SJoakim Tjernlund EXC_XFER_TEMPLATE(label, hdlr, MSR_KERNEL, NOCOPY) \ 269d62589d5Swdenk 270d62589d5Swdenk#define CRIT_EXCEPTION(n, label, hdlr) \ 271d62589d5Swdenk . = n; \ 272d62589d5Swdenklabel: \ 27302032e8fSRafal Jaworowski EXCEPTION_PROLOG(CSRR0, CSRR1); \ 274d62589d5Swdenk addi r3,r1,STACK_FRAME_OVERHEAD; \ 275fc4e1887SJoakim Tjernlund EXC_XFER_TEMPLATE(label, hdlr, \ 276fc4e1887SJoakim Tjernlund MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE), NOCOPY) \ 277efa35cf1SGrzegorz Bernacki 278efa35cf1SGrzegorz Bernacki#define MCK_EXCEPTION(n, label, hdlr) \ 279efa35cf1SGrzegorz Bernacki . = n; \ 280efa35cf1SGrzegorz Bernackilabel: \ 281efa35cf1SGrzegorz Bernacki EXCEPTION_PROLOG(MCSRR0, MCSRR1); \ 282efa35cf1SGrzegorz Bernacki addi r3,r1,STACK_FRAME_OVERHEAD; \ 283fc4e1887SJoakim Tjernlund EXC_XFER_TEMPLATE(label, hdlr, \ 284fc4e1887SJoakim Tjernlund MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE), NOCOPY) \ 285d62589d5Swdenk 28696d2bb95SScott Wood#endif /* !E500 */ 287d62589d5Swdenk#endif /* __PPC_ASM_TMPL__ */ 288