1*83d290c5STom Rini/* SPDX-License-Identifier: GPL-2.0+ */ 2d62589d5Swdenk/* 3d62589d5Swdenk * (C) Copyright 2000-2002 4d62589d5Swdenk * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 5d62589d5Swdenk */ 6d62589d5Swdenk 7d62589d5Swdenk/* 8d62589d5Swdenk * This file contains all the macros and symbols which define 9d62589d5Swdenk * a PowerPC assembly language environment. 10d62589d5Swdenk */ 11d62589d5Swdenk#ifndef __PPC_ASM_TMPL__ 12d62589d5Swdenk#define __PPC_ASM_TMPL__ 13d62589d5Swdenk 1496d2bb95SScott Wood#include <config.h> 1596d2bb95SScott Wood 16d62589d5Swdenk/*************************************************************************** 17d62589d5Swdenk * 18d62589d5Swdenk * These definitions simplify the ugly declarations necessary for GOT 19d62589d5Swdenk * definitions. 20d62589d5Swdenk * 21d62589d5Swdenk * Stolen from prepboot/bootldr.h, (C) 1998 Gabriel Paubert, paubert@iram.es 22d62589d5Swdenk * 23161e4ae4SHeiko Schocher * Uses r12 to access the GOT 24d62589d5Swdenk */ 25d62589d5Swdenk 26d62589d5Swdenk#define START_GOT \ 27d62589d5Swdenk .section ".got2","aw"; \ 28d62589d5Swdenk.LCTOC1 = .+32768 29d62589d5Swdenk 30d62589d5Swdenk#define END_GOT \ 31d62589d5Swdenk .text 32d62589d5Swdenk 33d62589d5Swdenk#define GET_GOT \ 34d62589d5Swdenk bl 1f ; \ 35d62589d5Swdenk .text 2 ; \ 36d62589d5Swdenk0: .long .LCTOC1-1f ; \ 37d62589d5Swdenk .text ; \ 380f8aa159SJoakim Tjernlund1: mflr r12 ; \ 390f8aa159SJoakim Tjernlund lwz r0,0b-1b(r12) ; \ 400f8aa159SJoakim Tjernlund add r12,r0,r12 ; 41d62589d5Swdenk 42d62589d5Swdenk#define GOT_ENTRY(NAME) .L_ ## NAME = . - .LCTOC1 ; .long NAME 43d62589d5Swdenk 440f8aa159SJoakim Tjernlund#define GOT(NAME) .L_ ## NAME (r12) 45d62589d5Swdenk 46d62589d5Swdenk 47d62589d5Swdenk/*************************************************************************** 48d62589d5Swdenk * Register names 49d62589d5Swdenk */ 50d62589d5Swdenk#define r0 0 51d62589d5Swdenk#define r1 1 52d62589d5Swdenk#define r2 2 53d62589d5Swdenk#define r3 3 54d62589d5Swdenk#define r4 4 55d62589d5Swdenk#define r5 5 56d62589d5Swdenk#define r6 6 57d62589d5Swdenk#define r7 7 58d62589d5Swdenk#define r8 8 59d62589d5Swdenk#define r9 9 60d62589d5Swdenk#define r10 10 61d62589d5Swdenk#define r11 11 62d62589d5Swdenk#define r12 12 63d62589d5Swdenk#define r13 13 64d62589d5Swdenk#define r14 14 65d62589d5Swdenk#define r15 15 66d62589d5Swdenk#define r16 16 67d62589d5Swdenk#define r17 17 68d62589d5Swdenk#define r18 18 69d62589d5Swdenk#define r19 19 70d62589d5Swdenk#define r20 20 71d62589d5Swdenk#define r21 21 72d62589d5Swdenk#define r22 22 73d62589d5Swdenk#define r23 23 74d62589d5Swdenk#define r24 24 75d62589d5Swdenk#define r25 25 76d62589d5Swdenk#define r26 26 77d62589d5Swdenk#define r27 27 78d62589d5Swdenk#define r28 28 79d62589d5Swdenk#define r29 29 80d62589d5Swdenk#define r30 30 81d62589d5Swdenk#define r31 31 82d62589d5Swdenk 83ee1e600cSChristophe Leroy#if defined(CONFIG_MPC8xx) 84907208c4SChristophe Leroy 85907208c4SChristophe Leroy/* Some special registers */ 86907208c4SChristophe Leroy 87907208c4SChristophe Leroy#define ICR 148 /* Interrupt Cause Register (37-44) */ 88907208c4SChristophe Leroy#define DER 149 89907208c4SChristophe Leroy#define COUNTA 150 /* Breakpoint Counter (37-44) */ 90907208c4SChristophe Leroy#define COUNTB 151 /* Breakpoint Counter (37-44) */ 91907208c4SChristophe Leroy#define LCTRL1 156 /* Load/Store Support (37-40) */ 92907208c4SChristophe Leroy#define LCTRL2 157 /* Load/Store Support (37-41) */ 93907208c4SChristophe Leroy#define ICTRL 158 94907208c4SChristophe Leroy 95ee1e600cSChristophe Leroy#endif /* CONFIG_MPC8xx */ 96907208c4SChristophe Leroy 97907208c4SChristophe Leroy 98ee1e600cSChristophe Leroy#if defined(CONFIG_MPC8xx) 99907208c4SChristophe Leroy 100907208c4SChristophe Leroy/* Registers in the processor's internal memory map that we use. 101907208c4SChristophe Leroy*/ 102907208c4SChristophe Leroy#define SYPCR 0x00000004 103907208c4SChristophe Leroy#define BR0 0x00000100 104907208c4SChristophe Leroy#define OR0 0x00000104 105907208c4SChristophe Leroy#define BR1 0x00000108 106907208c4SChristophe Leroy#define OR1 0x0000010c 107907208c4SChristophe Leroy#define BR2 0x00000110 108907208c4SChristophe Leroy#define OR2 0x00000114 109907208c4SChristophe Leroy#define BR3 0x00000118 110907208c4SChristophe Leroy#define OR3 0x0000011c 111907208c4SChristophe Leroy#define BR4 0x00000120 112907208c4SChristophe Leroy#define OR4 0x00000124 113907208c4SChristophe Leroy 114907208c4SChristophe Leroy#define MAR 0x00000164 115907208c4SChristophe Leroy#define MCR 0x00000168 116907208c4SChristophe Leroy#define MAMR 0x00000170 117907208c4SChristophe Leroy#define MBMR 0x00000174 118907208c4SChristophe Leroy#define MSTAT 0x00000178 119907208c4SChristophe Leroy#define MPTPR 0x0000017a 120907208c4SChristophe Leroy#define MDR 0x0000017c 121907208c4SChristophe Leroy 122907208c4SChristophe Leroy#define TBSCR 0x00000200 123907208c4SChristophe Leroy#define TBREFF0 0x00000204 124907208c4SChristophe Leroy 125907208c4SChristophe Leroy#define PLPRCR 0x00000284 126907208c4SChristophe Leroy 127907208c4SChristophe Leroy#endif 128907208c4SChristophe Leroy 129d62589d5Swdenk#define curptr r2 130d62589d5Swdenk 131d62589d5Swdenk#define SYNC \ 132d62589d5Swdenk sync; \ 133d62589d5Swdenk isync 134d62589d5Swdenk 135d62589d5Swdenk/* 136d62589d5Swdenk * Macros for storing registers into and loading registers from 137d62589d5Swdenk * exception frames. 138d62589d5Swdenk */ 139d62589d5Swdenk#define SAVE_GPR(n, base) stw n,GPR0+4*(n)(base) 140d62589d5Swdenk#define SAVE_2GPRS(n, base) SAVE_GPR(n, base); SAVE_GPR(n+1, base) 141d62589d5Swdenk#define SAVE_4GPRS(n, base) SAVE_2GPRS(n, base); SAVE_2GPRS(n+2, base) 142d62589d5Swdenk#define SAVE_8GPRS(n, base) SAVE_4GPRS(n, base); SAVE_4GPRS(n+4, base) 143d62589d5Swdenk#define SAVE_10GPRS(n, base) SAVE_8GPRS(n, base); SAVE_2GPRS(n+8, base) 144d62589d5Swdenk#define REST_GPR(n, base) lwz n,GPR0+4*(n)(base) 145d62589d5Swdenk#define REST_2GPRS(n, base) REST_GPR(n, base); REST_GPR(n+1, base) 146d62589d5Swdenk#define REST_4GPRS(n, base) REST_2GPRS(n, base); REST_2GPRS(n+2, base) 147d62589d5Swdenk#define REST_8GPRS(n, base) REST_4GPRS(n, base); REST_4GPRS(n+4, base) 148d62589d5Swdenk#define REST_10GPRS(n, base) REST_8GPRS(n, base); REST_2GPRS(n+8, base) 149d62589d5Swdenk 150d62589d5Swdenk/* 151d62589d5Swdenk * GCC sometimes accesses words at negative offsets from the stack 152d62589d5Swdenk * pointer, although the SysV ABI says it shouldn't. To cope with 153d62589d5Swdenk * this, we leave this much untouched space on the stack on exception 154d62589d5Swdenk * entry. 155d62589d5Swdenk */ 156d62589d5Swdenk#define STACK_UNDERHEAD 64 157d62589d5Swdenk 158d62589d5Swdenk/* 159d62589d5Swdenk * Exception entry code. This code runs with address translation 160d62589d5Swdenk * turned off, i.e. using physical addresses. 161d62589d5Swdenk * We assume sprg3 has the physical address of the current 162d62589d5Swdenk * task's thread_struct. 163d62589d5Swdenk */ 164efa35cf1SGrzegorz Bernacki#define EXCEPTION_PROLOG(reg1, reg2) \ 165d62589d5Swdenk mtspr SPRG0,r20; \ 166d62589d5Swdenk mtspr SPRG1,r21; \ 167d62589d5Swdenk mfcr r20; \ 168d62589d5Swdenk subi r21,r1,INT_FRAME_SIZE+STACK_UNDERHEAD; /* alloc exc. frame */\ 169d62589d5Swdenk stw r20,_CCR(r21); /* save registers */ \ 170d62589d5Swdenk stw r22,GPR22(r21); \ 171d62589d5Swdenk stw r23,GPR23(r21); \ 172d62589d5Swdenk mfspr r20,SPRG0; \ 173d62589d5Swdenk stw r20,GPR20(r21); \ 174d62589d5Swdenk mfspr r22,SPRG1; \ 175d62589d5Swdenk stw r22,GPR21(r21); \ 176d62589d5Swdenk mflr r20; \ 177d62589d5Swdenk stw r20,_LINK(r21); \ 178d62589d5Swdenk mfctr r22; \ 179d62589d5Swdenk stw r22,_CTR(r21); \ 180d62589d5Swdenk mfspr r20,XER; \ 181d62589d5Swdenk stw r20,_XER(r21); \ 182cc3023b9SRafal Jaworowski mfspr r20, DAR_DEAR; \ 183efa35cf1SGrzegorz Bernacki stw r20,_DAR(r21); \ 184efa35cf1SGrzegorz Bernacki mfspr r22,reg1; \ 185efa35cf1SGrzegorz Bernacki mfspr r23,reg2; \ 186d62589d5Swdenk stw r0,GPR0(r21); \ 187d62589d5Swdenk stw r1,GPR1(r21); \ 188d62589d5Swdenk stw r2,GPR2(r21); \ 189d62589d5Swdenk stw r1,0(r21); \ 190d62589d5Swdenk mr r1,r21; /* set new kernel sp */ \ 191d62589d5Swdenk SAVE_4GPRS(3, r21); 192d62589d5Swdenk/* 193d62589d5Swdenk * Note: code which follows this uses cr0.eq (set if from kernel), 194d62589d5Swdenk * r21, r22 (SRR0), and r23 (SRR1). 195d62589d5Swdenk */ 196d62589d5Swdenk 197d62589d5Swdenk/* 198d62589d5Swdenk * Exception vectors. 199d62589d5Swdenk * 200d62589d5Swdenk * The data words for `hdlr' and `int_return' are initialized with 201d62589d5Swdenk * OFFSET values only; they must be relocated first before they can 202d62589d5Swdenk * be used! 203d62589d5Swdenk */ 204fc4e1887SJoakim Tjernlund#define COPY_EE(d, s) rlwimi d,s,0,16,16 205fc4e1887SJoakim Tjernlund#define NOCOPY(d, s) 20696d2bb95SScott Wood 20796d2bb95SScott Wood#ifdef CONFIG_E500 20896d2bb95SScott Wood#define EXC_XFER_TEMPLATE(n, label, hdlr, msr, copyee) \ 20996d2bb95SScott Wood stw r22,_NIP(r21); \ 21096d2bb95SScott Wood stw r23,_MSR(r21); \ 21196d2bb95SScott Wood li r23,n; \ 21296d2bb95SScott Wood stw r23,TRAP(r21); \ 21396d2bb95SScott Wood li r20,msr; \ 21496d2bb95SScott Wood copyee(r20,r23); \ 21596d2bb95SScott Wood rlwimi r20,r23,0,25,25; \ 21696d2bb95SScott Wood mtmsr r20; \ 21796d2bb95SScott Wood bl 1f; \ 21896d2bb95SScott Wood1: mflr r23; \ 21996d2bb95SScott Wood addis r23,r23,(hdlr - 1b)@ha; \ 22096d2bb95SScott Wood addi r23,r23,(hdlr - 1b)@l; \ 22196d2bb95SScott Wood b transfer_to_handler 22296d2bb95SScott Wood 22396d2bb95SScott Wood#define STD_EXCEPTION(n, label, hdlr) \ 22450689461Smario.six@gdsys.cc.align 4; \ 22596d2bb95SScott Woodlabel: \ 22696d2bb95SScott Wood EXCEPTION_PROLOG(SRR0, SRR1); \ 22796d2bb95SScott Wood addi r3,r1,STACK_FRAME_OVERHEAD; \ 22896d2bb95SScott Wood EXC_XFER_TEMPLATE(n, label, hdlr, MSR_KERNEL, NOCOPY) \ 22996d2bb95SScott Wood 23096d2bb95SScott Wood#define CRIT_EXCEPTION(n, label, hdlr) \ 23150689461Smario.six@gdsys.cc.align 4; \ 23296d2bb95SScott Woodlabel: \ 23396d2bb95SScott Wood EXCEPTION_PROLOG(CSRR0, CSRR1); \ 23496d2bb95SScott Wood addi r3,r1,STACK_FRAME_OVERHEAD; \ 23596d2bb95SScott Wood EXC_XFER_TEMPLATE(n, label, hdlr, \ 23696d2bb95SScott Wood MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE), NOCOPY) \ 23796d2bb95SScott Wood 23896d2bb95SScott Wood#define MCK_EXCEPTION(n, label, hdlr) \ 23950689461Smario.six@gdsys.cc.align 4; \ 24096d2bb95SScott Woodlabel: \ 24196d2bb95SScott Wood EXCEPTION_PROLOG(MCSRR0, MCSRR1); \ 24296d2bb95SScott Wood addi r3,r1,STACK_FRAME_OVERHEAD; \ 24396d2bb95SScott Wood EXC_XFER_TEMPLATE(n, label, hdlr, \ 24496d2bb95SScott Wood MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE), NOCOPY) \ 24596d2bb95SScott Wood 24696d2bb95SScott Wood#else /* !E500 */ 24796d2bb95SScott Wood 248fc4e1887SJoakim Tjernlund#define EXC_XFER_TEMPLATE(label, hdlr, msr, copyee) \ 249fc4e1887SJoakim Tjernlund bl 1f; \ 250fc4e1887SJoakim Tjernlund1: mflr r20; \ 251fc4e1887SJoakim Tjernlund lwz r20,(.L_ ## label)-1b+8(r20); \ 252fc4e1887SJoakim Tjernlund mtlr r20; \ 253fc4e1887SJoakim Tjernlund li r20,msr; \ 254fc4e1887SJoakim Tjernlund copyee(r20,r23); \ 255d62589d5Swdenk rlwimi r20,r23,0,25,25; \ 256d62589d5Swdenk blrl; \ 257d62589d5Swdenk.L_ ## label : \ 258efa35cf1SGrzegorz Bernacki .long hdlr - _start + _START_OFFSET; \ 259fc4e1887SJoakim Tjernlund .long int_return - _start + _START_OFFSET; \ 260fc4e1887SJoakim Tjernlund .long transfer_to_handler - _start + _START_OFFSET 261fc4e1887SJoakim Tjernlund 262fc4e1887SJoakim Tjernlund#define STD_EXCEPTION(n, label, hdlr) \ 263fc4e1887SJoakim Tjernlund . = n; \ 264fc4e1887SJoakim Tjernlundlabel: \ 265fc4e1887SJoakim Tjernlund EXCEPTION_PROLOG(SRR0, SRR1); \ 266fc4e1887SJoakim Tjernlund addi r3,r1,STACK_FRAME_OVERHEAD; \ 267fc4e1887SJoakim Tjernlund EXC_XFER_TEMPLATE(label, hdlr, MSR_KERNEL, NOCOPY) \ 268d62589d5Swdenk 269d62589d5Swdenk#define CRIT_EXCEPTION(n, label, hdlr) \ 270d62589d5Swdenk . = n; \ 271d62589d5Swdenklabel: \ 27202032e8fSRafal Jaworowski EXCEPTION_PROLOG(CSRR0, CSRR1); \ 273d62589d5Swdenk addi r3,r1,STACK_FRAME_OVERHEAD; \ 274fc4e1887SJoakim Tjernlund EXC_XFER_TEMPLATE(label, hdlr, \ 275fc4e1887SJoakim Tjernlund MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE), NOCOPY) \ 276efa35cf1SGrzegorz Bernacki 277efa35cf1SGrzegorz Bernacki#define MCK_EXCEPTION(n, label, hdlr) \ 278efa35cf1SGrzegorz Bernacki . = n; \ 279efa35cf1SGrzegorz Bernackilabel: \ 280efa35cf1SGrzegorz Bernacki EXCEPTION_PROLOG(MCSRR0, MCSRR1); \ 281efa35cf1SGrzegorz Bernacki addi r3,r1,STACK_FRAME_OVERHEAD; \ 282fc4e1887SJoakim Tjernlund EXC_XFER_TEMPLATE(label, hdlr, \ 283fc4e1887SJoakim Tjernlund MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE), NOCOPY) \ 284d62589d5Swdenk 28596d2bb95SScott Wood#endif /* !E500 */ 286d62589d5Swdenk#endif /* __PPC_ASM_TMPL__ */ 287