186db550bSTom Rini /* 286db550bSTom Rini * (C) Copyright 2014 386db550bSTom Rini * Texas Instruments, <www.ti.com> 486db550bSTom Rini * 586db550bSTom Rini * SPDX-License-Identifier: GPL-2.0+ 686db550bSTom Rini */ 786db550bSTom Rini 886db550bSTom Rini #ifndef __POWER_TPS65218_H__ 986db550bSTom Rini #define __POWER_TPS65218_H__ 1086db550bSTom Rini 11*9bcfca12SNikita Kiryanov #include <linux/bitops.h> 12*9bcfca12SNikita Kiryanov 1386db550bSTom Rini /* I2C chip address */ 1486db550bSTom Rini #define TPS65218_CHIP_PM 0x24 1586db550bSTom Rini 1686db550bSTom Rini /* Registers */ 1786db550bSTom Rini enum { 1886db550bSTom Rini TPS65218_CHIPID = 0x00, 1986db550bSTom Rini TPS65218_INT1, 2086db550bSTom Rini TPS65218_INT2, 2186db550bSTom Rini TPS65218_INT_MASK1, 2286db550bSTom Rini TPS65218_INT_MASK2, 2386db550bSTom Rini TPS65218_STATUS, 2486db550bSTom Rini TPS65218_CONTROL, 2586db550bSTom Rini TPS65218_FLAG, 2686db550bSTom Rini TPS65218_PASSWORD = 0x10, 2786db550bSTom Rini TPS65218_ENABLE1, 2886db550bSTom Rini TPS65218_ENABLE2, 2986db550bSTom Rini TPS65218_CONFIG1, 3086db550bSTom Rini TPS65218_CONFIG2, 3186db550bSTom Rini TPS65218_CONFIG3, 3286db550bSTom Rini TPS65218_DCDC1, 3386db550bSTom Rini TPS65218_DCDC2, 3486db550bSTom Rini TPS65218_DCDC3, 3586db550bSTom Rini TPS65218_DCDC4, 3686db550bSTom Rini TPS65218_SLEW, 3786db550bSTom Rini TPS65218_LDO1, 3886db550bSTom Rini TPS65218_SEQ1 = 0x20, 3986db550bSTom Rini TPS65218_SEQ2, 4086db550bSTom Rini TPS65218_SEQ3, 4186db550bSTom Rini TPS65218_SEQ4, 4286db550bSTom Rini TPS65218_SEQ5, 4386db550bSTom Rini TPS65218_SEQ6, 4486db550bSTom Rini TPS65218_SEQ7, 4586db550bSTom Rini TPS65218_PMIC_NUM_OF_REGS, 4686db550bSTom Rini }; 4786db550bSTom Rini 4886db550bSTom Rini #define TPS65218_PROT_LEVEL_NONE 0x00 4986db550bSTom Rini #define TPS65218_PROT_LEVEL_1 0x01 5086db550bSTom Rini #define TPS65218_PROT_LEVEL_2 0x02 5186db550bSTom Rini 5286db550bSTom Rini #define TPS65218_PASSWORD_LOCK_FOR_WRITE 0x00 5386db550bSTom Rini #define TPS65218_PASSWORD_UNLOCK 0x7D 5486db550bSTom Rini 5586db550bSTom Rini #define TPS65218_DCDC_GO 0x80 5686db550bSTom Rini 5786db550bSTom Rini #define TPS65218_MASK_ALL_BITS 0xFF 5886db550bSTom Rini 598465d6a7SFelipe Balbi #define TPS65218_DCDC_VOLT_SEL_0950MV 0x0a 6086db550bSTom Rini #define TPS65218_DCDC_VOLT_SEL_1100MV 0x19 618465d6a7SFelipe Balbi #define TPS65218_DCDC_VOLT_SEL_1200MV 0x23 628465d6a7SFelipe Balbi #define TPS65218_DCDC_VOLT_SEL_1260MV 0x29 6386db550bSTom Rini #define TPS65218_DCDC_VOLT_SEL_1330MV 0x30 6486db550bSTom Rini 65*9bcfca12SNikita Kiryanov #define TPS65218_CC_STAT (BIT(0) | BIT(1)) 66*9bcfca12SNikita Kiryanov #define TPS65218_STATE (BIT(2) | BIT(3)) 67*9bcfca12SNikita Kiryanov #define TPS65218_PB_STATE BIT(4) 68*9bcfca12SNikita Kiryanov #define TPS65218_AC_STATE BIT(5) 69*9bcfca12SNikita Kiryanov #define TPS65218_EE BIT(6) 70*9bcfca12SNikita Kiryanov #define TPS65218_FSEAL BIT(7) 71*9bcfca12SNikita Kiryanov 72*9bcfca12SNikita Kiryanov int tps65218_reg_read(uchar dest_reg, uchar *dest_val); 7386db550bSTom Rini int tps65218_reg_write(uchar prot_level, uchar dest_reg, uchar dest_val, 7486db550bSTom Rini uchar mask); 7586db550bSTom Rini int tps65218_voltage_update(uchar dc_cntrl_reg, uchar volt_sel); 76*9bcfca12SNikita Kiryanov int tps65218_toggle_fseal(void); 77*9bcfca12SNikita Kiryanov int tps65218_lock_fseal(void); 787aa5598aSTom Rini int power_tps65218_init(unsigned char bus); 7986db550bSTom Rini #endif /* __POWER_TPS65218_H__ */ 80